Digital Predictive Current-Mode Control for Asymmetrical Half-Bridge LED Constant-Current Driver

In this paper, we propose three advanced digital predictive current-mode control (DPCC) algorithms based on a simplified estimation method of duty cycle lost time for asymmetric half-bridge (AHB) LED constant-current driver. They are the digital predictive peak current mode control(DPPCC) algorithm based on leading-edge modulation, the digital predictive quasi-valley current mode control(DPqVCC) algorithm based on trailing-edge modulation, and the digital predictive quasi-average current mode control(DPqACC) algorithm based on double-edge modulation. Simulation and experimental results demonstrate that the three DPCC algorithms can effectively offset the effect of delay on digital control performance, which confirms the superiority of DPqACC. When the DPqACC is applied, the series-load-jump transition times are below 4.5 ms, the maximum load adjustment rate is 0.5%, and the output current can be tuned continuously between 0.3 A and 4.5 A with the longest transition time of 1 ms. Moreover, the three DPCC algorithms are capable of compensating for low-frequency ripples due to the rapid regulation speed of the inner loop. With the electrolytic capacitance removed without additional ripple compensation, the maximum peak-to-peak value of the low-frequency secondary ripple is 0.1163 A (2.91%) when the input is $400+53\sin (2\omega _{lin} t)$ V, and the output is 4 A. This approach provides an excellent solution for the digital design of low-ripple AC-DC LED constant-current drivers without electrolytic capacitance.


I. INTRODUCTION
LED light source has numerous advantages such as high efficiency, energy saving, long life, high reliability, and environmental friendliness, thus widely used in indoor and outdoor lighting [1]. Furthermore, with the continuous improvement of LED's light flux and efficiency, the application of LED light sources has been rapidly expanded into high-power lighting fields such as square lightening, airport lightening, stadium lightening, and searchlights in an all-around way [2], The associate editor coordinating the review of this manuscript and approving it for publication was Vitor Monteiro . [3]. Usually, a constant current drives the LED light source, and the driver's quality will affect the light source's overall performance [4], [5], [6]. Because of such characteristics as high conversion efficiency, low voltage stress, constant frequency control, and a small capacitive filter, the Asymmetric Half-Bridge (AHB) converter are significantly advantageous when applied to a high-power LED driver [7], [8], [9]. When the two-stage topology formed by Boost-AHB is used for multi-channel LED series driving, the overall conversion efficiency can reach 94.5% [10].
Usually, the AHB converter can be controlled by voltage mode or current mode [11]. In contrast, the feedback gain of current mode control (CMC) can be increased independently of the secondary resonance, resulting in better closedloop performance [12]. CMC mainly includes three control modes: Peak Current Control (PCC), Average Current Control (ACC), and Valley Current Control (VCC) [13]. Dr. Byungcho Choi applied the three CMC strategies to control the AHB constant voltage source using the analog method.
The results show that the ACC algorithm is more conducive to improving the closed-loop performance of the AHB converter [14]. However, for the AHB LED constant-current driver, the voltage mode controller is commonly adopted [15], [16], [17]. Moreover, the analog method implements the AHB controller, whether used to design a voltage or current source. Compared with analog control, digital control has the strong anti-interference capability, flexible programming, and easy realization of complex control algorithms. The widely studied Digital Current Mode Control (DCMC) strategy is formed by combining digital control and CMC [18]. However, the loop delay caused by sampling, calculation, and modulation in digital realization will directly affect the converter's control accuracy, dynamic performance, and loop bandwidth [19]. In light of this, R. Kennel proposed a DPCC algorithm [20], with the sampled value and slope of inductor current used in this switching period to predict the duty cycle of the next, such that the error of the controlled variable is eliminated or minimized in the next cycle or the several subsequent cycles. The DPCC algorithm can effectively offset the effects of loop delays on converters' dynamic and static performance, which is one of the important research directions for investigating the digital control of DC-DC converters. Various research achievements have been obtained based on Buck, Boost, fly-back, full-bridge, and other converters, proving the effectiveness of predictive control algorithms [21], [22], [23].
One of the advantages of AHB is that it is easy to use the transformer's primary side leakage inductance and bypass capacitors (C Q 1 and C Q 2 ) to achieve zero voltage switching (ZVS), thus effectively reducing switching loss and conduction loss [24]. In addition, to expand the range of ZVS, a tiny inductor is generally added to the primary side of the transformer to form a resonant inductor (L r ) together with the leakage inductor, as shown in Figure 1. However, at the same time, the ZVS resonant circuit leads to duty cycle loss, as shown in Figure 2; when the gate signals for Q 2 and Q 1 are given at times t 2 and t 6 , the output filter inductor current i L f cannot respond immediately but can only transition to the next state after a period of time. The transition times t 2 ∼ t 4 and t 6 ∼ t 8 correspond to the duty cycle lost time of Q 2 and Q 1 , respectively. The theoretical expression is as follows [25]: Here, D denotes the switching period, and D L 2 and D L 1 are the lost duty cycles of Q 2 and Q 1 , respectively. Unfortunately, it is a complicated and time-consuming process for digital controllers to compute the duty cycle loss time based on the above two formulas. As a result, these two formulas are not conducive to applying the DPCC algorithms.
In this study, we first derive a simple method to estimate the duty cycle loss time. Then, three DPCC algorithms have been proposed for AHB LED constant-current drivers based on this estimation method. Finally, the effectiveness of the predictive algorithms is demonstrated through simulations and experiments.
The paper is organized as follows. In Section 2, we will give a derived i p -based estimation method for the duty cycle loss time of AHB converters. In Section 3, we present the developed theoretical derivation and stability analysis of the DPACC, DPPCC, and DPVCC algorithms and small signal discrete-time models of the three algorithms. In Section 4, we show the simulation and experimental results to validate the effectiveness of the control algorithm and compare and analyze control performance metrics. Finally, in Section 5, the conclusions of the study are presented.

II. OPERATION CHARACTERISTICS AND DUTY CYCLE LOSS TIME ESTIMATION OF AHB CONVERTER
As mentioned above, the theoretical formulation of the duty cycle loss time is extremely complex due to resonant circuit effects, and applying it to digital predictive current mode control algorithms is challenging. However, by observing the waveforms shown in Figure 2, we can find that the i p linearly decreases (increases) during the interval of duty cycle loss, and the i p 's start and end points and slopes can be easily analyzed. Therefore, this section will derive an i pbased approximate estimation method to obtain the duty cycle loss time.

A. OPERATION CHARACTERISTICS OF AHB CONVERTER
The following are the assumptions made before the running of the characteristic analysis: • The dead time is minimal compared with the switching period and can be ignored.
• All components are considered ideal devices without consideration of loss.
• The leakage inductance of the transformer is much less than the magnetization inductance, and the two secondary winding turns are the same. Therefore, the transformer ratio is defined as N p /N s1 = N p /N s2 = n.
• DC blocking capacitor C B , output filtering capacitor C f and output filtering inductor L f are large enough, U C B , i LED , and U LED are approximately constant, and L m L r , the leak-inductance voltage can be ignored.
• The duty cycle D is less than 0.5, and the output filter inductor operates in a continuous current mode.
• Capacitors C Q 1 and C Q 2 contain the internal capacitance of the MOSFET and the external parasitic capacitance. Based on the above assumptions, without considering the duty cycle loss, the steady operation characteristics of the converter are shown as formulas (3), (4), and (5).
As shown in Figure 2, the AHB converter is composed of eight operating modes in one switching cycle [26], where modes 1(t 0 t 1 ) and 5(t 3 ∼ t 4 ) correspond to the stage DT s and stage (1 − D)T s under ideal conditions, respectively. Therefore, the i L f of the two stages can be expressed as formulas (6) and (7): During the interval of modes 2(t 1 ∼ t 2 ) and 6(t 4 ∼ t 5 ), L r and L m are resonant with C Q 1 and C Q 2 . At time t 2 (t 6 ), the resonance causes the primary side voltage of the transformer to drop to zero, and the transformer decouples. In these two intervals, L r and L f simultaneously provide resonance energy, and i p at t 2 (t 6 ) and i L f are expressed respectively as formulas (8) and (9): The transformer operates uncoupled in modes 3(t 2 ∼ t 3 ) and 7(t 6 ∼ t 7 ). Energy is only provided by L r that resonates with C Q 1 and C Q 2 . Before the end of this mode, U C Q2 (U C Q1 ) and U C Q1 (U C Q2 ) should be zero and U s , and then Q 2 (Q 1 ) should achieve the condition of ZVS. i L f s of these two modes are expressed as formulas (10) and (11): At t 3 (t 7 ), Q 2 (Q 1 ) conducts with ZVS and enters into mode 4 (8). During this interval, the voltage on both sides of the transformer remains 0, all U C B is loaded into L r , and i p linearly decreases (rises). Until t 4 (t 8 ), transformer coupling occurs, rectifier diode current i D 1 (i D 2 ) drops to 0, and i D 2 (i D 1 ) rises to i L f . i p at t 4 (t 8 ) and i L f are respectively expressed as formulas (12) and (13): Based on the above discussion, it can be observed that the waveform of the i L f consists of four line segments throughout the switching period due to the influence of the ZVS resonator circuit. In the intervals t 0 ∼ t 2 and t 4 ∼ t 6 , the transformer coupling works, corresponding to two line segments with slopes m r and m f , and in the gaps t 2 ∼ t 4 and t 6 ∼ t 8 , the transformer decoupling works, corresponding to two line segments with slopes m f 2 and m f 1 . Furthermore, the slope of each segment is expressed as formula (14): For modes 2 and 6, L r and L f provide energy to the ZVS resonator circuit simultaneously so that the winding voltage of the transformer can be rapidly reduced to zero. Therefore, the time consumed in these two modes is negligible compared to those consumed in modes 3, 4, 7, and 8. Moreover, considering that the slopes of the slant lines in these two modes are the same as those in modes 1 and 5, the i L f waveform can be simplified into four segments, as shown in Figure 3.

B. DUTY CYCLE LOSS TIME ESTIMATION
The simplified waveforms obtained after we combine the line segments with the same slope of i L f are shown in Figure 3. Where t A is the start time of the switching period, u Q 1 ds and u Q 2 ds are the drain-source voltage of Q 1 and Q 2 , respectively, and T s is the switching period, d L 1 T s and d L 2 T s are the duty cycle loss times. At each switching period, the waveform of ILF changes with the four slopes m f 1 , m r , m f 2 , and m f .
The interval t A ∼ t B consists of modes 7 and 8 and enters this interval after mode 6. During this interval, the transformer decouples, and L r provides energy for C Q 1 to continue discharging until the ZVS condition for Q 1 is achieved. After the Q 1 ZVS conducting, the U s −U C B acts on the L r , and then the i p rises from i p (t 6 ) = I m,min −i L f (t 6 ) n to i p (t 8 ) = I m,min + i L f (t 8 ) n linearly. By replacing i L f with relatively constant i LED , the approximate estimation formula of duty cycle loss time of Q 1 can be obtained as shown in Equation (15): Similarly, the interval of t C ∼ t D consists of modes 3 and 4 and enters this interval after mode 2. During this interval, the transformer decouples, and L r provides energy for C Q 2 to continue discharging until the ZVS condition for Q 2 is achieved. After Q 2 ZVS conducting, −U C B acts on the L r , and then the i p decreases from i p (t 2 ) = I m,max + i L f (t 2 ) n to i p (t 4 ) = I m,max − i L f (t 4 ) n linearly. By replacing i L f with i LED , the lost duty cycle of Q 2 can be obtained as shown in Equation (16): Compared with equations (1) and (2), the approximate estimation method of duty cycle loss time is easier to be realized and can be conveniently applied to DPCC implementation.

C. DC CHARACTERISTICS OF DUTY CYCLE LOSS
Equation (3) shows the relationship between the input and output voltages without considering duty cycle loss. In practice, however, the effect of duty cycle loss should be considered to obtain accurate voltage relations. By considering the duty cycle loss time only and ignoring the dead time, the steady-state output voltage can be obtained as shown in formula (17): When equations (3), (15) and (16) are substituted into Equation (17), we can obtain formula (18): A comprehensive analysis of the impact of leakage inductance L r on ZVS implementation, duty cycle loss time, and DC characteristics shows that increasing L r can effectively expand the ZVS range and reduce the di dt to alleviate the reverse recovery problem. However, at the same time, an increase in di dt also results in a decrease in transformer turns ratio, which leads to an increase in voltage stress on the rectifier diode and an increase in conduction loss due to duty cycle loss. Therefore, when it comes to the overall efficiency, the total duty cycle loss D QLoss (D QLoss = D Q 1 ,loss + D Q 2 ,loss ) caused by leakage inductance should be 5-10% of the switching cycle [26].

III. DIGITAL PREDICTIVE CURRENT-MODE CONTROL FOR AHB LED CONSTANT-CURRENT DRIVER
As shown in Figure 4, the DPCC of the AHB LED constantcurrent driver consists of an inductance current inner loop and an LED current outer loop. The LED current digital compensator is the same as the regular one, and the digital PI or 3P3Z algorithm can be used. However, unlike traditional methods, the DPCC controller uses the high-speed sampled value of the inductance current and its slopes in this switching period to predict the duty cycle of the next period, thus eliminating the inductance current error in the next or next few periods. In this part, we will deduce the three proposed DPCC algorithms based on the simple estimation method of duty cycle loss time proposed above and conduct stability analysis and small signal discrete modeling. Worth noting is that the sampling frequency and the adjusting speed of the outer loop are usually considerably slower than that of the inner loop. Therefore, in the figure, the slow-speed signals are represented by [n], and the high-speed values are represented by [k].

A. DIGITAL PREDICTIVE CURRENT MODE CONTROL AND ITS STABILITY ANALYSIS
The waveforms of the inductance current obtained when controlled with DPPCC, DPVCC, and DPACC are shown in Figures 5, 6, and 7, respectively. We set the sampling points at the beginning of the triangular wave modulated by the leading edge and trailing edge, respectively, and at the apex of the isosceles triangular wave modulated by the double edge. In this case, the sampled values are the actual peak values of the inductance current when controlled by the leading-edge modulated DPPCC algorithm, denoted as i peak . Nonetheless, as can be observed from Figures 6 and 7, due to the effect of the duty cycle loss, the sampled current values are not the actual valley values when controlled by the trailing-edge modulated DPVCC algorithm and are not the actual average values when controlled by the double-edge modulated DPACC algorithm. In this paper, these two sampled values are defined as quasi-valley and quasi-average values and denoted by i v and i av , respectively. And the control methods are named as digital predicted quasi-valley current mode control(DPqVCC) and digital predicted quasi-average current mode control(DPqACC).
In these figures, i xss , i ref and e i x = i x − i xss are used to represent the steady-state value, reference value and error, with the xs representing the peak value, quasi-valley value and quasi-average value of inductance current, respectively.
The DPCC algorithm calculates the duty cycle of the k+1th switching cycle using the i peak (k), i v (k), or i av (k) sampled in the kth switching cycle to adjust the value of the i peak (k + 2), i v (k + 2), or i av (k + 2) at the end of the k+1th switching cycle to the reference. It can be observed that the regulation processes and control algorithms of the three DPCC strategies are similar. In the following section, we take the DPqACC as an example to deduce the algorithm.
From Figure 7, Formulas (19) and (20) can be obtained as follows: (20) For formula (20), let i ref = i av (k + 2), combining equations (14), (15), and (19), and considering u C c = du s , we can get the formula as (21): where, λ(k) = 2i LED (k)L r n 2 L f T s . i av (k) Since the cutoff frequency of the output LC filter is set to be extremely low for a constant current source, it can be argued that the output current is constant over the two adjacent switching periods, that is, i LED (k +1) ≈ i LED (k) and, hence, λ(k + 1) ≈ λ(k). Therefore, the duty cycle prediction algorithm of the K+1th switching cycle can be obtained, as shown in Equation (22): VOLUME 10, 2022   Next, we will analyze the stability of the DPqACC algorithm. The quasi-average current error due to the interference signal injection in the kth period is assumed to be e i av (k) = i av (k) − i avss = i av (k) − i ref in the steady-state condition, as shown in Fig. 7. The following results can then be obtained as shown in Formula (23): i av (k + 1) = i avss + e i av (k + 1) i av (k + 2) = i avss + e i av (k + 2) Combining equations (19), (20), (22) and (23), we can get the formula (24): As mentioned above, the i LED is assumed to be constant over two adjacent switching periods, hence e i av (k + 2) ≈ 0. In practice, the sampling frequency of the i LED and the adjusting frequency of the outer loop is usually set to be 1/10 of the switching frequency, which is much slower than that of the digital predictive algorithm, thus ensuring the stability of these algorithms.
Similarly, the predictive algorithms and error formulas for DPPCC and DPqVCC can be derived in the ways described above. Furthermore, the DPCC algorithms can be uniformly written in the form of (25): Among them, i s (k) represents the sampling value, corresponding to i p , i v and i av , respectively, and e i L (k + 2) is the inductance current error in the k+2th switching period, corresponding to e i p , e i v and e i av , respectively. From the stability analysis, the adjustment range of the DPCC algorithms is relatively narrow. When the operating point changes, an unstable situation may occur. In practical application, a wide range of adaptive control can be achieved by applying a simple coefficient correction.

B. DISCRETE SMALL SIGNAL MODELING FOR DPCC
For the predictive algorithm of Formula (25), it can be noted that i s is the sampled value of i L , and Formula (25) is rewritten as Formula (26): To obtain the small signal discrete model of the digital predictive current mode controller, we let: When Formula (27) is substituted into Formula (26), the large signal and small signal models of the modulator can be obtained as shown in Formulas (28) and (29): By substituting the slope formulas into Formula (29), we can obtain Formula (30):: The small signal discrete model from duty cycle to current error can be obtained by the Z-transformation of Formula (30), as shown in Formula (31): For the DPCC inductance current inner loop, the Z-domain transfer function can be obtained from the current error to the duty cycle as shown in Formula (32): Combining the above derivation results, we obtain the block diagram of the small-signal closed-loop discrete model for DPCC of AHB LED constant-current driver, as shown in Figure 8. In this figure, Gˆi LED d (z) and Gˆi L d (z) are small signal discrete models of AHB, which can be obtained by bilinear transformation from the average small signal model provided in the literature [27] or derived by the discrete-time modeling method [28]. G ADC (z) is the discrete small-signal model of ADC, and G ci LED (z) is the LED current loop compensator. R si L and R si LED are the sampling gains of inductor current and LED current, respectively, while gains K s 1 = 1/(K ADCi L R si L ) and K s 1 = 1/(K ADCi L R si L ) are used to achieve the unit gains of these two currents.
Accordingly, the loop gains of the inductor current inner loop and LED current outer loop controlled by DPCC can be obtained as shown in Formulas (33) and (34): The bandwidth of the inductor current inner loop is generally designed to be very wide, i.e., ω ω ci L ,hence T i L (z)/(1 + T i L (z)) ≈ 1. Then the gain of the outer loop can be approximated as shown in Formula (35): Then, the gain of the LED current outer loop before correction can be approximated as shown in Formula (36): The LED current outer loop compensator can be easily designed based on this loop gain. The traditional digital PI algorithm will be used for the subsequent simulations and experiments.

IV. PERFORMANCE ANALYSIS OF DIGITAL PREDICTIVE CURRENT MODE CONTROL
In this part, MATLAB simulations and experiments will be used to verify the effectiveness of the DPCC algorithms. 220V/50Hz AC powers the experimental circuit and is converted to DC voltage by boost-PFC to supply AHB LED constant-current driver. We selected the LED Hybrid module consisting of 3 × 14 lamp beads as the load, and the lamp beads are XP-G2 R5 from CREE. The relevant parameters of the AHB LED constant-current driver are shown in Table 1.
In addition, to expand the adjustment range of the DPCC algorithms, engineering methods of coefficient correction are used in simulations and experiments. Finally, the actual VOLUME 10, 2022  predictive control algorithm is shown in formula (37): where α is the correction coefficient, and for the DPqACC algorithm, the relationship between α and LED reference current is shown in Equation (38). The subsequent simulations and experiments will further illustrate the effectiveness of this engineering treatment method.  Figures 9 and 10 show the waveforms obtained when the total output current is 4.5 A and 0.9 A, respectively. The three DPCC algorithms are demonstrated to be of good stability when applied to the AHB LED constant-current driver. At the same time, it can be seen that the maximum ripple is 0.004 A (0.09%) when the average output current is 4.5 A, while the maximum ripple is 0.0045 A (0.5%) when the average output current is 0.9 A. The calculation results show that the relative ripple value of 0.9 A output is more than five times that of 4.5 A output. In other words, as the setting current decreases, the stability of the converter becomes worse, which is also in line with the essential characteristics of the DC-DC converter. In addition, by comparing the corresponding inductor current waveforms of the two outputs, we can find that both Q 1 and Q 2 can achieve ZVS conduction when the output is 4.5 A. However, when the output is 0.9 A, Q 2 can achieve ZVS conduction while Q 1 works in the hard switching state, which further verifies that the ZVS range of the AHB converter is very narrow.

B. ANALYSIS OF TRANSIENT CHARACTERISTIC
The transient analysis will be carried out from load mutation and dimming. For LED hybrid modules, load mutations may be caused by the LED string's broken circuit fault or the lamp bead's short circuit fault. When part of the LED lamp beads is damaged, the bypass voltage regulator diodes will conduct in reverse, thus causing a series-load-jump. Figures  11 and 12 show the waveforms for the 25% series-load-jump caused by a short circuit fault. During the 4.5 A operation, the longest transition time is 1.2 ms, and U LED = 12V, the load adjustment rate is less than 0.01%, while during the 0.9 A process, the longest transition time is less than 1.3 ms, and U LED = 2.4V, the load adjustment rate is less than 0.015%. In these situations, however, the capacitor voltage mutation will induce a significant overshoot, up to 33%, at both operating points. The overshoot can be reduced by increasing the filter inductance or lowering the filter capacitance. Based on this, further research can be carried out on the low-ripple constant-current driver without electrolytic capacitor.
On the other hand, a parallel-load-jump occurs when some LED strings are cut off. Figures 13 and 14 show the waveforms obtained when the LED load is mutated from three strings to two strings and then to one. As can be seen from the figures, the AHB LED constant-current driver can quickly recover the LED string current to the reference value when controlled by the three DPCC algorithms. When the setting string current is 1.5 A, the transition time is less than 1.2 ms, and the maximum overshoot is 0.87%, while when the setting string current is 0.3 A, the longest transition time is 1.7 ms, and the maximum overshoot is 2.3%. It can be observed that since the capacitor voltage is not mutated, the overshoot caused by the parallel-load-jump is much smaller in comparison with that caused by the lamp beads shortened.
The dimming characteristics are shown in Figures 15 and  16, and 20% of the rated output is set as the adjustment gradient. As can be seen from the figures, all three DPCC algorithms are of excellent dimming characteristics. Additionally, compared with the algorithms of DPqVCC, and DPPCC, when the DPqACC algorithm is used to control the AHB LED constant-current drivers, the transition times are all relatively shorter, with the shortest being 0.45 ms. Figure 17 shows the   comparison made among the dimming waveforms of the three DPCC algorithms. As shown in the figure, when controlled by the DPqACC algorithm, the LED current transitions from 4.5 A to 3.6 A without overshoot and with a transition time of 1 ms, and when the LED current jumps from 3.6 A to 2.7 A, the transition time is 0.6 ms with an overshoot of 0.7%. These results further verify the conclusion made by Professor Byungcho Choi that among the three CMC control strategies, the average current mode control algorithm has better control performance [14]. Figure 18 is the waveform comparison chart of the AHB LED constant-current drivers when controlled by DPqACC and digital PI ACC. When the digital PI ACC is used to control the AHB LED constant current drivers, the maximum overshoots for series-load-jump, parallel-load-jump, and dimming control are 33%, 7.3%, and 17.4%, respectively, and the shortest transition times are 2.8 ms, 2.3 ms, and 2.5 ms, respectively. As can be seen from the figures, the steady-state characteristics and transient characteristics of the AHB LED constant-current drivers controlled with the use of the DPqACC algorithm are significantly improved. The results further validate the effectiveness of the digital predictive control algorithms, which can effectively offset the influence of the digital loop delay on the control performance of the AHB LED constant-current drivers.

C. LOW-FREQUENCY RIPPLE COMPENSATION CHARACTERISTICS
For the Boost-AHB LED constant-current driver, a large amount of low-frequency ripple voltage will be injected into the AHB with a low-capacity thin-film capacitor used as bus capacitance. Furthermore, it is assumed that the peak-to-peak value of the low-frequency secondary ripple of the boost-PFC output (AHB input) voltage is 106 V (26.5%) and that the AHB output average current is set to be 4 A. Figure 19 shows the output current waveforms of the AHB LED constant-current driver controlled by the DPCC algorithms without the presence of additional ripple compensation. With the control of DPqACC, DPqVCC, and DPPCC, the corresponding low-frequency secondary ripple current peak-to-peak values are 0.1136 A(2.84%), 0.1163 A(2.91%), and 0.1149 A(2.87%), respectively, and the THD below 3000 Hz is 1.34%, 1.37%, and 1.19%, respectively as shown in Figure 20. The proposed DPCC algorithms have a favorable low-frequency ripple compensation effect due to the action of the fast regulation with the inductance current predictive controller. Therefore, this approach provides an excellent solution for the digital design of low-ripple AC-DC LED constant-current drivers without electrolytic capacitance.

D. EXPERIMENTAL VERIFICATION
The parameters of the experimental circuit are given in Table 1, and the output waveforms of the AHB LED constant-current driver under DPqACC control are shown in Figure 21, Figure 22, and Figure 23. Figure 21 and Figure 22 show the output waveforms for a series-load-jump. As shown in Figure 21 (a), when the stable output of the AHB LED constant current driver is 4.5 A, we short-circuit part of the LED lamp beads. After 1.6 ms, the driver transitions to the new steady state, the output voltage is lowered by 5 V, and the average LED current is raised from 4.5 A to 4.57 A, with a load adjustment rate of 0.31%. As shown in Figure 21 (b), when some LED beads are short-connected, and the output average LED current is stable at 4.5 A, the short-connected beads are connected instantaneously as load. After 2.2 ms, the output voltage is increased by 5 V, and the average LED current is reduced from 4.5 A to 4.48 A, with the load adjustment rate being 0.09%. Similarly, when we set the average output current of the driver as 0.9 A, as shown in Figure 22, the transition time of short-circuiting a part of LED lamp beads and the transition time of connecting short-circuit beads into the load are 1.6 ms and 4.5 ms, respectively. The load adjustment rates are 0.5% and 0.2%, respectively. At the same time, it can be seen that for current fluctuation caused by series-load-jump, there will be a substantial overshoot in the transition process, which will be studied in the ripple compensation control algorithm without the electrolytic capacitor. Figure 23 shows the experimental waveform during dimming. It can be seen that the LED current can quickly transition to the following steady state, regardless of whether it is up-or down-regulated, with a transition time of less than 1 ms. When the output current is large, the overshoots in the dimming process are relatively large, but the maximum overshoot is less than 2%. The experimental results show that the DPqACC-controlled AHB LED constant current driver has excellent output characteristics and can provide highquality drive current for LED.

V. CONCLUSION
In this paper, we first present a simplified estimation method to address the duty cycle loss time of the AHB converter based on the characteristic analysis of i p . With the application of this estimation method, DPPCC, DPqVCC, and DPqACC algorithms based on leading-edge, trialing-edge, and doubleedge modulation are derived. Simulations and experiments demonstrate that the three DPCC algorithms can effectively offset the effects of the delay on the digital control performance, and the superiority of the DPqACC is confirmed. Moreover, all three DPCC algorithms can compensate for low-frequency ripples due to the rapid regulation speed of the inner loop. This approach provides an excellent solution for the digital design of low-ripple AC-DC LED constant-current drivers without electrolytic capacitance.
ZHIYONG QIAO was born in 1978. He received the M.S. degree in control theory and control engineering from Xinjiang University, Ürümqi, China, in 2008. He is currently pursuing the Ph.D. degree with the Graduate School, Southwest University of Science and Technology, Mianyang. He is also an Associate Professor with the Department of Information Engineering, Mianyang Polytechnic, Mianyang. His current research interests include power electronics conversion technology, embedded system design, and digital control technology.
SHUNLI WANG was born in 1985. He is a Master Tutor, the Young Scholar, a Leading Expert on new energy research, the DTlab Head, a New Energy Measurement and Control Research Team Leader. Measurement and Control Processing is conducted on the needs of high power Li-ion battery field for its modeling and state estimation strategy. More than 40 projects and 20 patents have been undertaken, publishing over 60 articles on world famous journals, such as Journal of Power Sources. He received the 20 awards, named as the Science and Technology Progress Award and the University and Enterprise Innovation Talent Team. Multiple generation systems have been developed for battery packs, improving the aircraft reliability, and expanding its application fields with significant social and economic benefits.
LIMEI ZHAO was born in 1969. She is an Associate Professor. She is mainly engaged in computer science and technology research.
CHUANG LI was born in 1972. He is a Professor. He is mainly engaged in signal detection and processing research.
NAN ZHANG was born in 1971. He received the bachelor's degree. He is a Senior Engineer. He is mainly engaged in the research of special power converter.
ZHIGUI LIU was born in 1966. He is currently the Doctoral Supervisor with the School of Information Engineering, Southwest University of Science and Technology. His research interests include control theory and control engineering.