Cryogenically-Cooled Power Electronics for Long-Distance Aircraft

New aerodynamic aircraft concepts enable the storage of volumetric liquid hydrogen (LH2). Additionally, the low temperatures of LH2 allow technologies such as the superconductivity of electrical components. An increased power density of the onboard wiring harness and the electrical machine can be expected. Nevertheless, the power electronic drive inverter has to deliver high power and high switching frequencies (<inline-formula> <tex-math notation="LaTeX">$f_{\mathrm {PWM}}\text{s}$ </tex-math></inline-formula>) under challenging conditions. Therefore, knowledge of the electric behaviour of different semiconductor materials under cryogenic temperatures is essential to answer the question: “Are modern power electronics a technology enabler or a system bottleneck?” This publication shows a comprehensive novelty study for cryogenic power electronics based on experimental-driven semiconductor investigations, mission profile-based considerations, requirement analyses of superconducting electrical machines, and studies of the cooling concepts. All aspects are discussed within one interdisciplinary publication. A cryogenic system cannot be considered without a feasible cooling concept. Different semiconductor structures based on various materials (silicon (Si), silicon carbide (SiC) and gallium nitride (GaN)) are evaluated for their suitability. The collected data and the literature review draw a technology feasibility studies supported by detailed cooling system analyses and superconducting electrical machine requirements. The power demand and high <inline-formula> <tex-math notation="LaTeX">$f_{\mathrm {PWM}}$ </tex-math></inline-formula> lead to a SiC non-cryogenic inverter approach. Due to the detailed cooling system assessment, a loss reduction is achieved by optimising the junction temperature (<inline-formula> <tex-math notation="LaTeX">$T_{\mathrm {J}}$ </tex-math></inline-formula>) under various load cases (LCs) out of the mission profile.

number of channels for each medium P C compressor power P in added electrical power P L power losses P L,Amb boiling losses P L,Bb power losses backbone P L,C conductive-dependent power losses P L,Ch power losses per channel P L,Chip power losses per chip P L,Con power losses DC/DC converter P L,EM power losses per electrical machine P LH2 H 2 power P L,HB power losses per half-bridge P L,Inv power losses per inverter P L,S frequency-dependent power losses P L,Switch power losses per switch

I. INTRODUCTION
The worldwide transportation sector produced over 16.2 % of greenhouse gases in 2016. Before 2020, civil aviation accounted for around 1.9 % of global traffic, although only 10 % of the world's population has access to air travel. A further traffic increase is expected after the pandemic, mainly due to further economic development in Asia [1,]. However, the harmful carbon dioxide (CO 2 ) emissions caused by humans must be reduced to limit climate change. The provision of sustainable energy generation and the efficiency from energy production to consumption are crucial.
Several technical solutions meet the specified goals with high and low technology readiness levels to overcome our transportation challenge. Technical solutions have been discussed that promise to meet the stated goals. However, the degree of technology maturity varies greatly, so more detailed investigations are necessary.
Technologies for long-range rail and air transport compete under climate constraints. Within a continent, an improved train infrastructure can achieve higher efficiencies under high infrastructure costs, high material investments, and increased travel time as air traffic (t ≤ 2.5 h) [2].
Principally, high-speed intercontinental traffic could be possible with evacuated magnetic levitation trains. Nevertheless, this technology has substantial infrastructure costs and high material investment of up to 64 million dollars per kilometre, depending on the location [3,Page: 23]. Separately, new aerodynamics and drive train concepts could improve short-to long-range aircraft to an acceptable efficiency level to combine customer needs and environmentally friendly transportation [1]. The infrastructure requirements for air traffic are low and aviation has lower material investments than evacuated magnetic levitation [3,Page: 24]. Moreover, multiple power source opportunities exist to improve the sustainability of long-range aircraft, leading to different power trains. Synthetic fuel is a ''climate neutral'' energy source option generated from renewably-produced hydrogen (H 2 ) and CO 2 by Fischer-Tropsch-Synthesis or methanol pathway. A turbine generates thrust conventionally [4]. Synthetic fuels offer good gravimetric and volumetric energy densities, e.g., 19.9 MJ · kg −1 and 15.9 MJ · L −1 for Methanol [4], which is only half the size of jet fuel A1 with 43.2 MJ · kg −1 and 34.9 MJ · L −1 . A mixture of H 2 and Ammonia promises a further increase [4,Page: 18]. The upper path in Fig. 1 illustrates the production-to-thrust efficiency potentials of e-fuel VOLUME 10, 2022 combustion with a worst case of 12 % up to the best value of 26 %. The power-to-liquid efficiency with high-temperature electrolysis is given by 45 % (source: air) and up to 63 % (source: biogas) [5,Page: 17]. Today's gas turbines reach up to 40 % overall efficiency (a combination of propulsive and thermodynamic efficiency) [6,Page: 37]. Thereby, the propulsive efficiency of the turbine is over 75 %, and the thermodynamic efficiency is about 55 %. Further developments predict a yearly thermodynamic efficiency increase of 0.4 % [6,Page: 37].

A. COMPARISON OF SUSTAINABLE PROPULSION CONCEPTS FOR LONG-DISTANCE AIRCRAFT
Another energy source opportunity is to use H 2 as energy source. Compressed H 2 gaseous (700 bar) has excellent gravimetric of 120 MJ · kg −1 (lower heating value (LHV)) but lower volumetric energy densities 5.6 MJ · L −1 [7, Page: 1]. Nevertheless, liquefaction can nearly double the volumetric energy density of 10.1 MJ · L −1 [8].
It is also possible to burn H 2 in a turbine conventionally or use it in a fuel cell system [8]. Thus, the National Aeronautics and Space Administration (NASA) works on the turboelectric hybrid blended wing body (BWB) concept N3-X. This approach uses two superconducting turbo-generators at the wingtips to produce electricity. After-fans with superconducting electrical machines fed by power electronics generate the thrust [9].
In this suggested approach, a fuel cell reduces the impact of burned H 2 at high flight altitude (h). There are statements that the H 2 O out of a fuel cell has less climate impact because of its short life at high altitudes [10,Page: 12]. Moreover, the lower pathway in Fig. 1 illustrates the fuel cell approach's production-to-thrust efficiency potentials, which could improve the overall average efficiency chain. Moreover, this approach reduces noise and nitrogen oxide (NO x ) during taking off and landing. Production efficiencies of H 2 from 80 % up to 90 % in high-temperature electrolysis are reached, but 35 % of the stored energy has to be used to liquefy to cryogenic temperatures to reach acceptable volumetric densities [8]. The proton-exchange membrane (PEM) fuel cell systems allow efficiencies from 50 % to 60 % [8,Page: 13]. Additionally, cryogenic temperatures enable using superconducting components in the drive train.
This suggested fuel cell cryogenic drive train approach has a lot of technical challenges and requires fundamental research on: • H 2 transport and renewable production • Lightweight storage of LH 2

Cooling of superconducting and non-superconducting components
The drive inverter is one crucial electrical component. It must deliver high power and f PWM under challenging conditions. Are the power electronics a bottleneck of this fuel-cell driven cryogenic drive train for a long-distance aircraft or not? It is essential to answer this question by considering system aspects, semiconductor material behaviours and the inverter's heat sink design. A few excellent studies focus on cryogenic drive train analyses, semiconductor material investigations under cryogenic media, or inverter design with nitrogen (N) cooling considerations.

B. SCIENTIFIC CONTRIBUTION
A holistic system approach for a turboelectric short-range passenger aircraft is discussed in [12]. This publication analyses turboelectric propulsion's electromagnetics, thermic and mechanics system interactions. The cryogenic cooling system of a superconducting aircraft propulsion system is modelled in [13]. On the power electronic component level, there are two suggestions for a turboelectric inverter design with cooling considerations. A scaled cryogenic 44 kW Si-active neutral point clamped (ANPC) inverter design with liquid and gaseous N is presented in [14]. Otherwise, the non-cryogenic inverter approach is based on the SiC-ANPC inverter. A MW non-cryogenic SiC inverter design with liquid and gaseous N cooling considerations is outlined in [15]. Moreover, the first cooling evaluation results based on gaseous and liquid nitrogen (LN 2 ) are presented in [16]. Other cryogenic power electronic inverter designs in the literature have lower power ratings without cooling considerations. On the semiconductor level, a few studies on the measurement of semiconductor materials in the cryogenic working environment exist. These studies usually focus on one semiconductor material and analyse the physical mechanisms. This contribution is based on requirement-oriented comprehensive analyses for cryogenic-cooled power electronics for long-distance aircraft, from system analyses to semiconductor experimental investigations to final cryogenic inverter design with cooling considerations. The design of high-power cryogenic electrical components strongly depends on the cooling system. Therefore, a cryogenic analysis of a power-dense drive inverter for a fuel-cell-driven aircraft without cooling analyses on component and system levels is not feasible. The mission profile from a fuel-celldriven long-distance aircraft shows the challenges posed by the widely differing LCs. Recently, H 2 direct cooling and helium (He) indirect cooling have been discussed. Due to the different LCs and associated fuel cell mass flows, challenging cooling capabilities are available to the superconducting components. Moreover, the superconducting tape inside the electrical machine requires a current with minor total harmonic distortion (THD), leading to high f PWM . These mentioned top-level requirements are challenging for the inverter design. A possible configuration is discussed out of semiconductor loss experiments considering all semiconductor materials. With the help of a scalable semiconductor model, initial predictions can be made because widebandgap (WBG) semiconductors are not yet available in this power range. The cooling of the half-bridge uses the cold H 2 mass flow (ṁ H2 ) as heat sink and is evaluated for both cooling configurations. Besides the comprehensive study of power electronic elements under low temperatures, this paper presents an interdisciplinary and comprehensive feasibility analysis of the power electronics for a cryogenic power train of a long-distance aircraft.

C. PAPER's STRUCTURE
The paper starts with a description of the system level to define component boundaries, followed by an experimental investigation of the semiconductor device level to investigate the material's cryogenic behaviour and ends with the power electronic component design with detailed cooling considerations. Moreover, section II presents the opportunity to reduce hysteresis loss per cycle (Q) of superconducting electrical machines by increasing the inverter f PWM . All these challenges and requirements are taken into account in section III. Section II explains the electrical and cooling system, which influences the design of a cryogenic power electronic drive train inverter. Significantly, the analyses consider two cooling concepts based on a direct and indirect cryogenic cooling approach. Section III contains a comprehensive literature review of semiconductor investigations under cryogenic temperatures, the methodology of experimental investigation, a self-developed cryogenic double pulse testbench, an evaluation of experimental results and a comparison of semiconductor materials' suitability for cryogenic aircraft drive trains. Based on section III, the suitability of semiconductor materials, a cryogenic power inverter design with detailed cooling considerations is discussed in section IV. The optimal T J can increase the inverter efficiency. Therefore, a detailed heat sink design and experimental investigations allow evaluating the influence of different LCs. Finally, section V concludes all gained insights and suggests preferred perspectives.

II. CRYOGENIC DRIVE TRAIN SYSTEM ANALYSES
This section discusses the boundary conditions for the electro-thermal design of a power electronic inverter for a long-distance aircraft driven by a cryogenic drive train. Aircraft design influences the power ranges of electrical components and the available coolingṁ H2 from the fuel cell system. Two cooling system concepts are analysed in detail to prove their suitability for a cryogenic drive inverter. The design of the superconducting electrical machine is challenging and possesses some inverter requirements. In particular, the loss mechanism in superconducting materials requires high f PWM s. A finite element method (FEM)-based evaluation indicates loss reduction opportunities introduced by Q. These analysed system-level requirements affect the choice of power electronic topologies and semiconductor material. Fig. 2 shows the calculated mission profile of Sustainable and Energy-Efficient Aviation (SE 2 A) long-distance aircraft.

A. AIRCRAFT DESIGN SPECIFICATIONS
In the future, emission-free long-distance commercial aircraft will have to use the synergies between distributed electric drives and aerodynamic improvements fully utilised to FIGURE 2. Mission profile of a long-distance aircraft based on data from SE 2 A. VOLUME 10, 2022 save energy, as proposed in [17]. The study [18] illustrates the multi-fidelity design optimisation of the long-range BWB in the SE 2 A consortium. Aerodynamics improvements could reach higher fuel efficiencies. Some new air-frame technologies are used, for example, active flow control, active load alleviation, body layer ingestion (BLI), new materials, and structure concepts. Superconducting concepts yield novel weight-saving ideas and could allow the usage of a fuel cell system with an increased power density. Aircraft design offers space for volumetric cryotanks because of LH 2 poor volumetric energy density, as mentioned in the introduction. A mission profile is calculated using the optimisation methodology like [18]. Four LCs with their mechanical shaft power (P Shaft ) specifications are sufficient to study the system's feasibility.

B. ELECTRICAL SYSTEM
Tab. 1 summarises the mission profile in four LCs to define specifications for the design of the drive inverter. Twelve superconducting electrical drives powered by a highly efficient fuel cell supplied with H 2 from cryotanks will be used for propulsion. The critical LC will be the peak power (LC1) because of its losses. The time of the climb phase is too long to operate the power train in an overload strategy, as used in the automotive industry to increase the power density of electrical components [19]. A further challenging LC is the cruise (LC3) because this has the longest operation time of more than 700 min. Therefore, the electrical power train has to deal with peak power and shows good efficiencies at partial loads, such as cruise. These power requirements could be fulfilled with high currents and HVs.

1) CRYOGENIC MEDIA's BREAKTHROUGH BEHAVIOUR
Cryogenic media's breakthrough behaviour determines the voltage level choice influenced by the insulation coordination. Reliable statements on the breakdown behaviour of cryogenic media require knowledge about the physical state, temperature behaviour, field formation and the kind of electrical field (alternating current (AC), direct current (DC), pulsed, fast-changing).
The Paschen law can describe gaseous media, but the physical phase change can be challenging. The breakdown behaviour of LN 2 is investigated in [20]. The publication [21] presents an investigation of He in liquid and gaseous states. The boiling point and different electrode formations are discussed in detail -the breakdown voltage capability increases at lower temperatures. Gaseous He possesses a worse electrical breakdown than gaseous H 2 [22,Page: 576]. liquid helium (LHe) also has a worse breakdown behaviour than LH 2 [22,Page: 579]. Therefore, the cooling system also impacts the insulation coordination of the electrical system and the power electronic design.
The inverter leg current level is defined by the switched DC voltage (V DC ), P Shaft and the electrical machine's phase number (m).

2) MULTI-PHASE SUPERCONDUCTING ELECTRICAL MACHINE
The design of the electrical machine possesses advantages in increasing the fault tolerance and lowering the RMS phase current (I s ) by using a multi-phase electrical machine.
A multi-phase machine can increase fault tolerance with a field-oriented control algorithm [23,Page: 31]. In a case of a single fault (for example, a single semiconductor failure) in one three-phase system of the 3 × 3 machine (I), the single drive train can still deliver 2/3 of its nominal power. The other eleven drives give their full nominal power and are not affected by the fault in the superconducting machine (I).
Reducing the I s by increasing the m also reduces the leg current of the inverter. Another essential parameter is the desired inverter f PWM , which strongly impacts the frequencydependent power losses (P L,S ) of the inverter and the cooling design. A detailed look at the loss mechanism of the superconducting machine, which the f PWM can influence, is essential.

3) REDUCING SUPERCONDUCTING MACHINE LOSS MECHANISM BY INCREASING THE SWITCHING FREQUENCY
Superconducting electrical machines require a rotating magnetic field. It is essential to understand the loss mechanisms in superconductors to operate them with a required AC current. The most challenging in the design process of superconducting electrical machines is preventing losses because a huge power density is needed. Additionally, high magnetic fields exist, insulation coordination has to avoid arcing, mechanical wire construction faces forces, and cooling design must guarantee low temperatures.
The loss mechanism in superconductors is very complex and depends on several parameters, and analytical approaches are not accurate. The publication [24] discusses the analytical formulae for AC loss calculation and suggests a calorimetric loss evaluation with FEM-based analyses. Moreover, the publication [24, presents some strategies to avoid AC losses, for example, filamentation of high-temperature superconductors (HTS), roebel arrangements, flux diverters and windings techniques.
Own FEM-based analysis shows the influence of f PWM on the power losses (P L ) of the superconducting electrical machine. The superconductors of machine stators are investigated. These are fed with AC currents at stator frequency (f s ) of up to 266 Hz. The calculations use a δ = 3 mm wide rare-earth barium copper oxide (ReBCO)-tape with a critical current (I c ) of 130 A at 77 K. These tapes are stacked inside the air gap. When operating the superconductor at the fundamental frequency and exposing the tape to a perpendicular outer magnetic field (B ext ) of 0.3 T, the current distribution in the tape depends on time (t) and f s . A current density distribution (J ⊥ ) over the width of the superconductive tape (w) and the t is shown in Fig. 3. The J ⊥ increases at the edge of the tape, which is a transient occurrence. An ideal loss-minimised situation for the superconductor would be a sinusoidal current. As a real-world superconducting aviation drive will be inverter-supplied, current ripples are superimposed on the transport current. The following diagrams in Fig. 4 show dominant ripple spectrums of a 5.4 MW HTS-drive for inverter f PWM of 10 kHz, resp. 20 kHz. Fig. 4 illustrates the investigated nth RMS harmonic of the phase current (I ν,s ) for superconductive material transport and loss evaluation.
The results originate from a circuit simulation with a partial machine (one three-system of nine-phase) without a winding coupling. There is not yet a complete model of the electric machine.
For a given oscillating transport current (I t ), Q (in J · m −1 ) can be determined with a formula for an infinite tape stack, initially formulated by Mawatari [25]: · ln cosh 2 (π · w/L y ) cosh 2 (π · i 0 · w · s/L y ) − 1 ds (1) With Q c = µ 0 ·I 2 c /π and i 0 = I t /I c . i 0 is the ratio of the I t to I c . L y is the vertical distance between the tapes, and position (s) is half the w. The Q of an external oscillating magnetic field without a I t is being considered by a different formula [25]: With h 0 = π · H 0 /(J c · d), d is the thickness of the superconductor, H 0 is the amplitude of the oscillating external magnetic field. The amplitudes of the spectrum in Fig. 4 generate the following losses ( Fig. 5 and 6) using Eqns. 1 and 2.
A comparison of the P trans in Fig. 5 indicates a reduction in loss amplitudes. This reduction of P trans also relates to the   P mag in Fig. 6. Therefore, the total losses in this example are significantly reduced to 10 % of the 10 kHz values when applying the 20 kHz inverter f PWM . An increase in f PWM significantly reduces the losses of superconducting drives. Therefore, the superconductor needs a current with low THD. Additionally, superconducting machines tend to have a small inductance; a high f PWM is necessary to avoid undesired current harmonics. The fundamental f s must be minor, and the f PWM must be high to reduce the THD. The following Eqn. 3 expresses the THD.
A small THD is also reachable with massive filter efforts, but this technical opportunity increases the inverter's mass.
Pursuing only a high-current approach with a DC onboard voltage below 1 kV would lead to high inverter leg currents. The active semiconductor chip area increases with higher inverter currents; this leads to increased parasitic semiconductor output capacities. Those increased output capacities limit the inverter f PWM s. Nevertheless, the cryogenic behaviour could positively affect semiconductor's conductivity and switching behaviour.
It should be noticed that high f PWM s and high power demands lead to challenging inverter cooling requirements.
A further increase in power density can be achieved by optimising the electrical system level.

4) ELECTRICAL SYSTEM LEVEL OPTIMISATION
From the previous discussions of the electrical system level and the load, many possibilities for optimising the electrical system level open up. Many contradictory design parameters of the fuel cell, power electronics, the DC onboard superconducting wiring harness, and the superconducting electrical machine must be considered. Additionally, aircraft specifications, for example, the system fault tolerance or the electromagnetic compatibility, influence the system design further. A holistic multi-parameter system-level optimisation is required to find the best parameter set, as suggested by [12] for a short-range aircraft's cryogenic power train. First system-level optimisations have been made in the SE 2 A consortium based on a non-cryogenic short-range commuter [26].
In future design steps, an optimum has to be found by multi-parameter system analysis considering all electrical components for SE 2 A long-distance aircraft. System-level requirements affect the choice of power electronic topologies and semiconductor material. Some essential parameters are discussed and assumed for a non-optimised electrical design starting point. This study uses a DC onboard voltage of 3 kV. A 5.4 MW drive with nine phases, and three independent star points 3 × 3 requires a phase peak current (î s ) of 870 A by V DC = 3 kV. The f PWM should be higher than 10 kHz.

C. COOLING SYSTEM ANALYSES
The cooling system defines essential inverter design input parameters -two cryogenic cooling concepts are presented. The available cryogenicṁ H2 dependent on the power demand of the fuel cell system influences the power electronic's heat sink design and the operating T J . Four challenging LCs impact the cooling design.
The total power dissipation of the electrical drive components and a part of the fuel cell losses are used to bring the H 2 to the appropriate operating temperature of the fuel cell. Nevertheless, the aircraft design also requires an additional efficient cooling system of the fuel cell because the cooling capability of theṁ H2 is not enough. Moreover, increasing theṁ H2 to cool the fuel cell system leads to a volumetric tank. The temperature level of the fuel cell system and the efficiency has to increase.
These suggested cooling concepts for the superconducting components should also be considered in the holistic multi-parameter optimisation to identify the most promising weight-saving system topology.

1) DIRECT COOLING SYSTEM
As proposed in [12], the most straightforward cooling system uses the cold gas H 2 flow for the fuel cell supply to remove all the losses in the DC backbone, the superconducting machines, and the power electronics. Fig. 7 shows the direct cooling approach with the smallest number of components but preventing leakages is more challenging.
The directṁ H2 and the state of matter are essential parameters for the power electronic heat sink design.

2) INDIRECT COOLING SYSTEM
A spacious long-distance aircraft requires a comprehensive piping system with many flanges and seals, which implies the risk of inflammable H 2 gas leakage. A direct and short connection between the tank and fuel cell is proposed to minimise the risk of leakage [13]. An indirect cooling system   In this alternative concept, He is used as an inert cooling fluid in the cryocoolers. The RBCC technology, as presented in [13], is the most promising approach in the discussed temperature and power range. All electric drive components are coupled in parallel to the H 2 flow by heat exchangers and serve heat flow for warming up the H 2 for the fuel cell. The disadvantage of using cryocoolers and heat exchangers is an increase in the weight of the drive system, which has to be assessed in a complete system analysis.
The choice of semiconductors and their properties in low-temperature ranges determines whether to use a RBCC or not. For example, semiconductors with advantages in cryogenic temperature ranges probably require a RBCC.

3) CRYOGENIC MASS FLOW ESTIMATION
Evaluation theṁ H2 inserts essential cryogenic heat sink design parameters and clarifies the technical feasibility of using the cryogenic drive concept. The H 2 power input and theṁ H2 are calculated with assumed efficiencies, which also cover the partial load conditions of the electrical machine, inverter and wiring harness: Additionally, theṁ H2 of each propulsor is spread in parallel to the nine half-bridges of the inverter. Tab. 2 represents the requiredṁ H2 . These considerable low values in Tab. 2 are due to H 2 's high gravimetric energy density. The cruising and landing phase needs particular attention because of the long cruising time and the lowṁ H2 during landing. Moreover, theṁ H2 is only available if the plane is operating in flight mode. At the airport, a small separate supply of cooling gas is necessary to maintain the superconducting state of all cryogenic devices. The flight profile in Fig. 2 gives an energy consumption of the fuel cell of 3.24 TJ. This estimation yields a m LH2 of 27 t of LH 2 with the gravimetric energy density of H 2 . This m LH2 could be stored in one or several tanks with advanced super insulation as already used in industry and some automotive projects [19], [27] or as proposed in [28].
These tanks have a low weight but allow a typical maximum pressure of 4 to 5 bar before the boil-off valve opens. Moreover, the operating pressure is estimated to be two to three bars in flight. Valves and accessories technology are industry standards and can easily be upgraded for aircraft technology requirements. The gross volume of the LH 2 to be stored is approximately 380 m 3 (cubic tank; out line of 7.2 m).
The system analysis clarifies the challenges for the design of power electronics. A suitable semiconductor material will be selected based on comprehensive literature research and experimental investigation to fulfil the challenging system requirements. In particular, a loss-reducing operating T J recommendation can be drawn out from the experimental studies. The identifiedṁ H2 defines essential input data for the inverter heat sink design.

III. CRYOGENIC SEMICONDUCTOR BEHAVIOUR
Section discusses the state of the art, fundamentals of semiconductors under deep temperature, investigation methodology, cryogenic testbed design, the experimental procedure, and comparison of semiconductor's behaviour.
Power electronics can be a bottleneck of an electrified aircraft's comprehensive superconducting drive train design because of the switching semiconductor devices. The knowledge of the behaviour of semiconductors under cryogenic temperatures shows the feasibility of each material. This paper will discuss requirement-oriented designs with the understanding of several semiconductor devices. The superconducting drive train system needs high f PWM above 10 kHz, HV of 3 kV and high power ratings of 5.4 MW per drive, as mentioned in the previous section II. Therefore, it needs to be assessed which semiconductor device has advantages and disadvantages under cryogenic temperatures, and which semiconductor requirements must be taken into account to achieve an overall high performing concept.

A. STATE OF THE ART OF CRYOGENIC SEMICONDUCTOR RESEARCH AND FUNDAMENTALS
This subsection illustrates the state of the art in capturing the power semiconductor behaviour under cryogenic temperatures, but there are also some interesting overall discussions on cryogenic power electronics. Two papers give a general overview of the topic [29], [30]. A further publication [31] describes the design of a cryogenic power electronic fed DC motor and the paper [32] illustrates a loss evaluation of a cryogenic DC/DC-converter. Also, strategies to improve the performance of cryogenic power electronics are given in article [33]. Publication [34] describes the semiconductor physics for Si-based devices (switches and diodes) under cryogenic conditions mathematically, presents an excellent overview and illustrates some optimisations in the design of semiconductor devices for cryogenic applications.

1) LITERATURE REVIEW ON DEVICE LEVEL
Tab. 3 below is separated into different materials, technologies, voltage ratings and publications. Unfortunately, the T J (also the test temperature) could not be included in the table because the temperature ranges varied greatly in the individual experiments.
There are a lot of semiconductor materials, such as Si, SiC and GaN. Especially, WBGs offer the potential to reach high-required power densities under normal conditions. Also, semiconductor architectures and structures provide different advantages and disadvantages. For example, insulated gate bipolar transistors (IGBTs) have advantages in short current capabilities compared to SiC Metal-oxidesemiconductor field-effect transistors (MOSFETs) under normal conditions [35]. As superjunction and trench gate, these arrangements decrease the on-resistance (R on ) at high blocking voltage capabilities.
Moreover, the development of GaN led to the use of structures, like high-electron-mobility transistors (HEMTs) and Cascodes, due to their self-conducting properties.
The packaging addresses different power and frequency ranges, such as discrete devices, modules, and press-pack. Therefore, the state of the art study has to summarise several investigations of different devices. The literature review keywords are cryogenic, Si, SiC, GaN, IGBT, MOS-FET, superjuntion, trenchgate, HEMT, Cascode, physical behaviour in cryogenic temperatures, static and dynamic behaviour or characteristics, blocking voltages (≤650 V, 1200 V,1700 V,4500 V) and cryogenic power electronics.
The device under test (DUT) in the publications mentioned are directly cooled using a cryogenic chamber, and this publication makes an overall comparison and discusses different design ideas to achieve the best practice.

2) KEY PROPERTIES OF SEMICONDUCTORS
The behaviour of semiconductors is dependent on several key properties, such as the band-gap (between the conduction band and valence band), intrinsic carrier concentration (the density of electron/holes in pure silicon), carrier mobility (the drift velocity of carriers is proportional to the electrical field), carrier lifetime and impact ionisation [34,. These temperature-dependent parameters influence semiconductor behaviour under cryogenic conditions. The most characteristic effect is the so-called carrier freeze-out, occurring at temperatures below 77 K in Si-based semiconductors. Nevertheless, carrier freeze-out is a complex mechanism and can be explained due to donor and acceptor energies.
With a temperature (T J ≤77 K), donor and acceptor energies become removed from the respective band edges. This carrier freeze-out effect is also dependent on doping levels [58, Page: 1067]. The article [59] proved in 1986, for the first time, carrier freeze-out by donor level measurements. Also, the publication [34,Page: 15] states that carrier freeze-out is only observable under a temperature of 77 K for high (> 8 · 10 18 cm −3 ) and very low (< 3 · 10 16 cm −3 ) doping levels in Si-based semiconductors.

3) CRYOGENIC BEHAVIOUR OF DIODES
Si-based diodes (ultrafast and superfast) offer a better electrical behaviour in cryogenic conditions than SiC-based Schottky diodes. The R F , reverse recovery charge (Q rr ) and the breakdown voltage (V Break ) decrease. Only in the property of V Break the SiC-diode shows better behaviour. Even the Q rr is significantly reduced in Si-based diodes as the temperature drops [31, Pages: 5-6] [36, Page: 3].
In Si-P-i-N diodes, the intrinsic carrier concentration reduces to lower temperatures; therefore, the zero forward voltage drop (V F0 ) increases and the R F decreases at cryogenic temperatures [34,Page: 38]. Also, Si-diodes offer a lowering Q rr due to the intrinsic carrier concentration. The mathematical model in the publication [34, proves the ratio of intrinsic carrier concentrations in highly versus lightly doped areas leads to a decrease of the charge in the middle region. The blocking capability falls in combination with lower temperatures mentioned effective impact ionisation.
The best property of Si Schottky diodes is the increasing blocking ability to lower temperatures [34,Page: 36]. The R F shows excellent characteristics because of the increased electron mobility (25 times increase from 300 K to 77 K). Otherwise, the V F0 increases due to two competing temperature mechanisms. There is a decrease in the thermal voltage and a reduction in the saturation current density [34,Page: 27].

4) CRYOGENIC BEHAVIOUR OF Si-BASED MOSFETs
The literature review illustrates that Si-MOSFETs switches offer reduced R DS,on due to the increased carrier mobility (electron mobility and hole mobility) over decreasing cryogenic temperature (to 77 K≤T J ) [34]. Additionally, cryogenic temperatures decrease blocking voltage, slightly increase threshold voltage (V Th ), and reduce minor turn-on energy loss per pulse (E on ) and turn-off energy loss per pulse (E off ).
At lower temperatures than 100 K, R DS,on increases due to the carrier freeze-out [34,Page: 67]. Moreover, the fall of the blocking capability is due to a higher average carrier speed, which leads to more effective impact ionisation [34,Page: 24]. The decreased intrinsic carrier concentration under cryogenic temperatures leads to a slightly increased V Th [34,Page: 71].
Another interesting fact is the behaviour of different device structures under cryogenic temperatures. Publication [39] compares different device structures with each other.
A HEXFET ® , MDmesh™and a CoolMOS™MOSFET are compared. The doping level affects the behaviour remarkably, as also mentioned above. Additionally, publication [39, Page: 2012] states that every semiconductor has its characteristics under cryogenic behaviour. However, the trends in R DS,on , V Break , V Th and switching are nearly similar to other Si-based MOSFETs.

5) CRYOGENIC BEHAVIOUR OF Si-IGBTs
The IGBT combines the advantages of easy control and the enormous current carrier capability due to its internal device structure. Therefore, the properties of Si-MOSFETs and a bipolar transistor are merged in one device. Under low-temperature conditions, the V Th behaviour is similar to Si-MOSFETs. The effect is explainable due to the reduced intrinsic carrier concentration [34,Page: 89] [41, Page: 1901].
Otherwise, the collector-to-emitter resistance (R CE ) properties, zero collector-to-emitter voltage (V CE0 ), V Break characteristics and switching behaviour are related to bipolar transistors. Cryogenic temperatures lead to reduced R CE and increased V CE0 due to reduced intrinsic carrier concentration. The device is also affected by carrier freeze-out at temperatures under 77 K. Moreover, the blocking voltage decreases due to impact ionisation. An advantage are the reduced E on and E off [34,Page: 92]. In particular, E off becomes minimal under cryogenic conditions. It can be described by the fact that the recombination current is proportional to the inherent bipolar transistor current gain β. The current gain β decreases by decreasing operating temperature due to the reduction in the lifetime of the minority carrier [34,. A paper [45, Pages: 3-9] emphasises the opportunities of press-packs under cryogenic conditions and includes studies of switching characteristics for megawatt-scale Si-IGBTs.

6) CRYOGENIC BEHAVIOUR OF SiC-MOSFETs
SiC-devices have a highly increased R DS,on due to carrier freeze-out [46, Page: 779] already from 230 K, slightly reduced V Break , an increased V Th and nearly constant switching energy losses. The fallen V Break is also related to the impact ionisation which is degraded [49,Page: 4]. Moreover, publication [47, illustrates the influence of large densities of interface states at the SiO 2 /SiC interface on the V Th . Also, the publication [47, Pages: 209] represents another reason for the increased R DS,on under cryogenic conditions (consisting of residual resistance and channel resistance); the dominant mechanism in the channel resistance is the increase in the density of trapped electrons due to lower temperatures in the channel. The residual resistance is prevalent from 300 K to higher temperatures. Otherwise, the channel resistance is dominant in lower temperatures smaller than 300 K.

7) CRYOGENIC BEHAVIOUR OF GaN-HEMT OR GaN CASCODE
The literature review illustrates some exciting investigations of GaN-semiconductors. GaN-HEMTs are complex transistors, which have lateral structures compared to conventional power semiconductors. Compared to Si-and SiC-field-effect transistors, the R DS,on and breakthrough behaviour under cryogenic conditions is more complicated due to more dependent parameters.
GaN semiconductors have a different structure and physical function than conventional semiconductors. Thus, a few explanations about physical mode of operation are helpful for understanding cryogenic behaviour. The highly doped and non-doped layer interface leads to a two-dimensional electron gas (2DEG). Inside the 2DEG, electron mobility is very high. The layers can be composed of different material combinations; often used materials are n-high doped aluminium gallium arsenide (AlGaAs) and non-doped gallium arsenide (GaAs). Moreover, the interface design between high and non-doped layers, gate structure, and electrical interfaces are challenging. Also, a SiC-substrate can improve thermal conductivity. There are two kinds of HEMTs, a normally-off enhancement-mode HEMT (E-HEMT) and a normally-on depletion-mode HEMT (D-HEMT) [60].
The E-HEMT offers the desired control characteristics for most applications. Therefore, a Cascode device structure combines the D-HEMT with a Si-low-voltage MOSFET. There are a lot of advantages and disadvantages comparing the E-HEMT and Cascode [60].
E-HEMTs have a gate modulation layer (p-Schottky or p-ohmic) to ensure the normally-off mode, and there is not a typical bipolar junction body diode. But by self-biasing due to the drain-source voltage (v DS ), reverse conduction is possible. Otherwise, the gate driver can also drive the semiconductor in reverse conduction mode due to the gate signal. Therefore, the HEMTs conduct in both ways without Q rr . Due to the lateral design, the gate-drain and drain-source capacity are smaller than vertical power MOSFETs, leading to more favourable switching behaviour [60] [61,Page: 3].
Thus, the breakthrough mechanism is complex due to the lateral structure. There are the source-drain mechanism (punch-through of electrons injected from source), gate-drain breakdown (high gate-leakage current), vertical breakthrough (poor compensation of the buffer layer) and the impact ionisation (generated holes lead to a decrease of the barrier) [62,Page: 6].
E-HEMTs offer reduced static R DS,on , constant V Th and reduced switching energy losses under cryogenic conditions [50], [51] [53], [54] [56]. Carrier freeze-out as a limitation could not be observed in the publication [54,Page: 7413]. But there are some issues on dynamic drain-to-source resistance (R DS,on,dyn ) due to the current collapse effect [52]. The publication [52, Page: 3292] marks a temperature dependency of the current collapse. The study analyses the dynamic characteristics of carbon-doped GaN-D-HEMTs.
Current collapse effects are related to the carbon-doping level [52,Page: 3290].
The V Break evaluation is not as clear as in Si-and SiC-devices because of different GaN-manufacturer semiconductor concepts and structures. NASA's publication [56,Page: 11] illustrates the breakdown evaluation of several GaN-devices due to the help of drain-to-source leakage current (I dss ) under cryogenic conditions. Some DUTs show a decrease in the I dss ; therefore, an increasing V Break . Another DUT points out a slight increase in the leakage current.
Further publications [53, Page: 5291] and [55, Page: 893] on E-HEMTs strengthen the view that the V Break remains constant or improve at a cryogenic levels.
Cascode device structures with a Si-low-voltage MOS-FET and high-voltage blocking normal-on D-HEMT enable normal-off device properties. The reverse conduction of a GaN-Cascode is decisively influenced by the typical bipolar junction body diode of the low voltage Si-MOSFET. There is a small Q rr , but it is smaller than HV blocking Si-devices. Minimising parasitic inside the package is very challenging. Parasitics have a major influence on the switching behaviour of semiconductors [63].
The R DS,on and the V Break decrease at lower temperatures. Moreover, the V Th is slightly increased like the Si-based devices. A reduction in switching energy losses is also observed due to the Q rr [54], [57].

B. INVESTIGATION METHODOLOGY
This subsection describes the requirement perspective of the experimental investigations. There are many exciting questions about the behaviour of semiconductors in cryogenic power electronics, but focus is laid on material and type-independent investigations. HV-blocking semiconductor devices are challenging to handle, and not all devices are commercially available at a comparable voltage and current level. Some compromises have to be made.

1) INVESTIGATED SEMICONDUCTOR MATERIALS
Upcoming WBG semiconductors show advantageous behaviour for high-required power-dense aerospace applications is attractive [1, Page: 84200 -84206]. The previous section III-A also mentioned that WBG semiconductors have some disadvantages at cryogenic temperatures, especially SiC-devices. Otherwise, using Si-based semiconductors (IGBT and MOSFET) can lead to some advantages at low temperatures and solvable disadvantages.
An overall comparison between Si-IGBT or -MOSFET, SiC-MOSFET, and GaN is conducted to find the best configuration can be found, and give design advice. All chosen semiconductors have diodes -either a pn body diode or an added Si-diode. Commercially available semiconductors are investigated because of their availability and technology readiness level. The semiconductor market is fast-changing, and a technology forecast for the following decades is complicated.

2) INVESTIGATED SEMICONDUCTOR's POWER RATINGS
This publication focuses on the potentials of semiconductors in cryogenic temperature ranges in aircraft applications. For all investigated DUTs, V Break is around 600 V to 650 V for safety reasons, increasing efforts by increasing voltage levels, and their market availability. The chosen nominal device current (at T J = 298.15 k) (I Device ) is around 40 A (only the evaluated IGBT has a other current value: 40 A at 377.15 K). The first step is to gather experience that will be used in upcoming higher voltage studies. Capturing firsthand experiences in cryogenic power electronics enables rough estimations for higher power ratings. The testbed design should also handle HV levels for future investigations. Moreover, the current is scaleable by parallelising the power electronic devices.

3) EXPERIMENTAL TEMPERATURES
Temperatures above 77 K are useful because under this temperature some disadvantageous behaviour of semiconductors exist, as mentioned in the subsection III-A. Furthermore, the system cooling design defines the cryogenic media's temperature, as analysed in II-C.
Otherwise, the self-heating of semiconductors and the non carrier freeze-out of GaN-devices require lower temperatures than 77 K. Some other cryogenic media can offer deeper temperatures. Additionally, LN 2 is a cost-efficient experimental coolant. In ongoing research activities, a closed-loop He cooler must be part of the infrastructure. Another opportunity is using LH 2 to use the proposed aircraft system medium, but high infrastructure efforts are likely to result [64].

4) INVESTIGATED PACKAGES
Tab. 4 below presents all DUTs with their internal structure, material, rated voltage, and rated current levels. Global MFs are focused on several device materials and technologies; therefore, all technologies can not be presented by one.
Moreover, the assembly and connection technology and the insulation coordination inside power electronic devices have to be taken into account. Silicone gel guarantees insulation coordination in typical power electronic modules. There are some disadvantages of using silicone regarding its robustness against very deep temperatures [66,Page: 113]. Therefore, the preferred TO-247-3 package ensures thermal decoupling and fulfils all listed conditions/requirements above.
However, GaN and Si-Superjunction require other package technologies to guarantee the best performances. In upcoming investigations, GaN-HEMTs or other package technologies and blocking voltages can occur. This publication focuses on overall comparison earning experiences to advise for all given semiconductors a possible topology and environmental options (cryogenic and non-cryogenic considerations).
Other package technologies, for example disks, can be involved in further research activities.

5) SEMICONDUCTOR PARAMETER OF INTEREST
Knowledge about the semiconductor's R on (R CE or R DS,on ) and switching energy losses (E on and E off ) in cryogenic temperature is fundamental to determining topology-dependent power losses per inverter (P L,Inv ). With the help of these parameters (R on , E on , E off ) and the heat sink design thermal transfer characteristics, statements can be drawn about self-heating and a possible f PWM . Further essential parameters are the blocking capability and the V Th . As previously mentioned in subsections III-A, some materials show advantages and disadvantages in cryogenic temperatures.

a: ON-RESISTANCE
The knowledge about behaviour at low temperatures is essential for designing high-current conductive power electronics because the conductive-dependent power losses (P L,C ) are directly related to R on and the quadratic relation of the current. Additionally, the losses can differ depending on the chosen topology, the modulation level (M ) and the power factor (cos ϕ). Furthermore, the V CE0 of Si-IGBT devices influences the conducting losses, too.
The focus is a comparison between the different semiconductor materials and types. Upcoming research activities should outline a comparison between different chip sizes and nominal voltages of a selected type to prove the feasibility of different cryogenic approaches.
Furthermore, R DS,on,dyn is an essential parameter of SiCand GaN-semiconductors. In upcoming research activities, the R DS,on,dyn should be investigated in different GaNsystems under cryogenic temperature ranges.

b: BLOCKING CAPABILITY
Knowledge about the behaviour of the blocking voltage is a critical factor that influences the applicable topology under cosmic radiation. A reliable and fault-tolerant design of power electronic devices in cryogenic aerospace applications is required. Cosmic radiation is one essential design criterion. To prevent avalanche generation of particles from primary cosmic rays [67]: VOLUME 10, 2022 • In-/decrease Chip Temperature (device-dependent) [67] • Decrease Chip Sizes • Reduce Off-Time • Decrease the ratio of DC voltage to device V Break For the IGBT module produced by ABB, the empirical Eqn. 5 states that a decrease in temperature (277.15 K until 402.15 K) leads to deterioration in breaking through due to cosmic radiations [68,Page: 3]. C 1 to C 3 are characteristic values; for example, C 3 expresses the device characteristic failure in time (λ) rate to nominal conditions. C 1 and C 2 describe the blocking voltage dependency on the λ Rate.
The publication [67] also illustrates that each device has its cosmic radiation robustness temperature dependency. Another publication shows the temperature behaviour of the λ due to cosmic radiation of controlled axial lifetime (CAL) diodes down to 237.15 K [69, Page: 2034]. For WBG devices, the temperature dependency is currently unknown and has not been part of any published research to date. The publication [39] advises long-term test locations, and in the PhD-Thesis [70], a comparison between Si and SiC devices is made. Decreasing T J lowers the dielectric strength and the latching sensitivity, but the publication [67] also states that influence of temperature is not well understood yet. Upcoming investigations have to clarify if cryogenic temperatures improve or deteriorate the robustness against cosmic radiation. However, the designable device voltage level decides which topology is suitable for which kind of semiconductor device. Moreover, the V Break is an important data value for executing experimental investigations under cryogenic temperatures.

c: THRESHOLD VOLTAGE
The V Th is another crucial parameter to control switchable semiconductors. A fault-tolerant design requires understanding threshold temperature drifting mechanisms to adjust the gate driver output voltage to the required level.
V Th measurements are necessary preliminary studies for dynamic experimental investigation. These investigations also help explain the loss mechanism shifting due to varying V Th .

d: SWITCHING LOSSES
A superconductive electrical machine requires small current ripples, as mentioned above II-B3. This system requirement leads to high f PWM of the drive inverter. The P L,S to be dissipated via the heat sink design correlates directly with the f PWM . Indicators for this material and type-independent study are: A testbed must capture E on and E off under cryogenic temperature. The power electronic community has discussed the correct measurement strategy [71]. Significantly, the evaluation of WBG semiconductors involves high-frequencyhigh-voltage and high-frequency-high-current measurement probes. Another strategy is the usage of a calorimeter [72] or characterising the P L,S due to the evaluating behaviour of parasitic elements [54].
A cryogenic environment requires an electrical measurement of E on and E off under some measurement errors. The so-called double puls test enables verification of the dynamic behaviour.
Therefore, a cryogenic double pulse testbed has to be designed. The testbed should enable temperatures from nearly 77.3 K to room temperature.
The following section III-C describes the design of the developed cryogenic double pulse testbed and experimental procure.

C. EXPERIMENTAL SETUP
This subsection outlines the testbed capabilities for the experimental investigations and procedure.
Several requirements result from the investigation methodology in section III-B, which the testbed design fulfils. The thermal testing principle based on the thermal capacity of the cooler needs a particular procedure. Fig. 9 shows the construction of the developed cryogenic double pulse testbed. The test methodology results in specific testbed requirements. The self-developed testbed conducts different semiconductor devices from various manufacturers. Discrete devices assembled in TO-247-3 housings are the focus of the investigation. All mechanical components are placed in such a way that easy access of measurement probes and electrical contacts are ensured. The measurement probes are not affected by cryogenic temperatures because only the DUTs have a thermal interface to the cryogenic cooler. The temperature drift of the voltage and current measurement is minimised by this design. 3.8 litre of LN 2 can take place inside the L-shape cooler design. This shape possesses two thermal paths (short: 1330 s and long 1625 s) to avoid shocking the semiconductor's assembly and joining technology. The semiconductor thermal interface reaches nearly the LN 2 's T NBP of 77.3 K measured by the thermal sensor.

1) CRYOGENIC DOUBLE PULSE TESTBED
The electronic consists: • DC link capacitors (1.5 kV) • Snubber-circuit options • Two isolated-powered drivers • Temperature measuring • Differential-voltage probes • A current shunt • field-programmable gate array (FPGA) • Communication interfaces. The FPGA especially enables flexibility in controlling the pulse length. A non-saturable spider-web coil with a small load inductance and less parasitic capacities requires small accurate pulse lengths. Fig. 10 illustrates the complete test setup with a 600-litre climate chamber, N container and measurement equipment. On the left side, the N container is displayed. The LN 2 is led through a hose to the heat sink inside the climatic chamber. Due to the use of the climate chamber, adjusting the environmental conditions is practicable. The climate chamber disposes of humidity control, an air dryer and chamber pressure regulation. Both functionalities prevent a strong dewing because of extreme temperature difference ( T )s (room temperature to cooler). In the first step, the climate chamber controls the humidity and the temperature 282.15 K for approximately 180 s on a constant level to keep the dewing under an acceptable level. The LN 2 gets into the coolant and the DUT interface decreases to 77 K. The coolant has to be filled up five until six times. During the first refilling process, much gaseous N is produced due to the evaporation process of the N caused by the significant T . The gaseous N is led out of the climatic chamber via the designed outlet. After the cooling down process, all measurements are executable during the warming-up progress. Depending on the measurement, different types of equipment are used to measure the R on , V Break , V Break , E on and E off .

2) EXPERIMENTAL PROCEDURE
The following subsection analyses the results of the experimental investigations.

D. COMPARISON OF THE CAPTURED SEMICONDUCTOR PARAMETERS
This subsection discusses measurement data and compares the collected data parameters with literature values from the comprehensive literature review in section III-A.
A material-independent analysis of different semiconductor materials is possible by the relative tendencies to 273.15 K (0 • C). Moreover, the propagation of uncertainties considers all estimated and specified errors. With the aid of a cubic regression, the data are fitted.

1) COMPARISON OF THE CAPTURED ON-RESISTANCE AND ZERO COLLECTOR-TO-EMITTER VOLTAGE
As mentioned in the subsection III-B, the R on is a crucial parameter and is mainly responsible for the P L,C . Fig. 11 compares the chosen devices against each other, highlighting the relative saving opportunities and giving information about the uncertainties. The Si-superjunction MOSFET emphasises significant relative R DS,on improvements of approximately 70 % from room temperature to cryogenic conditions. The mentioned carrier VOLUME 10, 2022 freeze-out can be recognized. Comparable results can be found in the publication [39].
The literature review also showed that the R DS,on of SiC-MOSFETs increases significantly by the power of three because of the early-onset carrier freeze-out, as mentioned in the subsection fundamentals III-A. The investigation in the publication [46] illustrates roughly the same relative factor on a 1200 V Si-MOSFET.
The cryogenic condition also leads to a decrease of the R CE in the investigated trench-gate IGBT. Moreover, the V CE0 increases due to the reduced carrier concentration, shown in Fig. 12. Carrier freeze-out can be recognized under 100 K. GaN-Cascodes also have substantial improvements of about 60 % under cryogenic conditions. Publication [54] illustrates comparable results. Furthermore, no slight increase in lower temperature than 100 K is noticeable, and no carrier freeze-out occurs. Nevertheless, an absolute value of the R on is also crucial, not only relative improvements. Tab. 5 shows the captured absolute R on at 273.15 K.

2) COMPARISON OF THE CAPTURED BREAKTHROUGH VOLTAGE
Subsections III-A and III-B explain the importance of the breakdown evaluation for a power electronic design under cryogenic conditions. Fig. 13 illustrates the relative change to 273.15 K. Si-Superjunction MOSFETs offer a lowered blocking voltage capability by around 20 % to 273.15 K. As mentioned in subsection III-A, this effect is related to higher carrier speed, leading to more effective impact ionisation. Publication [38] delivers comparable results.
The investigated SiC-MOSFET possesses rapid onset avalanche behaviour; future studies require a curve tracer with a HV source measurement unit. Only a few data points are captured from cryogenic conditions to room temperature. These measurements confirm that SiC-MOSFETs have only a slight reduction of 5 − 10 % in the blocking capability, as mentioned in the subsection III-A. The manufacturing of 650 V SiC-blocking devices is complex due to the thickness of the epitaxial layer. The publications [47] reach comparable results.
Si-IGBTs have also lowered blocking voltage capabilities by around 20 % due to the higher carrier speed under cryogenic conditions. Comparable results are given in [43].
The device's architecture of GaN-Cascodes is very complex. Additionally, the subsection III-A describes the breakthrough mechanism of GaN-HEMT. The measurement results illustrate a reduction of around 40 %. The tests on GaN-Cascodes are repeated several times with different starting temperatures in order to exclude the influence of damage. Results of other breakdown evaluations of 650 V GaN-Cascodes are not available under cryogenic conditions. Nevertheless, the safety or production margin in WBGs is enormous. Additionally, the Tab. 6 gives an overview of the absolute captured breakdown values at 273.15 K.
It can be noticed that more technical/production experiences in the last 50 years exist in Si-devices than in WBGs. However, the absolute values of the blocking voltage capability illustrate the possibilities of WBGs.

3) COMPARISON OF THE CAPTURED THRESHOLD VOLTAGE
Another crucial parameter is the V Th because it indicates the robustness against a fault switch-on of the device, as mentioned in the subsection III-B. A temperature dependency on cryogenic conditions is also known from the literature review III-A. Normalised and quadratic-regressed measurement values are shown in the Fig. 14.
Si-Superjunction MOSFET, Si-IGBT, and GaN-Cascode slightly increase of the threshold by around 30 % to cryogenic conditions due to the decreased intrinsic carrier concentrations, as reviewed in the subsection III-A. Si-IGBTs and GaN-Cascodes also own a low-voltage Si-MOSFET as a gate control. An increase of around 70 % is noticeable in SiC-devices due to enormous degraded concentration of intrinsic carriers, as reviewed in the subsection III-A. The publication [47] represents matching results.

4) COMPARISON OF THE CAPTURED SWITCHING LOSSES
As subsection III-B mentioned, the switching energy losses (E on and E off ) decisively determine the applicable f PWM . Furthermore, the switching energy losses are substantial to estimate self-heating under cryogenic conditions. The evaluation is more complicated than over parameters.   The Si-superjunction MOSFET offers lowered switching energy losses (E on and E off ) to cryogenic temperatures. However, the measurement can not determine the full potential because this superjunction MOSFET requires a snubber circuit to achieve an acceptable switching behaviour. The increased transdurence due to inversion layer mobility leads to better switching behaviour [40, Page: 1968]. Despite the snubber circuit, comparable results could be reproduced similar to [40].
SiC devices do not offer better switching behaviour (E on and E off ) under cryogenic conditions. The E off is slightly improved, as illustrated in the results of Fig. 16. Moreover, Fig. 15 shows an interesting behaviour over the whole investigated temperature range. As investigated in [44, Page: 9109], VOLUME 10, 2022 the R DS,on,dyn is another interesting parameter and influences the P L,S , too.
Taped carriers' freeze-out is mainly responsible for increasing the R DS,on,dyn . Furthermore, the effect is devicedependent [44,Page: 9109]. This investigation in this publication comes to the same conclusion as publication [44,Page: 9114] that huge improvements in the switching behaviour are not observable.
Si-IGBTs with an additional Si-diode offer a substantial relative improvement. The decreased Q rr of around 80 % and the increased carrier modulation process to cryogenic conditions lead to better switching behaviour [44,Page: 9109]. Further, the E off is significantly lowered, too. IGBTs have a large tail current under normal conditions. A loss reduction is achieved to better recombination under cryogenic conditions [44,Page: 9112].
GaN-Cascodes have also slightly reduced on-switching losses due to the recombination of the Q rr (V GS < V Th ) and slightly smaller Q oss . A drop in the switching-off energy losses is also measurable due to the transdurance increase [54,Page: 7415]. The GaN-Cascode inside the TO 247-3 package requires a snubber circuit. Future work will conduct further investigation on E-HEMTs. Fig. 17 and 18 compare the switching behaviour of the investigated IGBT between 285 K and cryogenic temperature 84 K as an example. From the current and voltage curve in Fig. 17 when switching on, the reduction of the Q rr can be perceived. A massive tail current reduction is noticeable in the switching-off in the current trace in Fig. 18. The following paragraph compares all investigated device parameters against each over and discusses the cryogenic technical prospects.

5) OVERALL COMPARISON AND TECHNICAL PROSPECTS
The spider map in Fig. 19 compares all captured parameters relatively to room temperature and illustrates the prospects powerfully. Therefore, the outer edge represents desirable properties, small R on , high V Break , constant V Th , and lowered  E on and E off . Counters, the inner edge shows poor material properties.
Si-Superjunction MOSFETs offer a significantly decreased R on , a reduced V Break , slightly higher V Th and lowered switching energies. This paper comes to the same material conclusion as mentioned in the subsection fundamentals III-A. Nevertheless, blocking voltage capability limits the design degree of freedom. Nowadays, Si-power MOSFETs are available to 650 V. Thus, two-level topologies are only possible for small bus voltages. Otherwise, due to the small R on , the current-carrying capability is excellent to guarantee huge output currents due to paralleling. Additionally, the carrier freeze-out defines the lowest T J to above 90 K. Device self-heating or a defined controllable thermal path can drive the MOSFET in the optimal cryogenic condition. But the device structures and device generation have a profound impact.
SiC-devices have no improvements in cryogenic temperatures. An early-onset carrier freeze-out reduces the possible cryogenic uses, and only the blocking capabilities keep nearly constant at cryogenic temperatures. This technical assessment of the cryogenic behaviour of SiC is confirmed in the literature review III-A. The only way is to use it outside the cryogenic area and take advantage of the enormous T . Around room temperature, SiC offers excellent properties.
In contrast to SiC-MOSFETs, the Si-IGBTs show relative high improvements to cryogenic conditions (to 90 K). Only the blocking capability is badly affected by the lowered temperature. The slightly increased V Th is acceptable. Si-IGBTs in a half-bridge or single configuration are available to HV of 6.5 kV. The use of a two-level topology with high-current carrying and high-voltage capabilities would be possible.
Another WBG-device is investigated in this publication. Compared to SiC offers GaN enormous advantages under cryogenic conditions. The GaN-devices do not suffer under the carrier freeze-out and can be directly cooled. Our investigations show a weakened blocking voltage capability of GaN-Cascodes. However, the breakdown evaluation is difficult due to the complex device structure. Otherwise, as mentioned in the fundamentals, GaN-E-HEMT do not show a weakened blocking capability under cryogenic conditions III-A. But the lateral structure does not allow it to reach the physical properties of GaN. Nevertheless, the lateral structure is essential to achieve good switching properties. Multilevel and interleaving is required to reach higher output powers. The design considering all thermal design aspects will be challenging and could decrease the power density.
Tab. 7 gives an overview of the presented thoughts. This section sets the important background for designing a power electronic inverter for a cryogenic drive train of a long-distance aircraft. The behaviour of the semiconductor materials is investigated by experiments and validated by a comprehensive literature review. Thus, this section summarises semiconductor materials' technical prospects in cryogenic temperature ranges and introduces recommendations.
The following section describes the design of a power electronic inverter for a cryogenic power train for a longdistance aircraft.

IV. POWER ELECTRONIC INVERTER DESIGN FOR CRYOGENIC POWER TRAIN
This section presents the power electronic design with cryogenic cooler design of a drive inverter for a superconducting electrical propulsion of long-distance aircraft. The data from system analysis in section II and the experimental semiconductor material investigation in section III add important input to the inverter design. With the aid of understanding the loss mechanism of each semiconductor material in cryogenic temperature ranges, the optimal T J can be defined. Therefore, the optimal T J determines the cooler. Two cooling system concepts (direct H 2 and indirect He) are available, and for both, cryogenic heat sink designs are presented. The challenges are: • The selection of suitable semiconductor materials and structures with their advantages and disadvantages • Superconductor and semiconductor interfacing • The choice of the topology with its influence on the current ripple • A targeted highly-integrated drive train concept with different thermal resistances avoiding voltage superpositioning • The integration of the topology into the cooling concept with non-cryogenic or cryogenic working semiconductors • The cooling design has to guarantee the required temperature range to operate the semiconductors in their advantaging operating temperature under partial load conditions • A lightweight cooler design to reach high power densities of the overall power electronic inverter (conventional heat sink has a large share of the total mass or volume)

A. POWER ELECTRONIC DESIGN
This subsection shows the state of the art of cryogenic inverter design for a long-distance aircraft, choice of the semiconductor material, topology discussion, the loss model and mass estimations.
The mission profile, mentioned in the system analyses in the section II, requires enormous P Shaft s. Furthermore, several systems specifications must be taken in the inverter design. Based on a material and topology discussion, an inverter loss model delivers essential impacts for the heat sink design. With the aid of a scalable inverter model, a mass assumption of the electrical parts can be calculated. A 3 × 3 5.4 MW superconducting electrical machine with three independent stars point needs aî s of 870 A by V DC = 3 kV. Moreover, the superconducting machine requires a f PWM higher than 10 kHz. The highly defined onboard voltage possesses challenges and advantages. Significantly, the leg current is reduced by a highly defined DC voltage of 3 kV. This is an advantage because the semiconductors do not reach the conductivity of a superconductor even with cryogenic cooling. The connection technology of the power electronics could only be designed to be weight-reduced if it is superconducting. Directly connecting superconductors to the power electronics semiconductors requires the use of GaN. This essential interfacing topic has to be addressed in future studies.

1) STATE OF THE ART
Publication [15] illustrates the design of a MW-scale cryogenic-cooled three-level inverter ANPC (two ANPC inverters in parallel to 1 MW) based on SiC-MOSFETs with a f PWM of 70 kHz and a ±500 V bus voltage.
Another publication [14] presents the results of an Si-MOSFET-based ANPC three-level inverter with 140 kHz. The bus voltage is also 1000 V. As mentioned in this publication and our studies, the cryogenic temperature can reduce losses for Si-Superjunction MOSFETs. Furthermore, the ANPC reduces electromagnetic compatibility (EMC) filter efforts due to smaller du/dt. The commissioning of the scaled 40 kW inverters is shown, and an efficiency improvement of around 30 % is presented. The inverter reaches absolute efficiency at cryogenic temperature by around 97.8 %.

2) CHOICE OF SEMICONDUCTOR MATERIAL
Currently, the bus voltage of 3 kV makes it challenging to use GaN devices because of their lower blocking voltage capability. Additionally, the multilevel design has to be supplemented by massive paralleling of GaN-devices to reach high power demands. In the future, GaN devices could be an alternative and offer no cooling limits due to the non-appearance of carrier freeze-out. The cooler design could be lightweight.
To face the high bus voltage, HV blocking Si-IGBTs and HV blocking SiC devices are the devices of choice. As investigated in the previous sections, IGBTs offer loss reduction benefits and worse blocking capabilities under cryogenic conditions around 80 K until 120 K. Si reaches its limits, and the cryogenic improvements do not match the values of common cooled SiC. The publication [73,Page: 248] of Cree introduces their investigation on a 6.5 kV chip. This chip offers a tenfold reduction in P L,S s compared to HV blocking IGBTs. Also, with circuit optimisations presented in [74, Page: Page: 117], soft-switching circuits can improve the P L,S s of IGBT-inverters by around 50 %, but this does not reach SiC's values.

3) TOPOLOGY DISCUSSION
The choice of the power electronic topology is dominated by the interaction of machine, electronic properties and electrical system requirements. 2-level and multi-level topologies are feasible for the nine-phase inverter design, but the power density is a crucial design target.
The 2-level inverter has the main advantage of a minimal amount of semiconductors, but it has to use semiconductor devices with 6.5 kV blocking voltages. Due to the high blocking voltage, fast voltage-changing speeds and parasitic capacities, EMC filter efforts increases.
A model-based optimisation in [75] concludes that the ANPC three-level shows higher power density than a two-level voltage source inverter due to a decreased active semiconductor chip size. The ANPC could use semiconductors with a blocking voltage of 3.3 kV by increasing the number of active semiconductor devices. As mentioned in the cryogenic invert's state of the art, the main advantage of the ANPC is the decreased EMC filter efforts. Moreover, the f PWM could be much higher and improve the THD [76]. Dielectric stress due to the fast voltage changing speeds in the electrical machine's windings could be reduced, which leads to reduced insulation lifetime [77]. The increased active semiconductors possess many controlling strategies to improve the loss distribution, hybridise different semiconductor materials, and increase fault tolerance. Otherwise, semiconductors with different behaviours must be combined, and the electrical interaction could be challenging. Additionally, the DC link capacitor is twice as big as the two-level configuration by storing the same energy [76]. The balancing of the DC link capacitor restricts the control.
Nevertheless, the ANPC could possess advantages in several aspects. Model-based investigations, as suggested in [75], and holistic system optimisations as [12] have to clarify beneficial inverter topology under cryogenic power train requirements of a long-distance aircraft. The electric-thermal design is the focus of this scientific contribution. As the first design step, a two-level nine-phase configuration is used. Fig. 20 shows 2-level topology for a drive inverter with the lowest amount of semiconductor devices. In the discussed case, three inverters fed one cryogenic drive. The thermal and electrical interfaces could be challenging in a matter of a noncryogenic approach. The analytical loss Eqns. 6 to 13 of the three-phase 2-level inverter controlled via a space vector modulation illustrates the power dissipation of the power electronic.

4) LOSS MODEL
There are P L,S and P L,C for the semiconductor switch (here index: MOSFET) and diode (here index: Diode). Controllable parameters, such as the M , affect the P L,C . Other parameters, such as the cos ϕ andî s , are given by the electrical machine. Additionally, the space vector modulation has a third harmonic; therefore, the conduction losses require a fourier decomposed factor (F svm ) [78, Page: 2838].
The P L,S are proportional to the configurable f PWM . Additionally, the equations offer a linear adjustment to the captured reference value (index: ref) [74,Page: 29].
Currently, only a high-blocking and high power half-bridge module from Mitsubishi [79] is under development. A scaled and fictive device is used based on experiences from the publications [75] and chip data from [73]. Additionally, the temperature dependency is estimated by fitting parameters from own investigations. With the help of the Eqns. 6 to 13, the chip loss can be calculated. All calculations are assumptions to prove the technical implementation feasibility. In the future, better values can also be expected due to HV SiC and packaging development.
The power losses per switch (P L,Switch ) can be calculated with number of parallel-switched chips per module (n Chip ) and the cumulative power losses per chip (P L,Chip ) of each chip: The model data in Fig. 21 shows a decreasing optimal T J to increase f PWM . The losses are minimal in a temperature range of 250 K to 275 K. SiC has to be used at a particular temperature to minimise losses because the P L,S become dominant for HV-blocking chips at higher f PWM s. Until a T J of 223 K, a slight increased R DS,on can be recognised from the measurement data in Fig. 11. Moreover, the thermal path defines which P L,Chip per chip surface can be handled. Using 20 kHz, the power dissipation per chip surface is about 0.8 W · mm −2 . An optimisation of the chip area can reach higher levels dependent on the thermal path. Therefore, the f PWM can be further increased. A further THD reduction, as exemplary presented in the subsection II-B3, is reachable. The diagram in Fig. 22 illustrates the partial load loss behaviour of the inverter over the temperature. For LC1, the total P L,Switch is 1.57 kW. The P L,Inv is 28.23 kW. This dissipation leads to estimated efficiency of 99.5 % without auxiliary losses. Further improvements can be reached; an optimum P trans of the superconducting electrical machine and P L,S has to be found in holistic optimisation approach in future studies. In the future, an improvement can be expected due to the development of WBGs.
The single-switch SiC module includes paralleled n Chip = 26. Therefore, the interconnection of the n Chip = 26 can be challenging for the future module. Furthermore, the f PWM is limited to the interconnection. The calculated assumptions do not cover the limitations of the parallel arrangements.
A spreading angle of 45 • with a conventional direct bonded copper (DCB), soldering and aluminium matrix with SiC particles (AlSiC) base plate obtain the cooling. The required data and the mathematical description are used from the publication [75]. The thermal resistance from junction to case (R th,J−C ) for a single chip is calculated with assumed material data, layer thickness and a spreading angle. The cumulated thermal resistance from junction to case ( R th,J−C ) in Fig. 23 consists of multiple parallel chips with their single thermal resistances R th,J−C . By increasing the

5) MASS ESTIMATIONS
The mass of a single-switch module (m Switch ) can be assumed using material data and estimated Volumina for all module components. Two switches form a half-bridge, and the superconducting electrical machine requires nine phases (3×3). The mass of the module (single-switch-configuration) is 0.61 kg and dependent on the f PWM , as shown in Fig 24. The total module mass per inverter is calculated to be 11 kg.
Capacitors are estimated to have about 60 kg using equations of the publication [75]. The electrical interconnection is complex because the inverter is outside the cryogenic media. Therefore, a thermal barrier is needed. The interconnection is estimated to weigh per inverter of 45 kg. A weight of 5 kg is approximated for intelligent drivers as proposed in [80] and over auxiliaries. The integration in the fan's housing is strived to lower the mass. The following section continues with the design of the power electronics heat sink. Based on the loss model estimations, a heat sink design for both presented cooling concepts has to be discussed.

B. POWER ELECTRONIC COOLER DESIGN
As mentioned in section II, the indirect or direct cooling system has to cope with the media flow of full and partial load conditions. This section presents the ideas for power electronics cooling related to a direct H 2 and indirect concept He.
Referring to Fig. 22, a 5 % tolerance of the losses around the optimal working temperature is introduced, yielding a temperature window from 200 K to 300 K for the optimal operation of the power electronic switches.
The calculations will have a safety margin if the H 2 has left the wet stream region and is an equilibrium gas (para-and ortho-hydrogen with temperature-dependent mass fractions). The losses of the superconducting cables, power electronic inverter and superconducting electrical machines heat the H 2 to certain amount of fuel cell temperature level. The thermophysical properties of H 2 are taken from [27], [81].

1) DIRECT COOLING CONCEPT WITH H
After cooling the superconducting cables, the H 2 will probably enter the electrical machines with 24 K to 34 K. According to Tab 8, the H 2 gas leaves the electrical machine with estimated temperatures. At this current design stage, not much is known about the losses of the superconducting wiring harness and the heat intruding into the wires from the environment via connectors, valves and flanges. An optimistic scenario is assumed. The exact temperature level is less critical for power electronics because they operate at much higher temperatures than electrical machines and the DC backbone. Several geometries of heat sink plates are studied. A proposal for an AlSiC cooling plate is given in Fig. 25. The gaseous H 2 with an average working temperature (T m ) of appr. 80 K to 84 K and operating pressure of 2 bar pass through straight channels underneath the MOSFET modules. The cooling plate has the exact dimensions of the base plate of the two single-switch modules (half-bridge). There are two strategies to achieve the necessary temperature drop between junction and H 2 temperature-a temperature blocking resistor in the conductive path or a deliberately reduced heat transfer on the gas side.
Strategy I, a 0.15 mm Kapton layer between the case and the heat sink plate may already serve. However, calculations show a considerable spread of temperatures between the LCs peak power (LC1) and landing (LC4). Consequently, optimisation is possible for only one LC, while the others will be far outside the tolerance window.
Strategy II, increasing the temperature drop of the heat transfer to the cooling gas is a more promising approach due to the non-linearity of the reynolds number (R e ) and nusselt number (N u ). Increasing the cross-section of the channels while reducing the effective heat transfer surface (A r ) in the cooler plate, as indicated in Fig. 25, can achieve a reduced velocity, smaller R e , and small heat transfer coefficients.
Each change of flow momentum causes pressure losses. The impulse occurs by changing cross-sections and any flow through a channel or pipe. The velocity, density, and temperature will also change using a compressible medium. Combined with the temperature-dependent H 2 properties, this leads to highly nonlinear dependencies and requires numerical computational fluid dynamics (CFD) calculation for more exact results. An approximation procedure with the well-known equations for heat transfer and compressible media [27], [28] [81], [82] [83], [84] [85] is used to study the main influencing parameters.
Calculating the temperature drops (Eqn. 16) on the thermal conductive path are trivial, otherwise calculating the heat transfer requires more effort. (16) As theṁ H2 does not vary from tank to fuel cell, isobaric conditions can be assumed in principle. There are tiny pressure drops along the flow path due to friction and change in channel size, but they are far below 1 %, so this assumption is justified. For exemplarily 2 bar operating pressure, a stepwise calculation of the H 2 mass flow through the cooler plate (ṁ cp ) is conducted. The calculations yield the pressure drops, the velocities, and the flow temperature before and outside the cooler channels. From the velocities and the geometry of the cooling channel with the hydr. diameter (D h ) (Eqn. 17), R e , N u and the average coefficient of heat transfer (α m ) are derived [81], [82] [83], [84] [85].
With the cross-section of the cooling channel (A Ch ) and the circumference of the channel (C Ch ), the D h can be calculated. This results in A r : The cooler channel length (L Ch ) is equal to cooler length (L C ).
The following calculated surface is used as a reference for evaluating all channel geometries. The real heat transfer area (A T ) differs from A r : With A T , the temperature drops of heat transfer are calculated. The medium thermal conductivity (λ m ) is found with the thermal conductivity of H 2 (λ H2 ) at the T m and the N u for turbulent or laminar flow: Regarding the short L Ch , the calculation of the medium value of reynolds number (R e,m ), medium value of nusselt number (N u,m ) and T m are considered sufficient in Eqn. 21. These VOLUME 10, 2022 values are iteratively corrected by heating the H 2 flow, which contributes significantly to T m .
With the aid of power losses per channel (P L,Ch ), the volume flow (V ), the density of H 2 (ϱ H2 ) and the thermal capacity of H 2 (c p,H2 ), the T between in-and outlet can be calculated. The converted formula 22 offers the use of mass flow per channel (ṁ Ch ) or enthalpy change ( h). Additionally, the T − S or h − S diagram provides the temperature-dependent data of the H 2 . Calculating the T allows the calculation of the thermal resistance from case to H 2 (R th,C−H2 ) and the T J of the semiconductor in Fig. 26. The channel dimensions, channel height (h Ch ), channel width (b Ch ) and number of cooling channels (n Ch ) are varied. Fig. 26 shows the feasibility of reaching the desired temperature window (low and high tolerance temperature, in Fig. 22) by the heat sink design. Tab. 9 illustrates the dimensions of the preferred structure with one cooling channel.
The analyses show a nonlinear dependency that could be traced back to geometrical changes of the channels (difference between A r and A T ). Moreover, only an integer value of n Ch is possible. Suppose the surface becomes smaller with increasing channel diameter because fewer channels fit into the fixed b C . In that case, the turbulence decreases, and the R th,C−H2 increases. A significant deviation from the temperature window occurs at LC4 because theṁ H2 is so small that the temperature rises to very high values. With some geometries, the flow additionally changes from turbulent to laminar, causing a further temperature rise. A turbulent flow is maintained in the preferred geometry under all LCs. The higher T J at LC4 is not critical nor dimensioning due to the small losses.
The temperature drop between the coolant and channel wall is comparatively high and influenced by the turbulence (where R e is an equivalent measure) and the poor λ H2 at low temperatures. As mentioned in strategy II, the design lifts the T J to the desired temperature window. The T J s of the preferred geometry (A r = 0.016 m 2 , h Ch = 17 mm) are within the lower half of the tolerance window and fit neatly with the calculated optimal T J .
From these data, the m Cp is 600 g, which is relatively low for a single switch element of this size. The relatively short L Ch allows a calculation with average values and a one-dimensional calculation model for the heat flow given in Fig. 25.

2) INDIRECT COOLING CONCEPT WITH He
Due to the high optimal T J of SiC-devices, a RBCC is not required. The cooling circuit of the power electronics comprises only the cooling plate, the heat exchanger and a fan to serve the necessary H e mass flow (ṁ He ). Fig. 27 illustrates the indirect cooling system without a RBCC.
With indirect cooling, controlling the fan speed allows a particular variation of theṁ He .The calculation procedure is somewhat similar to the one described before. Three heat transfer areas must be considered: 1) The heat transfer from P L,Inv to the He cooling gas flow in the cooler plate 2) The two heat transfers in the heat exchanger: From the He flow to the wall of the cell and from the wall to thė m H2 Slight rises in temperature and pressure are caused by the fan, which increases the enthalpy by the amount of added electrical power (P in ). This additional P in must also be transferred to the heat sink.
A counterflow design with a laser-welded construction and a high number of parallel channels or cells is proposed as a heat exchanger in Fig. 28. The pressure in the He circuit is chosen, similar to the pressure of the H 2 side at appr. 2 bar. The low pressure allows a thin walled construction of the heat exchanger.  The calculation of the heat exchanger follows the known formula apparatus as known from [83], [86] [84], [85] [87]. As an unique feature, a prescribedṁ He on the primary side can be noticed while the choice of theṁ He on the secondary side is free in principle. The thermophysical properties of He and H 2 are retaken from [27], [81] [82]. The calculation model can be explained with the help of Fig. 27.
The power balance yields the temperatures T 5 and T 6 , and with T sp = T 2 − T 6 as the free chosen parameter, the temperatures T 1 , T 2 and T 3 can be calculated. The Eqn. 23 describes the medium temperature drop in the heat exchange ( T m,Ex ) and defines the first condition of theṁ He . It may be noticed that the choice of higher T sp also reduces theṁ H2 : As the sum of T m,Ex from the heat transfer calculation depends also on theṁ He ; a second condition is given. Both conditions must be balanced to calculate theṁ He .
The calculations use the designs mentioned in Fig. 27, and Fig. 28. Tab. 10 presents the heat exchanger's dimensions. The design aimed to achieve a moderateṁ He for LC1 to reduce the maximum fan power (P in ). Theṁ H2 varies with the LC allowing a reduced P in if the drive is not operated at full load.
In this exemplary calculation each drive is equipped with cooling circuits for machine and power electronics. This gives a maximum of redundancy in the drive system. Theṁ H2 of 0.085 kg·s −1 enters the heat exchanger with T 5 = 80 K and is heated up to T 6 = 109 K. The maximalṁ He is 0.113 kg · s −1 for LC1, requiring a fan power of 1.9 kW. He enters the heat sink plate with a temperature of T 3 = 83 K. It is heated up during LC1 to T 2 = 134 K. With the fan's aid, the temperature rises by 2.6 K.
The heat transfer calculation in the cooler plate is done according to the previous discussion on direct cooling via LH 2 . An exemplary construction of a heat sink plate with the dimensions in Fig. 29 is calculated. Tab. 11 shows the calculated T J based on the LCs. Special attention is given to LC4 because theṁ H2 is minimal, causing significantly higher H 2 heating by the P L,Inv up to 239 K. Fortunately, the He flow stays in the turbulent region with the help of the fan. It lifts all temperatures in the He circuit and requires an adaption of theṁ He to the elevated temperatures.
The fan power is reduced to 1.4 kW only. Consequently, the T J in LC4 is outside the tolerance window of 200 K to 300 K. Nevertheless, the power and the losses in LC4 are so small; therefore, this is not critical for the operation of the drive. The following subsection compares the impact of both cooling design proposals on mass estimations. A power density can be assumed under all discussed assumptions.

C. INVERTER MASS COMPARISON
The calculated data from the previous subsections possess a first mass estimation of the power electronic inverter. Both discussed technical cooling opportunities are compared in Tab. 12. Nevertheless, the weight estimations are subject to certain uncertainties. Other essential components, such as the EMC filter and mechanical auxiliaries, must be considered in future studies. Mechanical auxiliaries include flanges and piping systems. The determination of these missing masses requires further reconciliations at the system level.
Although the estimation does not cover some components' weight, the expected total weight is comparatively low. A gravimetric power density of 40.4 kW · kg −1 to 42.9 kW · kg −1 could be achieved. Moreover, the weight difference between direct and indirect cooling not significant, thus indirect cooling is not ruled out.

V. CONCLUSION
This paper illustrates the power electronic design in the cryogenic application of long-distance aircraft. New aircraft designs with better storage capabilities for the volumetric but light-weight liquid hydrogen (LH 2 ) enable new non-CO 2producing fuel-cell-driven power train concepts. Hydrogen (H 2 ) enables technologies such as superconductivity and increases the power density of the superconducting backbone and the superconducting electrical machine. Nevertheless, an electric power train requires a power electronic inverter to drive the electrical machine.
Knowledge of the behaviour of different semiconductor materials under cryogenic temperatures is essential to answer the question: ''Are modern power electronics a technology enabler or a bottleneck of the system?'' Additionally, the cryogenic power train possesses many challenging aspects. The aircraft design defines the needed mechanical shaft power (P Shaft ) per engine. Therefore, power electronics must deliver enormous power values required from the aircraft's mission profile. Also, superconducting machines possess some requirements for the power electronic concerning switching frequency (f PWM ) and total harmonic distortion (THD). Superconductivity is not feasible without considering the cooling of the components.
This article is based on requirement-oriented methodology and analyses the aircraft and energy system prospects. Experimental semiconductor material investigations support this methodology to understand the semiconductor material behaviour under cryogenic conditions. Out of the system analyses and experiments investigation, a power electronic design with cooling considerations for cryogenic power trains is possible.
System-level aspects analysed in section II lead to the design conditions of the power electronic drive train inverter. Significantly, installed P Shaft , the needed THD of the electrical machine and the available cooling opportunities impact the power electronic design. Designing power electronics for cryogenic power train also requires a comprehensive comparison of the behaviour of semiconductor materials under cryogenic conditions. Comprehensive experimental investigations in section III on different semiconductor materials indicate the loss-saving junction temperature (T J ) to prove the suitability of the semiconductor materials. This experimentalindicated loss-saving T J is scaled to the desired power range of the cryogenic power train. The power electronic design in section IV includes the heat sink design to set the T J considering two cooling system opportunities under different load case (LC)s to the loss-saving temperature window.
The fuel cell-powered cryogenic drive train concept for a blended wing body (BWB) long-distance aircraft can offer some improvements regarding CO 2 , NO x and noise reduction. Moreover, it also can improve the efficiency chain from production-to-thrust. Out of the mission profile combined with the Sustainable and Energy-Efficient Aviation (SE 2 A) BWB long-distance aircraft design, the cryogenic power train must deliver a P Shaft of 5.4 MW per drive unit. Additionally, a finite element method (FEM)-based analysis characterises the influence of the current ripple on the hysteresis loss per cycle (Q) of the superconducting material inside the superconducting machine. The transport losses (P trans ) can be reduced by the factor of 10 by increasing the f PWM of the power electronic inverter. Two possible cooling concepts are available. The losses of the direct current (DC) backbone, the electrical machine and the electronic power heat the stored LH 2 to the desired fuel cell system temperature partially. A direct cooling approach uses gaseous H 2 , and the indirect cooling concept with a secondary circuit is based on helium (He). The suggested drive train concept would be only feasible if the fuel cell's efficiency, temperature and power density increase. Especially the fuel cell system cooling is challenging under an aircraft's laminar flow condition. However, the available H 2 mass flow (ṁ H2 ), the cooling concept and the semiconductor's behaviour under cryogenic conditions define essential design inputs for the power electronic heat sink design. The experimental investigations show that silicon (Si) and gallium nitride (GaN) offer advantages under deep temperatures. In particular, GaN has no so-called carrier freeze-out and can be used for He temperatures. However, the breakdown voltage (V Break ) of GaN devices is currently limited. It is possible that GaN can also handle enormous powers by blocking high voltage (HV) and conducting enormous currents in the future. Si-insulated gate bipolar transistor (IGBT) and superconjuction metal-oxide-semiconductor field-effect transistor (MOSFET) show improvements to 77 K. Under 77 K, carrier-freeze out sets in. For IGBTs, the improvements do not reach the technical possibilities in switching energy reduction of SiC. In particular, high f PWM s are required to reduce THD. Therefore, the magnetisation losses (P mag ) and P trans of the superconductor are reduced. The blocking voltage of Si-MOSFETs is limited. Only silicon carbide (SiC) possesses the properties to achieve high power with high f PWM s. In our investigation, the frequency-dependent power losses (P L,S ) dominate in 6.5 kV-blocking SiC-MOSFETs, and the optimal T J is about 200 K to 300 K. A slight reduction of E off in experimental data is noticeable. A scalable inverter model uses the measured and referenced semiconductor data to determine the loss-reducing T J under specified LCs. This scalable inverter model uses data from a HV blocking SiC semiconductor with temperature-dependent loss calculations. A T J range from 200 K to 300 K acts loss-reducing because the P L,S of the SiC inverter dominate the overall losses. Out of the desired temperature window (200 K to 300 K), a heat sink design for both cooling system considerations can be calculated by analytical equations. An analytical optimisations of different direct cooling designs via gaseous H 2 out of the electrical machine analyses the difficulties of fulfilling all analysed LCs out of the mission profile. The suggested heat sink design uses the non-linear dependency of cooling capacity on theṁ H2 to lift the T J to the specified temperature window under different LCs. Only LC4 is out of the desired temperature window, but the power losses per inverter (P L,Inv ) are minimal and not critical. Furthermore, the indirect cooling for the power electronic inverter is analysed. The calculations consider the secondary He cooling circuit. The desired temperature window of the SiC inverter (200 K to 300 K) is so high that a reverse brayton cycle cryocoolers (RBCC) arrangement is unnecessary. Only a fan sets the correspondingṁ He . Moreover, a light-weight laser-welded heat exchanger concept to the H 2 is presented. The indirect cooling concept uses the same strategy to lift temperature to the desired temperature level as the direct approach. Both cooling considerations are compared by considering the main parts of each concept. The weight difference between power electronic's direct and indirect cooling concepts is not a criterion for exclusion. Additionally, indirect cooling offers a higher system safety.
A high switching power electronic is more of a technology enabler than a bottleneck, but many challenges must be clarified in the future. For both considered cooling concepts, the power electronic inverter for a cryogenic drive train for a long-distance aircraft is feasible.
Holistic multi-parameter system optimisation in future studies must define the best overall parameter set to reach high power densities. This article indicates and discusses many optimisation parameters. Moreover, the development of vertical GaN structures enables direct cryogenically-cooled HV power electronics. Thus, thermal interfacing problems could be solved. GaN semiconductor material investigations require a closed-loop He testbed to reach temperatures smaller than 77 K.