Compensatory Model Predictive Current Control for Modular Multilevel Converter With Reduced Computational Complexity

Model predictive control (MPC) is widely used in modular multilevel converter (MMC) control because of its strong robustness, fast dynamic response, and strong stability. Traditional MPC must traverse several switch combinations to accurately regulate the output current and circulating current of the MMC. Therefore, as the number of sub-module (SM) grows, the controller’s computational complexity grows. This paper proposes a compensatory model predictive current control (CMPCC) for inner loop current control. It immediately estimates the number of SMs required by the bridge arm without scrolling optimization, reducing the amount of calculation of the system and improving the output current and circulating current tracking accuracy to the references. The objective function is established based on the system output current and internal circulation current by developing the discretization mathematical model of MMC. On the basis of minimizing the optimization scope, the compensation prediction is achieved through the volt-second balance, to achieve effective current control. Subsequently, an uneven bucket sorting algorithm is proposed to drastically eliminate the unnecessary sorting process. Finally, both a MATLAB/Simulink model and an experimental platform of MMC are built. To verify the practicality of the proposed control strategy, simulation and hardware experiments are provided.


I. INTRODUCTION
Modular multilevel converters were proposed by German scholars R. Marquardt and A. Lesnicar. It is widely used in medium-voltage and high-voltage applications, such as the voltage source converter based high voltage direct current transmission (VSC-HVDC) [1], [2], [3], [4], flexible multistate switch (FMSS) [5], [6], unified power flow controller (UPFC) [7], [8], and so on, due to its advantages of low switching frequency, strong scalability, high waveform quality, and multiple output levels [9]. To increase system stability, the MMC must control not only the output power and The associate editor coordinating the review of this manuscript and approving it for publication was Guillermo Valencia-Palomo . current, but also the internal circulating current of the system and the fluctuation of the sub-modules (SMs)capacitor voltage [10], [11]. Therefore, a dual closed-loop control strategy based on power outer loop and current inner loop is usually used.
The disadvantages of the traditional double closed-loop control strategy include complicated parameter tuning and slow dynamic response [12], [13]. Compared with traditional double closed-loop control, model predictive control has been widely employed in the field of power electronics in recent years as an algorithm with great resilience, stability, and ease of modeling [14], [15]. A finite control set model predictive control (FCS-MPC) is proposed by [16], which defines a cost function to control the AC side current, eliminate the internal circulating current of the MMC and regulate the bridge arm voltage. In each sample period, n SMs should be selected for combination in each phase (there are 2n SMs in each phase), and the combination that best meets the cost function is chosen as the optimal control. Obviously, as the number of bridge arm SMs grows, the computational complexity of FCS-MPC grows dramatically. [17] proposed an indirect FCS-MPC that limits the evaluation scope to (n+1) 2 and uses a sorting technique to achieve SM capacitor voltage balance. In [18] and [19], a simplified rolling optimization algorithm is proposed, with an optimization scope of (n + 1). To further reduce the computational complexity, [20] reduces the optimization scope of each bridge arm to three (the optimization scope of each phase is nine) at the expense of the number of output voltage levels. The MMC output voltage levels are all (n + 1) when using the above MPC method. When compared to a control method with an output voltage level of (2n + 1), this kind of algorithm cannot completely suppress the low-frequency harmonics in the circulating current, and the output current's harmonic distortion (THD) is higher. The literature [21], [22] proposes a type of multi-objective modulation MPCs algorithm that divides each SM sample period into several switch states and changes the duty cycle of the switch states to keep the output current and circulating current continually approaching their reference. [23] proposes a model predictive current control (MPCC) that utilizes the volt-second balance principle to compute the best on-time of a single SM in each bridge arm, and generates pulse signals by carrier phase-shift pulse-width modulation (PS-PWM). Compared with the control strategy proposed in [23], [24] regards all SMs on the bridge arm as a whole to calculate the duty cycle, and then adjusts the duty cycle appropriately based on the capacitor voltage of each SM. For the above method, although the exhaustive evaluation process of the SM switch state is avoided, the control objectives are coupled with each other, so it is difficult to achieve optimal control.
A compensatory model predictive current control (CMPCC) method is developed in this research to increase the control effect and decrease the calculation complexity. This algorithm, in comparison to traditional MPC, reduces computational complexity while maintaining the output voltage at (2n + 1). On the foundation of conventional MPC, the following improvements are proposed in this article: Firstly, improvements have been made to the limiting condition of bridge arm voltage, which can avoid multi-level jumps in the output voltage and make the MMC run more stably and safely. And then, a CMPCC based on the volt-second balance principle is proposed after the error source of the controlled object is examined. The algorithm's control precision can be increased by using this approach, which provides a specific way to estimate the bridge arms' two voltage states. Afterward, the precision of algorithm control has been improved by compensating for the impact of SM capacitor voltage fluctuation. Finally, the process for calculating the circulating current reference and output current reference has been improved.
The structure of this article is as follows. In Section II, the operation principle of MMC and the overall analysis method are introduced for the mathematical model. Section III explores the basic principles of the proposed CMPCC and the process of obtaining the reference of the inner loop in detail. An uneven bucket sorting algorithm is described in Section IV. Simulation and experimental verification, as well as related evaluations, were carried out in Sections V and VI. The conclusions are summarized in section VII.

II. MMC MATHEMATICAL MODEL
The main circuit topology of a three-phase MMC is shown in Fig. 1. Each phase of MMC has two upper and lower bridge arms, and each bridge arm has n half-bridge SMs, as indicated in the figure. The bridge arm inductance L and the bridge arm equivalent loss resistance R can be found on both the upper and lower bridge arms. In Fig. 1, i pj , i nj , u pj and u nj (where j = a, b, c) are the current and voltage of the upper and lower arms of the j-th phase; i j and u j are the phase current and phase voltage of the j-th AC output side; R l and L l is the AC side load resistance and inductance; U dc is the DC side input voltage; v gj is the AC side grid-connected point voltage; C is the DC side voltage stabilizing capacitor. The two IGBTs in the half-bridge SM conduct complementary conduction, allowing it to output two levels of u sm and 0 in response to a trigger pulse. The single-phase equivalent circuit in Fig. 2 (a) is used for analysis in this paper because the three-phase structure in MMC is the same. The single-phase equivalent circuit in Fig. 2 (a) is divided into a DC equivalent circuit and an AC equivalent circuit for convenience of comprehension as shown in Fig. 2 (b). Where u subj represents the differential mode voltage, and its value is (u nj -u pj )/2. The blue solid line represents the flow path of the circulating current i cj , the red solid line represents the output current i cj of the AC system, and the purple solid line represents the flow path of the bridge arm current, as illustrated in Fig. 2. According to the circuit structure in Fig. 2, the following relationship can be yielded from Kirchhoff's voltage law: The relationships between output current, circulating current, and arm currents, according to Kirchhoff's current law, are as follows: where i dcj represents the DC component in the circulating current, i diffj represents the AC component in the circulating current, and i diffj is mostly made up of low-frequency components.
Combining (1), (2), and (3) yields the differential equations for output current and circulating current as: where R and L are virtual resistance and virtual inductance respectively, andR = R 2 + R l , L = L 2 + L l . Its state-space equation can be expressed as: The sample period of the system is assumed to be T s . The predicted value of the output current and circulating current at k + 1 can be calculated using the Newton-Cotes formula to discretize the differential equation shown in (6):

A. TRADITIONAL MODEL PREDICTIVE CONTROL
According to the control method, traditional MPC can be classified into two categories: SM quantity control and duty cycle control. The optimal control for SM quantity control is to go through the switch combinations of the SMs on the bridge arm and choose the one that minimizes the absolute value of the objective function. Hence, the SMs are either active or inactive during each sampling period. The control principle is illustrated in Fig. 3. For duty cycle control, such as literature [21], [22], [23], [24], the required conduction time of the SM is calculated according to the system control requirements, and a trigger signal is generated. This type of control method can reach the control target more precisely while avoiding the time-consuming evaluation process of the SM switch combination. Fig. 4 is the control principle.

B. COMPENSATORY MODEL PREDICTIVE CURRENT CONTROL DESIGN
The above two methods have greater system stability and dynamic performance than the usual proportional-integral (PI) control. However, there are still certain shortcomings that need to be addressed. For SM quantity control: 1. In most circumstances, the optimal combination selected can only get the objective function close to VOLUME 10, 2022 zero, not equal to zero, resulting in an average error during the control period. 2. To provide optimal control, this type of method must assess a portion of the switch state in each sampling period, and the computation amount grows as the number of SMs grows. For duty cycle control: 1. Because the duty cycles for AC current control and circulating current control must be computed independently and then combined, the mutual influence of control objectives is unavoidable. 2. This method's formula is quite complex, requiring higher system performance. This paper proposes a compensatory model predictive current control based on the above-mentioned traditional MPC. The difference from the above two types of MPC algorithms is: 1. The duty cycles for AC current control and circulating current control need not be calculated individually in this CMPCC. The diverse control objectives have no mutual influence. 2. Only one SM in each bridge arm has two switching states during the sample period. Therefore, the system loss can be reduced on the basis of avoiding the average error. 3. The algorithm is simple to implement and offers excellent control precision. Because the algorithm does not need to find the optimal control set, its computational complexity remains constant as the number of SMs increases. Firstly, using the discretization mathematical model of MMC, determine the number of bridge arm conduction SMs; then, in each sampling period, calculate the additional SM conduction duty cycle using the volt-second balance to get the final number of conduction SMs. The method compensates for the difference between the actual and reference of the controlled quantity, bringing the objective function closer to zero at the conclusion of the sampling period. Thus, at the end of each sampling period, the controlled quantity can be quite close to its reference. (7) and Fig. 5 demonstrate the CMPCC expression and its schematic diagram (the specific description and the meaning of the variables are explained below).
In Fig. 5, t k+1 = t k + T s and assume that t 2 > t 1 ; Overcompensation is indicated by the solid line part in Fig. 5 (a), implying that during a sample period, n mp,n + 1 SMs act in the upper and lower bridge arms, respectively, and the control objectives shift from point A to point B; Under-compensation is indicated by the dotted line part in Fig. 5 (a), implying that during a sample period, n mp,n SMs act in the upper and lower bridge arms, respectively, and the control objectives shift from point A to point C. Fig. 5 (b) represents the duty cycle control in [24]. In one sampling period, a better control effect can be achieved through three different bridge arm voltage combinations. However, in each sampling cycle, all SMs need to be involved in the control, which leads to higher switching frequency, increased system losses, and is not conducive to system heat dissipation.
The specific working principle of the CMPCC is as follows. Adjusting the upper and lower bridge arm voltages during each sampling period can simultaneously control the changing trends of the i j and the i cj , as shown in Fig. 5 (b). As depicted in Fig. 5 (c), the control targets transit to the reference can be seamless and precise.
It is assumed that in each sampling period, the voltages of the upper and lower bridge arms are (u 1 pj , u 2 pj ) and (u 1 nj , u 2 nj ) respectively, and there are: where ε is a positive value that is not very large. Thus, it is simple to draw the following conclusion: According to (4), the common mode voltage and the DC side bus voltage interact together to control the i cj . The upper and lower bridge arm voltages should also comply with the following relationship in order to allow for flexible control of the value of the circulating current: In this way, in each sampling period, the output voltage contains three voltage states, named: where the expression of u 2 j depends on the relationship between the magnitudes of t 1 and t 2 . As a result, as shown in Fig. 5 (c), the three output voltage states enable the control target to exhibit various changing trends and steadily get closer to the corresponding reference. And when (8), (9) and (10) are satisfied, the change of the controlled object tends to be smooth and stable.
Because the capacitor voltage in the SMs must fluctuate when current flows through it. As a result, there is a discrepancy between the actual upper and lower bridge arm voltages and their reference. The prediction error of upper and lower bridge arm voltage at k time is introduced on the basis of equation (6) to improve the control accuracy and stability of CMPCC.
whereū smpj andū smnj are the average value of the capacitor voltage of the upper and lower bridge arm SMs of the j-phase respectively.
Therefore, considering the bridge arm voltage prediction the discrete equation expression should be as shown in (13).
where h is the compensation factor, and its value is 0.5. Consequently, the objective function is defined to: where i ref j (k + 1) and i ref cj (k + 1) are the references of the j-th phase output current and circulating current at k +1 time.
The bridge arm voltage prediction error (12) and the discrete equation expression (13) are put into the objective function (14), accordingly. Let J 1 = 0 and J 2 = 0, respectively, it yields the following formula: VOLUME 10, 2022 Using the bridge arm of the j-th phase as an example (j will be omitted below), having the reference of the bridge arm voltage makes determining the number of SMs to turn on in the bridge arm simple: u ref p,n = n p,nūsmp,n = n mp,nūsmp,n + u sp,n (16) where n mp,n is derived by rounding down from n p,n , u sp,n is the voltage that needs to be compensated. The turn-on duty cycle d 1,2 and turn-on time t 1,2 of additional SM can be expressed at this moment using the volt-second balance principle: Therefore, the two fixed voltage levels of each bridge arm can be obtained respectively as shown in (18), which can satisfy the requirements of (8), (9) and (10).
As shown by Fig. 5 (c), when n mp,n + 1 SMs act in the period of t k ∼ t k + t 1 , the control objectives shift from point A to point G; When in the period of t k + t 1 ∼ t k + t 2 , there are n mp SMs act in the upper bridge arm and n mn + 1 SMs act in the lower bridge arm, the control objectives shift from point G to point H ; When in the period of t k + t 2 ∼ t k+1 , there are n mp,n SMs act in the upper and lower bridge arm respectively, the control objectives shift from point H to point I . It should be noted that while CMPCC is derived from optimal duty cycle control and SM quantity control, it differs from these two control methods due to their different working principles.
The number of SMs that should be turned on in each bridge arm, according to the preceding description, runs from [0, n]. According to formula n = (n nj − n pj ) 2, the value range of n is [−n/2, −(n − 1)/2, . . . , 0, . . . , (n − 1)/2, n/2]. That is to say, the converter can easily achieve an output voltage level of 2n + 1 under the proposed MPCC. The SM capacitor voltages are ranked from low to high when the direction of the bridge arm current is positive. Let the first n m SMs have a conduction time of T s , and the (n m + 1)-th SM have a conduction time of dT s at this time. In the same way, when the current flowing through the bridge arm is negative.
In each sample period, the proposed CMPCC method must execute one prediction calculation, one compensation calculation, and one calculation of the number of bridge arm SMs. The proposed control algorithm can lower the number of calculations in each sample period and reduce the system's computing cost when compared to the existing MPC method. The comparison between the control algorithm proposed in this paper and other MPCs is listed in Table 1.
According to [25] and [26], the number of computational operations can be used to assess the method's computational complexity. Table 2 compares the computational operations between [24] and the proposed method without taking into account the voltage ordering of SM capacitors. Clearly, the proposed method can significantly shorten the system operating procedure, and the benefit becomes increasingly apparent as the number of SMs grows. When each bridge arm has 10 SMs, [24] must execute (79 × 3) multiplication and division operations, whereas the proposed method always maintains (24×3), which reduces the computation by 69.6%.

C. OBTAINING METHOD OF OUTPUT CURRENT REFERENCE
It can be deduced from the power equation under αβ coordinates [27], [28] that: where ''+'' and ''−'' represent positive and negative sequence components, respectively; P and Q represent constant values of power; P c and Q c represent the double frequency component of power.
The active power fluctuation suppression strategy is used in this paper to avoid the transfer of harmonic power to other converters or equipment. Therefore, according to (19) and (20), by setting P c = 0, the reference of the output current can be obtained as:

D. OBTAINING METHOD OF CIRCULATING CURRENT REFERENCE
Traditional MPC, as described in the literature [24] and others, normally sets the reference of the circulating current component to a fixed value. The three-phase voltage of the actual grid and the DC side voltage, on the other hand, will invariably change. Thus, the power flowing through each phase of the MMC is not exactly equal, and the circulating current reference should alter depending on the condition of the system. Assuming that the 2 nd circulating current in the system can be completely suppressed, the power of each phase on the DC side of the MMC is: On the AC side of the MMC, the power of each phase is: where V mj is the voltage amplitude of the j-th phase, I mj is the current amplitude of the j-th phase, and θ j represents the voltage and current phase difference. It can be calculated from (19): The reference for each phase circulation current can be expressed as follows:

E. CURRENT LIMITING METHOD DESIGN
Overcurrent difficulties can occur when the three-phase voltage fluctuates. Overcurrent can aggravate system losses and can even jeopardize the system's safe operation, resulting in unbalanced three-phase voltages. Therefore, to prevent the current from exceeding the limit, the power reference must be properly corrected. The ratio λ of the output current reference to the system's maximum permissible output current can be used to alter the output power of the system.
When λ is less than or equal to 1, it means that the output current does not exceed the maximum allowable output current of the system. When λ is greater than 1, it means that the output current exceeds the maximum allowable output current of the system and current limiting methods should be used to rectify the power reference. From this, the adjusted power reference P' is expressed as follows:

IV. CAPACITOR VOLTAGE BALANCE STRATEGY BASED ON UNEVEN BUCKET SORTING
Because each bridge arm of the MMC is made up of cascading n half-bridge SMs, the output current quality is intimately related to the SMs' capacitor voltage. So capacitor voltage balancing is an essential condition for system stability. In each sampling period, the uneven bucket sorting method presented in this research can offer the system a range of SMs that need to be turned on. Since the capacitor voltage sorting in this range has no effect on the normal turnon and turn-off of the SMs, avoiding the capacitor voltage sorting within this range can reduce the calculation stress of the system while not affect on the normal operation of the system. The traditional bucket sorting algorithm comprises four steps in its operating principle [29]: the first step is to determine the number of buckets and the capacity of each bucket; the second step is to put the SMs in the appropriate buckets based on the capacitor voltage size; the third step is to adjust the number of SMs in the buckets to ensure that each bucket contains the same number of SMs; and the final step is to sort each bucket separately to obtain the final sorting result. According to the above, the computational complexity of traditional bucket sorting algorithms is mostly concentrated in two aspects: separating elements into buckets and sorting in each bucket. The CMPCC algorithm used in this paper does not need to evenly divide the number of SMs in the bucket. To make the SM allocation process easier and lower the system's load, an uneven bucket sorting technique is presented. When the number of bridge arm SMs is considerable, it offers apparent advantages. Fig. 6 illustrates the flow of a specific sorting algorithm.
The bridge arm is tentatively divided into b buckets, assuming there are n SMs in it. The first step is to establish the maximum and minimum values of the capacitor voltage, which are recorded as u max and u min respectively, to preliminarily determine the range of the bucket as: At this point, the buckets are sorted from small to large, and the bucket sequence numbers are labeled A l (where l = 1, 2, . . . b). Then, according to the magnitude of the capacitor voltage, put each element into the corresponding bucket, and count the number of elements in the bucket as B l . When all of the SMs have been placed in the bucket:

B. DETERMINE THE DIRECTION OF THE BRIDGE ARM CURRENT
(1) If the current in the bridge arm is positive: n i represents the number of SMs in the first i bucket. The buckets are screened in sequence from small to large untiln i−1 < n m + 1 < n i . Because the number of SMs in the i-th bucket is small at this point, the bubbling approach can be used to sort the data immediately. Turn on all the SMs in the first (i-1) buckets and the first n m + 1 − n i−1 SMs in the i-th bucket once the sorting is finished. (2) If the current in the bridge arm is negative: n i represents the number of SMs in the first i bucket. The buckets are screened in sequence from large to small untiln i−1 < n m +1 < n i , and the bubbling method is used for sorting in the i-th bucket. Turn on all the SMs in the first (i-1) bucket and the first n m +1−n i−1 SMs in the i-th bucket once the sorting is finished. The calculation amount of the controller is greatly reduced because the proposed uneven bucket sorting algorithm does not require accurately sorting the capacitor voltages in each bucket. Under different bridge arm SMs, Table 3 compares the proposed sorting, heap sorting, bucket sorting, and sorting proposed in [10]. The table shows that when there are 600 SMs on each bridge arm, the proposed sorting algorithm reduces the worst case and best case by 75.64% and 78.98%, respectively, as compared to traditional bucket sorting. It can be seen that the proposed sorting algorithm has some advantages, which become more apparent as the number of bridge arm SMs increases. The method can also use PSC-PWM to create trigger signals to accomplish fixed switching frequency control for each SM, according to [24] and [30].

V. SIMULATION ANALYSIS
The overall control block diagram of the MMC system is shown in Fig. 7. To prevent overcurrent from occurring at the output side of the converter by adding a current limiting module. At the same time, the circulating current reference is calculated according to the DC side voltage, the AC side voltage, and the current of the converter. The CMPCC controls the three-phase output current as well as the circulating current. The SMs trigger pulse signals are produced by the uneven bucket sorting. This paper uses the MATLAB/Simulink simulation platform to create a three-phase MMC simulation model to verify the effectiveness of the proposed control strategy. Table 4 lists the parameters of the system simulation model.

A. COMPARISON OF TRADITIONAL MPC AND THE PROPOSED CMPCC
The current inner loop in Fig. 8 uses the MPC presented in [24], and the values of various parameters are obtained from [24]. The system is initially in a stable state. The threephase output currents are depicted in Fig. 8 (a). The tracking capability has improved and the currents can maintain sinusoidal. The total harmonic distortion (THD) of the output current is 0.62%. With a peak-to-peak value of around 3.16 A, the MPC proposed in [24] can effectively suppress the circulating current, as shown in the figure. Fig. 8 (c) shows the  upper and lower bridge arm currents of phase A. The bridge arm currents maintain sinusoidal. The capacitor voltage of the fifth SM of each phase's upper bridge arm is indicated in Fig. 8 (d). The capacitor voltage can be kept at a specific value with an 8% fluctuation. Fig. 9 shows the steady-state performance of the MMC controlled by the CMPCC proposed in this paper. A starting active power of P=40 kW and a starting reactive power of Q=0 kVar are applied to the system. The system active power P changes to 60 kW at t=0.25s. The MMC three-phase output currents are shown in Fig. 9 (a). The output current's THD, as determined by FFT, is 0.41%. The three-phase circulating currents are displayed in Fig. 9 (b). The proposed CMPCC effectively diminishes the circulating current with a peakto-peak value of about 1.49 A. In Fig. 9 (c), the bridge arm currents are illustrated. The bridge arm currents can react quickly while preserving an excellent sinusoidal form during transit. The capacitor voltages are shown in Fig. 9 (d). The proposed sorting algorithm can stabilize the capacitor voltages. Simulation results confirm the effectiveness of the proposed CMPCC.

B. DYNAMIC PERFORMANCE OF THE PROPOSED CMPCC ALGORITHM
The simulation waveforms when a single-phase fault develops in the grid are shown in Fig. 10. The A-phase bus voltage reduces by 50% when t=0.20s. Since this paper utilizes an active power double frequency fluctuation suppression technique, when the A-phase voltage drops by 50%, the A-phase AC side current will increase to ensure the stable transmission of power. The three-phase current on the AC side cannot be balanced because the power double frequency fluctuation and the negative sequence current cannot be suppressed at the same time, as shown in Fig. 10 (a). The three-phase circulating current waveform is shown in Fig. 10 (b). The circulating current of phase A fluctuates in a short range after the voltage of phase A at the grid connection point drops by 50%, but remains steady near the reference. Fig. 10 (c) depicts the upper and lower bridge arm currents of phase A. As shown in Fig. 10 (d), the capacitor voltage of the fifth SM of each phase's upper bridge arm is selected. The capacitor voltage fluctuation of the A-phase SMs is greater than that of the other two phases, as can be seen. The simulation waveform of active power is shown in Fig. 10 (e). The active power fluctuation is suppressed, and the three-phase power can be kept constant, as shown by the simulation results. The A-phase current, however, grows enormous and exceeds a predefined maximum value due to the decline in the A-phase voltage. As a result of the correction factor λ, the active power reference is reduced, and the AC side current is also limited within the permitted range.

VI. EXPERIMENT ANALYSIS
An MMC experiment platform was built and experiments were carried out to verify the efficiency of the proposed CMPCC algorithm. Fig. 11 depicts the MMC experimental apparatus, whereas Table 5 lists the experimental parameters.
As shown in Fig. 11 (a), the MMC experimental device comprises of four half-bridge SMs cascaded in each bridge arm. It's a dual-core main control board with STM32 (STM32F407ZET6) and FPGA (SPARTAN3E-XC3S500E), as shown in Figure 11 (b). The STM32 is mostly utilized to run the operating system and control algorithms, whilst the FPGA is primarily used to generate trigger pulses and perform sorting algorithms. As illustrated in Fig. 11 (c), each half-bridge SM contains two IGBTs, a DC capacitor, a complex programmable logic device (CPLD) minimal system, a capacitance-voltage measuring circuit, and a communication circuit. The main control board and each SM use optical  fiber connectivity to enable timely and effective information transfer. The system initially operates stably under the control strategy proposed in [24] and the control strategy is shown in Fig. 7. The grid voltage on the AC side is set to zero to simplify the experiment, which means the MMC output side is directly connected to the resistive and inductive load. It should be emphasized that this does not affect the validation of the proposed CMPCC strategy. Fig. 12 and Fig. 13 depict the experimental consequences.
In this part of the experiment, the performance of the traditional MPC strategy in steady-state was verified. The AC output current, AC side output voltage, circulating current, and SMs capacitor voltage experimental results are shown in Fig. 12. In this experiment, the DC side voltage was set to 400V. As shown in Fig. 12 (a), the peak value of the output current is about 10.8A. The THD of the output current on the AC side is 1.73%. The MMC output voltage is five-level under the control of the traditional MPC strategy, as illustrated in Fig. 12 (b). Fig. 12 (c) shows the bridge arm voltage. The waveform of the A-phase circulating current is shown in Fig. 12 (d). It can be seen that the circulating current stabilizes at the reference, although it still contains some harmonic components. The experimental waveform of the SMs' capacitor voltage is shown in Fig. 12 (e), and its value is stable at around 100V. The residual circulating current harmonic components, however, enhance the capacitor voltage ripple of the SMs due to the mutual coupling between the control objectives, therefore optimal control has yet to be realized by this MPC. In this part of the experiment, the proposed CMPCC strategy's dynamic performance is verified, and the experimental results are displayed in Fig. 13. The amplitude of the output current reference is increased from 8.6A to 10.8A. The output current dynamic responsiveness is outstanding, as demonstrated in Figure 13 (a). The number of output voltage levels in the two stages is inconsistent with seven-level and ninelevel, respectively, because it is dependent on the magnitude VOLUME 10, 2022 of the output current. The bridge arm voltage changes regularly when the output current reference changes, as seen in Fig. 13 (c). And the bridge arm voltage is always maintained at five levels. When the output current takes a step, the circulating current can respond smoothly and the low-frequency components in it can be effectively suppressed, as shown by the circulating current waveform in Fig. 13 (d). The SMs capacitor voltage waveform can be seen in Fig. 13 (e), which shows that the capacitor voltage remains constant at 100V throughout the process. The waveform quality is good, and the capacitor voltage fluctuation varies with the output current. The results of the experiments reveal that the proposed control method has a better control effect.
Finally, using the STM32 Timer Counter Register (TIMx CNT), this paper compares the computational complexity of the two methods. To generate the SM trigger pulse, the control method provided in [24] requires a total of 1483 instruction cycles, which is equivalent to 8.83 µs when utilizing a clock frequency of 168 MHz. When using the method proposed in this paper to generate the trigger pulse, a total of 217 instruction cycles are required, which is equivalent to 1.29 µs when using a clock frequency of 168MHz. This is because the method given in [24] requires calculating the duty cycle of all SMs, which increases the computational complexity as the number of SMs grows, whereas CMPCC just requires calculating one duty cycle.

VII. CONCLUSION
In this research, a compensatory model predictive current control method for MMC is proposed. The article examines the sources of the controlled object's error under conventional MPC. The limiting constraints between the two voltage states of the bridge arm are then proposed to prevent multi-level jumps in the output voltage of the MMC. To achieve precise and reliable control, a correction method based on SM capacitor voltage compensation and the volt-second balancing principle is proposed. The CMPCC algorithm considerably reduces the computational complexity of the system by avoiding rolling optimization and weight factor setup. An uneven bucket sorting algorithm is developed to lessen the calculation amount of the system, which eliminates a lot of unnecessary sorting work. Additionally, this sorting algorithm can use PSC-PWM to create a fixed switching frequency for each SM, distributing the MMC losses evenly. The proposed method has a higher control precision and a lighter calculation complexity, according to simulation and experimental results. This paper only verifies the application of the proposed control method in three-phase MMC. The next stage will extend the study and research to multi-terminal flexible DC transmission.