Solar PV Fed DC Microgrid: Applications, Converter Selection, Design and Testing

In this research article, major applications which use solar PV fed DC microgrid for either their routine operation or gain additional advantages over existing electrical power architecture are elaborated. The role of power converters in interfacing the input with the required output is highlighted. The advantages of solar PV fed DC microgrid are demonstrated by designing and testing a non-isolated high gain high power (HGHP) DC-DC converter to meet the DC distribution voltage level. The proposed converter is synthesized by using hybrid combination of three-phase interleaved boost converter (IBC) with voltage lift technique along with coupled inductors (CIs) and voltage multiplier cell (VMC). The proposed concept is practically demonstrated and the adopted design techniques are validated using simulation and experimentation. The proposed converter with 60V/1.1kV, 100kHz and 3kW rating operates at 92.3% full-load efficiency under practical conditions. Due to the gain extension techniques adopted, the switches used in the proposed converter are subjected to a voltage stress which is only 36% of the output voltage. Due to interleaving technique, the input current ripple and the current stress on the switches are only 15% and 33% of the input current respectively. Key performance parameters of this converter are thoroughly investigated and benchmarked with some state-of-the art converters to appreciate the salient features of the presented converter. The ability to yield higher voltage gain at safe duty ratio, high power handling capacity, low voltage and current stresses on the power switches are the main advantages of the proposed converter.

The voltage and power levels of the accessories employed within all the above-mentioned applications are different as depicted in Fig. 1(a). The basic types of power electronic converters and their derivatives along with the voltage and power levels are also clearly portrayed. Interestingly, these varieties of power electronic converters play the intermediate voltage level matching role to perfection and are an integral part of the modern-day applications [20], [21], [22], [23]. Fig. 1(b) illustrates the role of high gain DC-DC converters in the applications discussed so far. Obviously, except the three voltage levels (highlighted in red) all the other voltage and power levels are met using the intermediate high gain power electronic converter. This research work focusses on presenting a case study involving the synthesis, design and testing of a high gain high power (HGHP) converter interface for a solar PV fed DC microgrid application.
Recently, due to drastic drift towards utilizing renewable energy sources (RES), there is an impending requirement for step-up converters to integrate the RES to the utility grid and/or other loads. Conventional boost converter (CBC) and some of its basic derivatives like quadratic and cascaded boost converters are unsuitable for high gain high power (HGHP) applications due to some inherent drawbacks like (i) extreme duty ratio operation of switches, (ii) diode reverse recovery problem, (iii) higher voltage stress on the power switches and (iv) degraded efficiency [24], [25].
Coupled inductors (CIs) are effortlessly used to enhance the voltage gain of a power converter; adjusting the turns ratio value accomplishes the task of meeting the high voltage conversion ratio requirement [38]. In [39], [40], [41], and [42], CIs are employed along with gain extension cells which are connected at the secondary side of the CIs to further enhance the overall voltage conversion ratio of the converter [43]. Moreover, by replacing the discrete energy storage inductor with a CI and arranging in an interleaved fashion, the power handling capability is also enhanced besides fulfilling the voltage gain requirement [44].
Though CI based converters offer higher voltage gain the winding leakage inductance causes voltage spikes and results in increased voltage stress on the power switches. Converters employing multi-winding CIs [45], [46] and dual CIs [47] also provide the required higher voltage conversion ratios. However, such converters are rarely used due to the complexity involved in designing and manufacturing the required magnetic components.
In PV applications, ripple-free input current is preferred for easier implementation of maximum power point tracking (MPPT) algorithms. Hence, conscious effort is made to reduce the current ripple at the input. Interleaving technique is widely adopted to cancel the input current ripples and are employed in [39], [40], [41] and [44], [48], and [49].
In the proposed HGHP converter, high voltage gain value is achieved by employing hybrid combinations of interleaving technique along with CIs, voltage-lift and voltage multiplier cells (VMCs). The paper is arranged as follows: Section 1 introduces the proposed converter by thoroughly reviewing the existing literature. In Section 2, the circuit is described followed by the operating principle in Section 3. The detailed analysis and the design equations are derived in Section 4. The experimental results and their inferences are discussed in Section 5 while the comparative features are detailed in Sections 6 and 7. The concluding remarks are outlined in Section 8 followed by the references. Fig. 2 shows the circuit diagram of the proposed HGHP converter. Stage 1 of the converter is synthesized from a conventional three phase IBC comprising of switches Z 1 , Z 2 and Z 3 along with the primary windings of CIs (L 1P , L 2P and L 3P ) which serve as the energy storage inductors. Voltage lift technique is incorporated using C lift and D lift to enhance the voltage gain of Stage 1. Intermediate diode D IBC is used to prevent the secondary windings from discharging the stored energy. The three secondary windings of the CIs (L 1S , L 2S and L 3S ) are connected to one VMC network comprising of  D M1 , D M2 , C M1 and C M2 to extend the voltage gain of the proposed HGHP. Diode D 0 and C 0 act as the conventional boost rectifier diode and the output capacitor. The operating principle is detailed subsequently.

III. OPERATING PRINCIPLE
The working principle of the proposed HGHP converter is elaborated based on the following valid assumptions: (i) all the semiconductor devices are ideal, (ii) the proposed HGHP converter operates in continuous conduction mode (CCM) and (iii) all the three switches Z 1 , Z 2 and Z 3 are turned ON for a brief time interval to initially charge the primary inductors L 1P , L 2P and L 3P . The operation of the proposed HGHP converter is explained using six modes in one switching cycle. At t 0 , switch Z 1 is turned OFF and the switches Z 2 and Z 3 are maintained in ON state. Consequently, the current flowing through the primary winding L 1P starts to linearly decrease. The energy stored in L 1P is transferred to C Lift and Stage 2 through D Lift and D IBC . Current through D lift is same as the current through L 1P and is represented by (1).
The potential developed across C lift forward biases diode D M1 and helps in charging the multiplier capacitor C M2 . When C M2 is completely charged, D M1 turns OFF. Energy stored in C M2 starts to be transferred to C M1 and the load through D M2 and D 0 . Current through C M1 is given by where L py = L 1P + L 2P + L 3P and n is the turns ratio of CIs. Mode 1 ends when the current through L 2P reaches its maximum value I L 2P,max at time t = t 1 .

B. MODE 2: (t 1 − t 2 )
In this mode, Z 2 is turned OFF while Z 1 and Z 3 are maintained in their respective OFF and ON states. The diode D lift continues to remain in the forward biased condition. Since Z 2 is turned OFF, the stored energy in L 2P is also transferred to C Lift and Stage 2 through C lift and D IBC . As Z 3 is conducting, D 1 remains in the reverse biased state. The current flowing through Z 3 is expressed as In Stage 2, diode D M1 is forward biased and enables C M2 to charge to its maximum value. As Z 1 is OFF, the energy stored in L 1P continues to be transferred to the rest of the circuit (as mentioned in Mode 1) till its current reaches the minimum valueI L 1P,min and marks the end of Mode 2 at time t = t 2 . At the end of Mode 2, using volt-second balance concept, the voltage across C lift is derived and given by (4).
where D is the duty ratio at which the switches are operated.
Mode 3 starts at t 2 when Z 1 is turned ON while switches Z 2 and Z 3 are maintained in their OFF and ON states respectively. The diodes D lift and D 1 are reverse biased due to the operating states of the switches. Since Z 2 is OFF, current through L 2P continues to decrease while the current through energy stored in L 1P and L 3P increases. In Stage 2, the energy stored in C M2 is transferred to C M1 and the load through D M2 and D 0 . Current through C M2 is expressed through (5).
Mode 3 ends when the current through L 3P reaches its maximum value I L 3P,max at time t = t 3 .

D. MODE 4: (t 3 − t 4 )
Mode commences when Z 3 is turned OFF to enable the energy transfer process of L 3P . Diodes D 1 and D IBC are forward biased and participate in the energy transfer process. Switches Z 1 and Z 2 are retained in their ON and OFF states respectively. Hence, diode D lift is in reverse biased condition. Current through Z 1 is given by In Stage 2, after C M2 is fully charged, its stored energy is transferred to C M1 through D M2 . Mode 3 comes to an end at time t = t 4 when current through L 2P reaches its minimum value I L 2P,min .
At the instant t 4 , voltage across C lift is obtained from basic principles and given by (7).

E. MODE 5: (t 4 − t 5 )
At the beginning of Mode 5, Z 2 is turned ON while Z 1 and Z 3 are maintained in ON and OFF states respectively. Consequently, current through L 1P and L 2P raises linearly while the stored energy in L 3P is transferred to Stage 2. In the multiplier network, C M2 charges for some time and discharges its stored energy to C M1 and the load. Current through L 2P is given by At time t = t 5 , the current through L 1P reaches its maximum value and marks the end of Mode 3. Mode 6 begins at the instant t 5 when Z 1 is turned OFF. The other two switches Z 2 and Z 3 are maintained in their respective ON and OFF states. Primary winding L 2P continues to store energy while L 1P and L 3P transfer their stored energies to Stage 2 and load through the diodes D 1 , D IBC and D 0 . Capacitor C M2 starts charging through D M1 and transfers its stored energy to C M1 as soon as it is completely charged. Mode 6 ends at time t= t 6 when the current through L 3P reaches its minimum value. The current through D 0 is given by (9).
At the time instant t = t 6 , C lift is completely charged to a value which is given by (10) based on the basic principles.
At the end of Mode 6, one switching cycle is complete and next cycle commences when the switch Z 3 is gated ON again.

IV. STEADY-STATE ANALYSIS AND DESIGN DETAILS
In this section, the voltage gain of the proposed converter and other design equations are derived from basic principles.

A. STEADY-STATE ANALYSIS AND DESIGN DETAILS
All the components of the proposed converter participate in stepping up V in . The magnitude of voltage gain obtained from Stage 1is given by (11).
Voltage gain obtained from Stage 1 is extended in Stage 2 by the secondary windings of CIs and the VMC network. Based on the connection of the secondary windings, Stage 2 voltage gain is given by (12).
where n is the turns ratio of CIs. By summing up (11) and (12), total ideal voltage gain (M ) of the proposed HGHP converter is obtained and given by (13).
Practically, as the CIs are subjected to leakages, by considering 'k' as the average value of coupling coefficient of 3 CIs, the expression for realistic voltage gain is given by

B. VOLTAGE STRESS ON POWER SWITCHES AND DIODES
Voltage stress experienced by the power switches Z 1 and Z 2 is equal to the potential across C lift . Therefore, voltage stress impressed across them is given by (15).
Due to asymmetry caused by C lift , Z 3 experiences a relatively lower voltage stress which is expressed by (16).
When Z 1 conducts, D lift is reverse biased while D 1 remains reverse biased when Z 3 conducts. Therefore, D 1 blocks a voltage level obtained across Stage 1 given by (15) while voltage stress on D lift is given by (16). From the operating principle, voltage stress on D M1 , D M2 and D 0 is given by (17) and (18). The voltage stress on the semiconductor devices is inversely proportional to n and k of the CIs. Therefore, to minimize the voltage stress across the switches and diodes, a careful choice of n is essential. In addition, the CIs are tightly wound to ensure that the value of k is closer to 1 and voltage stress on the semiconductor devices is reduced. The practical value of k is determined to be 0.88. Fig. 5 shows the operating point of the proposed HGHP converter. By operating the switches at D = 0.55 and using CIs with n = 3, the required voltage gain is obtained when k = 0.88. VOLUME 10, 2022

C. CURRENT STRESS ON POWER SWITCHES AND DIODES
From input-output power balance principle of an ideal power converter, the average input current (I in ) is derived as in (19).
Total input current is shared by the three interleaved phases present in the Stage 1. Current through Z 1 is greater than Z 2 and Z 3 due to the asymmetry in Stage 1 caused by C lift . Current through Z 1 is given by (20). Switches Z 2 and Z 3 carry equal current given by (21).
Correlating the conducting intervals of D lift -Z 1 and D 1 -Z 3 combinations, current through D lift and D 1 is derived and given by (22) and (23).

D. DESIGN OF CAPACITORS
The value of C M1 , C M2 , C lift and C 0 depends on energy transferred through them individually and the voltage ripple across each capacitor. Therefore, the rating of each capacitor is obtained from (24) by substituting the voltage impressed across each capacitor and the individual ripple voltage. (24) where x is the individual capacitors C M1 , C M2 , C lift and C 0 . From the operating principle and the location, the voltage rating of the capacitors is expressed through (25) - (27).

E. DESIGN OF COUPLED INDUCTORS
Design of CIs is important as continuous input current with low ripple content is preferred for PV application. Considering the input current ripple ( I in ), appropriate value of primary inductance (L py ) is obtained and given by (28).
L py = 3DV in f s I in (28) Generally, tight coupling between the primary and secondary windings of the CIs is preferred and its practical coupling coefficient value (k practical ) is determined from (29).
where L 0 and L S are the inductance values measured across primary winding (of an individual CI) when secondary winding is open and short circuited respectively. In the proposed converter, average value is denoted as 'k'.

F. SELCTION OF TURNS-RATIO
Voltage gain of the converter is predominantly determined from the values of turns ratio (n) and duty ratio (D). The turns ratio of the converter is determined from (30).
To meet the high voltage gain requirement, increasing the turns-ratio increases the size of the CIs, whereas lesser value of n translates to operating the switches at larger duty ratio values. As sufficient energy needs to be stored across the CIs and transferred to the load, a nominal duty-ratio value of D = 0.55 is practically chosen for the proposed HGHP application. For the proposed converter, based on the specifications provided in Table 1, the value of n is computed as n = 3.   6 shows the waveforms obtained from the DSO and correspond to gate pulses applied to the power switches present in the designed converter and the voltage obtained across the output terminals. Gate pulses with a moderate duty ratio (D = 0.55) and 120 • phase delay between the three interleaved legs provide the required output voltage which is in accordance with the value predicted using (14). The output voltage is fairly constant with negligible ripple content.

V. HARDWARE RESULTS AND DISCUSSION
The practical voltage stress experienced by the switches Z 1 and Z 3 with respect to the output voltage is depicted through Figs. 7(a) and (b). The turn ON and turn OFF instants of the power switches are in perfect agreement with their respective gate pulses. Further, as majority of the gain extension occurs at Stage 2, the voltage stress magnitude of Z 1 and Z 3 is reduced and in close agreement with (15) and (16).
The voltage spikes impressed on the switches are due to the leakage inductance of the CIs. However, as most of the stored energy is recycled at Stage 2 through the elements present in VMC network, the magnitude of the spikes is much reduced and not alarming.
To replicate the dynamic performance of the HGHP converter when fed from a PV input, the voltage applied to the converter is varied from 48 V to 72 V (80% to 120% of the rated input voltage) while maintaining a constant load. Fig. 8(a) illustrates the variations in the output voltage. The variation in output voltage is very less. From theoretical computations, the duty ratio variation is between 0.6386 and 0.458 to maintain a constant output voltage. At input voltage levels higher than the specified value, the efficiency is expected to be slightly higher due to marginally lower input current magnitude which causes reduced losses.
To obtain the converter performance when load varies, results are obtained through simulation and experimentation. The output voltage variation of the proposed converter for 75%, 100% and 125% of full load with constant input voltage during experimentation is shown in Fig. 8(b). The output voltage is fairly constant under over-load conditions mainly due to the energy storage elements which act as energy buffer during load variations. During light load condition, due to marginal higher voltage level obtained at Stage 1 and Stage 2, the output voltage also slightly increases.
To appreciate the ripple free input current behaviour, simulated waveforms for current through primary windings of the CIs L 1P , L 2P , L 3P and the total input current are shown in Fig. 9(a). Obviously, due to interleaving technique, the total input current is shared among the three interleaved phases.
Further, since voltage lift technique is employed, the current through the three primary windings of the CIs are slightly non-uniform; asymmetry is caused due to the introduction of C lift between the interleaved phases of Stage 1 in the proposed HGHP converter. By properly designing the CIs, the rise and fall of current through the CI primary windings is ensured while maintaining continuous conduction mode. Additionally, due to the interleaving technique being employed in Stage 1, the input current waveform contains very low ripple.

FIGURE 6.
Oscilloscope waveforms to practically validate the voltage gain capability of the proposed HGHP converter; gate pulse applied to Z 1 , Z 2 , Z 3 (CH1, CH2, CH3) and V 0 (CH4). Fig. 9(b) shows the current stress on the power switches plotted along with total input current. The shape of the current through the power switches Z 1 , Z 2 and Z 3 are in agreement with the current flowing through the respective primary windings. Since any two switches simultaneously conduct for a small duration of the duty cycle, the shape of the current waveforms slightly deviates from their respective inductor currents.
Because of the inherent current sharing mechanism due to interleaving, the individual switch current magnitude is much lesser when compared to the total input current magnitude. However, due to structural asymmetry, the current sharing is not uniform. Nevertheless, the current sharing pattern is in perfect agreement with (20) and (21) and does not affect the converter performance. Fig. 10(a) shows the voltage and current waveforms captured at the input and output terminals when the converter delivers rated power (3 kW) to the load. Output voltage and the input current waveforms confirm the voltage gain and power handling ability of the proposed HGHP converter. Furthermore, the ripple magnitudes of I in and V 0 are very low and confirm the design of passive elements. Fig. 10(b) show VOLUME 10, 2022 The converter operates at a maximum efficiency of 92.3% under rated load condition. The output voltage of the converter varies by 2.67% of rated value when the load is increased to 125% of the rated load. The total power loss occurring in the converter is estimated using the expressions presented in [26] and [40]. The power loss distribution profile of the proposed HGHP converter is developed and presented in Fig. 11. Fig. 12 shows the top angle photograph of the experimented converter. Devices with SOT227 package are employed. Heat sinks are located at the back side of the board. The converter dimensions are 0.30 m × 0.22 m × 0.065 m (length × breadth × height). Table 2 provides the details of components that are used to fabricate and test the proposed converter. Fig. 13 shows the photograph of the experimental setup.
The suitability of the proposed HGHP converter to implement maximum power point tracking (MPPT) algorithm is demonstrated through Fig. 14. The variation in duty ratio is obtained using where D MPP is the duty ratio required to track maximum power point, R Conv-MPP is the equivalent resistance seen by the source at maximum power point and R L is the load resistance. When the solar irradiation undergoes variations, the input power available from the PV source also changes. Due to the implementation of MPPT algorithm, the output power  follows the input power variation. Thus, the proposed HGHP converter is capable of extracting maximum power from the input PV source and delivering the same to the load when irradiation varies.
By implementing a simple closed-loop control, the output voltage of the proposed HGHP converter is regulated.

VI. PERFORMANCE BENCHMARKING
To highlight the salient features of the proposed HGHP converter, some of its main attributes are benchmarked with few state-of-the art high gain converters. The comparison summary is presented in Table 3 and the salient features are elaborated. VOLUME 10, 2022

A. VOLTAGE GAIN AND POWER LEVEL
All the converters considered for comparison provide a minimum voltage gain of 10 at safe duty ratio values except [27] in which the duty ratio is slightly higher at 0.742. However, their power delivering capabilities are significantly lower when compared to the proposed HGHP converter. The converter presented in [40] offers the second highest voltage gain value of 15.83. However, the converter's power rating is only 100 W. The converter described in [37] offers the lowest voltage gain value in the vicinity of 10 with low power handling capability. The converter detailed in Andrade et al. [35] yields a good voltage gain of 13.33 at 200 W power level. The proposed HGHP converter yields the second highest voltage gain value of 18.33 at a significantly higher power level of 3 kW. The highest power level is mainly due to the employment of CI based three-phase IBC in Stage 1. In some of the other converters that are compared, despite using CIs, the technique employed for achieving high gain is responsible for their reduced power handling capability.

B. TOTAL COMPONENT COUNT (TCC) AND M/TCC
The converter discussed in [36] uses the maximum number of components (20) to obtain a voltage gain of 13.33 resulting in the second lowest M /TCC value of 0.66. The converter described in [27] uses only 10 components to yield a high voltage gain value of 12.5; its M/TCC value translates to 1.25. However, the switches are operated at a high duty ratio value of 0.742. The converter elaborated in [40] uses 14 components to offer a reasonably higher voltage gain value of 15.83 at a duty ratio value of 0.65. Hence, its M /TCC value translates to 1.13 which is the third highest among the converters that are compared. The converter detailed in [37] and the proposed HGHP converter use 16 components each. Despite using 4 magnetic elements, the converter in [37] offers only a voltage gain of 10.33 while the proposed HGHP converter yields the second highest voltage gain value of 18.33 by adopting only 3 CIs. The proposed HGHP converter outshines the other converters when observed from the perspective of excellent power handling capability and M /TCC value.

C. VOLTAGE STRESS ON THE SWITCHES
Generally, low voltage stress on the switches is preferred for high voltage gain applications. The location of the switches and the techniques that are employed to achieve the required high voltage conversion ratio determine the voltage stress on the switches. Despite providing the second highest voltage gain value, the converter presented in [40] is subjected to the highest voltage stress value (50% of V 0 ) mainly due to the interleaved quadratic boost converter structure which is adopted.
The converter described in [37] provides a voltage gain of 10.33 only. The switches employed in the converter block the voltage developed across the charge-pump capacitors. Resultantly, the switches experience a high voltage stress (45% of V 0 ). For the converter presented in [27], the high voltage gain value is mainly due to the high duty ratio value. Consequently, the switches are subjected to a voltage stress which is close to one-third of V 0 . The converter presented in [36] employs hybrid combinations of gain extension techniques. In the process, many components are employed and the switch is also judiciously located closer to the input. Resultantly, the switch is subjected to the least voltage stress value of just 15% of V 0 . The proposed HGHP converter employs 3-phase IBC structure in Stage 1 and VMC based gain extension mechanism is adopted at the secondary side of the CIs. As majority of the voltage gain occurs at the secondary side, the switches are subjected to a reduced voltage stress level of about 36% of V 0 .

D. CURRENT RIPPLE
Among the converters compared in Table 3, the converter discussed in [40] and the proposed converter employ interleaving mechanism. Resultantly, the input current ripple is low (12.9% and 15%) respectively. The converters described in [27], [36], and [37] rely only on the energy storage inductor  which is located at the input side for reducing the ripple current. Consequently, depending on the duty ratio values, the ripple current magnitudes are also higher. In fact, in [36], the converter operates in discontinuous conduction mode (DCM) for some duration.

E. EFFICIENCY
All the converters compared in Table 3 operate at good efficiency values ranging from 92.3% to 94.3%. In fact, the efficiency values of all the converters are very close to each other. Since the voltage stress across the switches employed in all the converters compared in Table 3 is only about one-third of the output voltage, the converters are capable of operating at reasonably good efficiency values. Nevertheless, considering the voltage gain and power handling capability, the efficiency value of the proposed HGHP converter is appreciable.

VII. CI BASED CONVERTERS VERSUS THE PROPOSED HGHP CONVERTER
The power rating of the converters compared in Table 3 are very low compared to the proposed HGHP converter. In order to ensure a fairer comparison and justify the superior features of the proposed HGHP converter, some CI based high gain converters which yield a minimum voltage gain of 13 are compared. Table 4 summarizes the attributes that are compared.
Generally, in non-isolated high gain DC-DC converters, higher voltage gain is achieved by using (i) coupled inductors with appropriate turns ratio and (ii) higher number of passive components. All the converters that are compared utilize one or more coupled inductors. The converter presented in [47] employs two dual CIs; no gain extension cells are included. Since the converter uses only 11 components and CI with n = 1.33, its M /TCC is slightly greater than the proposed HGHP converter. However, its P 0 /M and P 0 /TCC are lesser than the proposed HGHP converter despite operating at 1 kW power level.
The converter described in [46] uses two three winding coupled inductors in their topology to achieve an excellent voltage gain value of 20. The converter has few advantageous features like (i) unity turns ratio, (ii) less component count (14) and (iii) low voltage stress on the switches. However, owing to its low power handling capability of 400 W, its P 0 /M and P 0 /TCC ratios are very less compared to proposed converter.
The converter presented in [45] offers a good voltage gain of 14.92 using only 12 components with the least voltage stress on the switch. However, due to the lower power rating of about 216W, the P 0 /M and P 0 /TCC ratios of the converter becomes negligible.
Both the proposed HGHP converter and the one presented in [26] offer the same voltage gain and operate at the same power levels; their P 0 /M ratio values are the highest and equal to 0.163. However, in [26], to achieve a high voltage gain and higher power handling capacity, combination of CIs and voltage extension cells are employed. Consequently, the TCC value is the highest in [26] which results in a relatively lower M /TCC and P 0 /TCC ratio values as compared to the proposed HGHP converter.
The switches of all the converters compared in Table 4 are subjected to a low voltage stress value only. Significantly, the switches employed in [45] and [46] suffer from the least and second least voltage stress values; the use of voltage gain extension mechanism and the power levels result in low voltage stress values. The converters employed in [45] and [47] use only the energy storage inductors for limiting the input current ripple. The other converters compared in Table 4 use interleaving technique which results in reducing the input current ripple to a large extent. Since all the converters employ switches which are subjected to reduced voltage stress levels, the efficiency values of all the converters are very close to each other and vary within a narrow range from 92.3% to 94.05%. Fig. 16 provides a graphical illustration of the some of the salient features of the proposed HGHP converter and some CI based state-of-the art high gain converters.
In the proposed HGHP converter, though the component count is on the higher side, CIs with appropriate turns ratio are employed to handle a reasonably large power (3kW) output. Moreover, the switches are also subjected to reduced voltage stress levels only. Hence, the proposed HGHP converter is more advantageous for deployment in sustainable energy applications as compared to the other converters.

VIII. CONCLUSION
In this paper, the key role of power electronic converters in some solar PV fed DC microgrid applications was highlighted. A high-gain high-power DC-DC converter was selected, synthesised, designed and practically tested considering a 1.1 kV DC distribution line. The proposed converter was tested from a 60 V DC input and yielded 1.1 kV to 3 kW load at 92.3% efficiency. A high voltage conversion ratio of 18.33 at high power level of 3 kW was practically realized. The high voltage gain with higher power handling ability was achieved by hybrid combination of interleaved structure which used coupled inductors, voltage lift capacitor and VMC network. The power switches and diodes experienced lower current and voltage stress due to interleaving and the type of voltage gain extension techniques adopted. The maximum voltage and current stress levels were just 36% and 33% of the output voltage and input current respectively. Due to the gain extension achieved by the CIs and VMC network, the stored energy in the leakage inductance was partially recycled and this resulted in reducing the voltage stress on the semiconductor devices. Due to interleaving technique, the input current ripple was only 15% of the total current magnitude. Experimental results obtained under dynamic conditions at the input and output side prove the versatility of the developed converter. The desirable and salient features of this converter prove to be a good candidate topology for DC microgrid and renewable energy applications.