An Improved Synthesis Method Based on ILPP and Colored Petri Net for Liveness Enforcing Controller of Flexible Manufacturing Systems

Petri nets are used to design deadlock control strategies for flexible manufacturing systems (FMSs), which typically involve the addition of monitors and the associated arcs to the FMS. The addition of several monitors and associated arcs to the first constructed Petri net model significantly complicates the Petri net controller. This paper develops a two-step method for preventing deadlocks based on a colored Petri net and a structurally minimal approach that significantly reduces the number of monitors. In the first step, a vector covering technique is applied to generate a minimal covered set of first-met bad markings (FBMs) and legal markings that are respectively smaller than the sets of FBMs and legal markings. At one iteration, place invariants (PIs) corresponding to monitors are constructed by solving an integer linear programming problem (ILPP) to prohibit the maximum number of FBMs, while allowing all legal markings in the minimal covering set. The purpose of the ILPP is to maximize the number of FBMs forbidden by the PIs. Then, based on a colored Petri net, all generated monitors are combined into a global control place. Therefore, a supervisor with minimal structural complexity can be constructed. The obtained net model is controlled after the addition of the designed supervisor. Two instances from the literature are considered to illustrate the proposed approach.


I. INTRODUCTION
A flexible manufacturing system (FMS) executes a variety of tasks through the use of several processes that compete for finite resources including machines, robots, buffers, and fixtures [1], [2]. In an FMS, deadlock can occur as a result of processes competing for system resources [3]. In general, a deadlock causes a system to become inefficient and blocked, and may even result in destructive behavior, which is usually undesirable. As a result, a variety of methods have been developed to address the deadlock problem, including detection The associate editor coordinating the review of this manuscript and approving it for publication was Remigiusz Wisniewski . and recovery of deadlock [4], [5], avoidance of deadlock [6], [7], and prevention of deadlock [1], [2], [8]- [11].
Petri nets (PNs) are efficient mathematical and graphical modeling, analysis, and control tools for FMS deadlocks [2], [12], [13]. It is used to depict the FMSs' properties and behaviors, including conflict, sequencing, and synchronization. Additionally, PNs can be applied to represent characteristics such as liveness and boundedness [8]. The advantage of PNs over other modeling and simulation tools such as Arena [14], [15], queuing network models [16], digraph [17], and automata [18] are that they provide a simple representation of the systems. Petri nets are qualified to represent systems top-down at multiple levels of analysis and complexity, and they have a strong mathematical foundation that permits both qualitative and quantitative study of such systems [9]. Deadlock prevention approaches are being pursued by a number of researchers, which can work as criteria for liveness-enforcing supervisors. These criteria involve behavioral permissiveness, which improves the system's resource utilization, and structural complexity, which results in a controller with a small number of control places, thus also reducing hardware and software costs, and computational complexity, which permits the implementation of a deadlock control approach to the large-scale systems [9], [10], [19]- [22].
Generally, structural analysis [10], [23], [24] and reachability graph analysis [25]- [27] are used to synthesize deadlock prevention methods based on Petri nets. Structural analysis is a powerful method for overcoming deadlocks in certain types of Petri net structures. In comparison to structural analysis methods, reachability graph-based methods can result in optimal or near-optimal controllers for generalized Petri net systems. Furthermore, these approaches must list all of the system's reachable states [8], [28], [29]. The purpose of this study is to discuss methods for analyzing reachability graphs. All markings (states) on a system can be classified into two groups, legal and illegal, based on their compliance with a control specification. In the deadlock prevention specification, a marking is considered legal if it or one of its successor states may transition back to the original marking; otherwise, it is an illegal state. A monitor is optimal if it prevents all illegal states while enabling legal states. In the studies [30], [31], a reachability graph is classified into a live zone (LZ) and a deadlock zone (DZ), with the LZ including all legal states and the DZ containing all illegal states. Then, a first-met bad marking (FBM) is classified as one that is illegal and indicates the LZ's initial entry into the DZ. First-met bad markings are a subset of illegal states associated with deadlocks, as the system cannot enter the DZ if all of them are prevented. Therefore, if a set of monitors is constructed to prohibit all first-met bad markings, then certain legal states may be forbidden. Such that, the generated supervisor cannot be guaranteed to be behaviorally optimal and also faces structural complexity as a result of a large number of monitors developed. The study [8] proposes a vector covering strategy to solve the above problem by analyzing the relationship between various states. Without considering all legal markings and all FBMs, they first proposed minimal covering sets of legal and FBMs markings be used in designing monitors. However, because a monitor is needed for each first-met bad marking in the minimal covered set of FBMs, a supervisor has an insufficient number of monitors. Chen and Li [28] extend this method by showing how to develop a structurally minimal controller that utilizes the fewest feasible monitors. No redundant monitor exists when this technique is used [21], [28]. Moreover, it guarantees that the supervisor obtained is behaviorally optimal. However, due to the complexity of solving an integer linear program with an excessive number of constraints and variables, it is difficult to construct a maximally permissive supervisor in an acceptable amount of time using this method for a complicated net model.
In this study, we extend a strategy for supervisory control based on a controller's structural minimization. Without the need for iterations, the structurally minimum method is applied to formulate an integer linear programming problem (ILPP). By solving this ILPP, it is possible to achieve a set of optimal or near-optimal monitors while minimizing the monitors. Consequently, the designed monitors are significantly reduced, and the redundancy test is omitted. Finally, by adding a minimal number of monitors, the final net model becomes live. In comparison to previous work [34], our approach enables the development of an optimal or nearoptimal supervisor with fewer monitors and without the need for iterations.
The rest of the paper is structured as follows: Section II presents some of the basic concepts employed in this research, including Petri nets, monitor synthesis using a place invariant, and the structurally minimal method. Section III provides a policy for supervisors with simple structures to prevent deadlocks. Several experimental results obtained using the developed approach are shown in Section IV. Finally, Section V presents conclusions and future research. 1. an ordinary net if W (p, t) = 1, ∀(p, t) ∈ F, p ∈ P, and t ∈ T . 2. a weighted net if W (p, t) > 1, (p, t) ∈ F, ∃p ∈ P, and Assume that a node a ∈ P ∪ T , the preset and postset of a can be respectively represented as

B. ANALYSIS OF REACHABILITY GRAPH
Consider the reachability graph R(N,M 0 ) of a net N . For purposes of deadlock control, markings in an R(N,M 0 ) can be categorized as good, bad, dangerous, and deadlock. A good marking is one that is capable of reaching both the initial and subsequent markings. A bad one has successors, but they cannot achieve the initial marking. A dangerous marking is capable of reaching the initial marking, but at least one of its successors cannot reach the initial marking. A deadlock implies a dead state in a system that has no successor. To ensure optimal supervision, the controlled system should include both dangerous and good markings; these are the legal markings indicated by M L . The legal markings for a PN system are stated as A reachability graph is divided into two zones in [30], [31]: a live zone (LZ) and a deadlock zone (DZ), with the live zone containing all legal markings and the deadlock zone containing all illegal markings. An FBM is a specific illegal marking that can be created by firing one transition from the live zone to the deadlock zone. The FBMs are indicated by M FBM and mathematically represented as Yamalidou et al. [32] developed a technique based on PI for enforcing algebraic constraints on Petri net elements through the construction of monitors (control places), which includes the initial marking and associated arcs. Let [N p ] with n places and m transitions represent the incidence matrix of an original net that must be controlled. The monitors can be expressed as a matrix containing the arcs connecting the monitors to the original net's transitions, denoted as [N c ]. The original net and the monitors are combined into a controlled net with an incidence matrix as The following constraint must be satisfied when there is a control requirement: where β and l i are positive integer constants, and M (p i ) is the marking of the p i . Eq. (3) is transformed by the addition of a positive slack variable M (p c ) (the initial marking of a monitor p c ), and Eq.
Eq. (4) defines a place invariant that must fulfill the equation can be stated as At the initial state, the initial marking M o (p c ) of a monitor p c can be formulated as

D. OPTIMAL MONITOR FORMULATION
Suppose we have an AMS with a net (N, M o ) and its reachability graph R(N, M o ), which comprises of the M L markings and the M FBM markings. In this study, tokens in operation places (denoted as P A , P A ∈ P) are only considered for the purpose of obtaining a PI to prevent an FBM, indicated as NA = {i|p i ∈ P A }. To prevent an FBM M ∈ M FBM , the following constraint must be enforced: The prohibited condition is denoted by Eq. (7). To ensure the maximally permissive control, after adding a monitor, all legal markings must be kept. To guarantee that no marking M'∈ M L can be prevented, coefficients l i (i ∈ NA) should meet the reachability conditions By substituting the β in constraint (8) into constraint (9), the legal markings reachability conditions for an FBM can be formulated as For the coefficients li's, solving constraint (10) generates a set of feasible solutions. Consequently, an optimal PI is calculated to guarantee that no FBM occurs and that all legal markings are reachable.
To decrease the number of legal markings M L and the number of FBM M FBM , the study [8] introduces a vector covering method for the place invariant control, with the following details: This section describes how to construct a place invariant PI, which prohibits the maximum number of FBMs. We can develop a PI to prohibit a certain FBM using an approach described in Section II-D. Indeed, more FBMs may be prohibited by a PI. Next, we design a method to increase the number of FBMs, which a PI prohibits. Initially, we use the notations N * I , N * FBM and N * LM to indicate the number of PIs, where ljk's are the coefficients of I j , I j (j ∈ N * FBM ) a set of binary variables, and β j is a positive integer variable. In constraint (12), if PI I j is selected to prohibit FBM, then I j = 1, otherwise, I j = 0.
To represent the relationship between I j and M l in M * FBM , a set of binary variables f jl s (j,l ∈ N * FBM ) is introduced. Constraint (13) is modified as where f jl ∈{0, 1} and H is a sufficiently large positive integer value. In constraint (14), f jl = 1 shows that I j prohibits M l , while f jl = 0 denotes that M l cannot be prohibited by I j and it is redundant constraint. Constraints (15) and (16) guarantees that each FBM can be prohibited by one PI I j as Constraints (17) ensures that at least one FBM can be prohibited by one PI I j as The objective function maximizes the set of FBMs which, a PI prohibits and can be formulated as Max z= The coefficients of I j and β j must meet the conditions of reachability. Therefore, to design PI, the following ILPP is constructed, namely, an improved maximum number of forbidding FBM problem (IMFFP). IMFFP: l∈N * The IMFFP objective function z is employed to maximize the set of FBMs prohibited by PIs and to achieve a structurally minimal and behaviorally optimal supervisor, by ensuring that all markings in M * L are reachable and the number of monitors is minimized.
Theorem 1: If z = 0, no FBM in M * FBM has a maximally permissive PI.
Proof: Assume that there is a PI I j , which can prohibit marking M l ∈ M * FBM by contradiction. Due to the permissive design of I j , its coefficients l 11 , l 12 ,. . . , satisfy constraint (19). Given that M l is prohibited by I j , we have k∈NA l jk .M l (p k ) ≥ β j .I j + 1. Thus, f jk = 1 satisfies constraints (20)(21)(22). We have z = l∈N * FBM f jl ≥ 1, ∀j ∈ N * I . This contradicts z = 0. As a result, the conclusion is correct.
As known, it is NP-hard to solve an ILPP. The computational time required to solve an IMFFP is strongly influenced by the number of variables (denoted by N v ) and constraints (denoted by N c ) in it. Thus, we can discuss IMFFP in terms of its number of variables and constraints. The number of variables l jk 's (j ∈ N *

A. DEADLOCK PREVENTION METHOD-BASED IMFFP
In this section, we present a structurally minimal method and the deadlock prevention policy to prevent deadlocks by using IMFFP. The structurally minimal method is applied in one iteration to develop a set of maximally permissive monitors and minimize their number. The main advantage is that a few number of monitors are designed and it allows for the development of an optimal or nearly optimal supervisor. Algorithm 1 illustrates the deadlock prevention method based IMFFP.
Consider the FMS example in Figure 1 to demonstrate the proposed Algorithm 1. Figure 2  Now, Algorithm 1 is considered, we introduce 1. three binary variables I 1 , I 2 , and I 3 to be computed.
The above IMFFP is solved using the Lingo solver, and the optimal solution is l 12 = 2, l 15 = 1, l 16 = 1, I 1 = 1, β 1 = 2, f 12 = 1, f 13 = 1. Then, a monitor p c1 is developed for PI1: 2µ 2 + µ 5 + µ 6 + µ pc1 = 2. Thus, I 1 prohibits FBM2 and FBM3, and the preset transitions, postset transitions, and initial marking of the monitor p c1 are respectively · p c1 = {2t 2 , t 7 }, p · c1 = {2t 1 , t 5 }, and M 1o (p c1 ) = β 1 = 2. In addition, l 33 = 1, l 35 = 1, I 3 = 1, β 3 = 1, f 31 = 1. Then, a monitor p c2 is developed for PI2: µ 3 + µ 5 + µ pc2 = 1. Thus, I 3 forbids FBM1, and the preset transitions, postset transitions, and initial marking of the monitor p c2 are respectively · pc 2 = {t 3 , t 6 }, pc · 2 = {t 2 , t 5 }, and M 1o (p c2 ) = β 3 = 1. All rest variables are equal zero. Table 1 presents a summary of the results, with the first column indicating the calculated PI I j , the second column indicating the number of covered FBMs in M * FBM that are prohibited by I j . The third to fifth columns indicating respectively the output transitions p · cj , the input transitions · p cj , and initial marking (M 1o (p cj )) of monitor p cj . The sixth and seventh columns indicating respectively the number of variables N v and the number of constraints N c in IMFFP. The last column indicating the required computational time (denoted by (s)) to solve the ILPP. Figure 3 illustrates the controlled system after adding two monitors to the initial net model.  Figure 2. 1. A transition t j is said to be a process-resource-enabled if (28) and . (29) 2. At marking M , the transition t j can fire if the t j is enabled and the marking M transformed to marking M as follows. Algorithm 2 illustrates the deadlock prevention method by using IMFFP and CPN. Reconsider the controlled net in Figure 3 to demonstrate the proposed Algorithm 2. Figure 4 depicts the p global place of all control places P V in Figure 3, as generated by Algorithm 2. The output arcs of p global that obtained from Algorithm 1 are represented as p · c1 = {2t 1 , t 5 } and pc · 2 = {t 2 , t 5 }. Therefore, T DCo can be represented as T DCo = {2t 1 , t 2 , 2t 5 }, as depicted in Figure 5. The input arcs of p global that obtained from Algorithm 1 are represented as · p c1 = {2t 2 , t 7 } and · pc 2 = {t 3 , t 6 }. Thus, T DCi be stated as T DCi = {2t 2 , t 3 , t 6 , t 7 }, as displayed in in Figure 6. In addition, M DCo (p globa l) = M 1o (V S ) = M 1o (p c1 ) + M 1o (p c2 ) = 2 + 1 = 3. Petri net model in Figure 3 contains two color types: C DC = {C pc1 , C pc2 }. Accordingly, as shown in Figure 7, the p global has three colored tokens: two tokens with color C pc1 and one token with color C pc2 . Finally, the controlled colored Petri net (N CN , M CNo ) of the net shown in Figure 3 using Algorithm 2 is presented in Figure 8.

IV. EXPERIMENTAL RESULTS
In this section, we demonstrate the application of the proposed Algorithms 1 and 2 by presenting some FMS examples. C++ programs are applied to generate the minimal covered sets of FBMs and legal markings, as well as to construct IMFFP that can be used in Algorithm 1. Then, the Lingo solver was used to solve IMFFP. In addition, we have coded Algorithm 2 to construct the global control TABLE 2. Calculated monitors using Algorithms 1 for the net shown in Figure 9.

TABLE 3.
Comparison of Algorithms 1 and 2 performance with some deadlock prevention methods for the net shown in Figure 9.   point using the GPenSIM tool [33]- [36]. Figure 9 illustrates a Petri net model, which has been studied in [8], [10], [21], [28], [37]- [40].  Table  2. Next, the two resulting monitors using Algorithm 1 are combined to form p globa l using Algorithm 2. The output arcs of p global are represented as T DCo = {t 1 , 5t 2 , 2t 4 , 4t 9 , 7t 11 }. The input arcs of p global are represented as T DCi = {3t 5 , 5t 6 , 3t 7 , t 12 , 7t 13 }. In addition, M DCo (p globa l) = M 1o (V S ) = M 1o (p c1 ) + M 1o (p c2 ) = 9 + 14= 23. Thus, we have two color types: C DC = {C pc1 , C pc2 }. The p global place has 23 colored tokens: 9 tokens with the color C pc1 and 14 tokens with the color C pc2 . Table 3 shows the comparison the Algorithms 1 and 2 to other existing deadlock control methods in terms of the numbers of added monitors, added arcs, and states of the controlled net. Algorithm 2 yields a supervisor with one monitor and 10 arcs, both of which are minimal in comparison to other methods in [8], [21], [37]- [39].
Next, Figure 10 illustrates a Petri net model, which has been studied in [41], [44], [45]. It consists of 26 places   Table 4 illustrates the computed monitors for the model presented in Figure 10 using Algorithm 1. Then, the six resulting control places using Algorithm 1 are combined to form p globa l using Algorithm 2. The output arcs of p global are represented  Figure 10.
Thus, we have six color types: C DC = {C pc1 , C pc2 , C pc3 , C pc4 , C pc5 , C pc6 }. The p global place has 341 colored tokens: 71 tokens with color C pc1 , 196 tokens with the color C pc2 , 34 tokens with the color C pc3 , 2 tokens with the color C pc4 , 2 tokens with the color C pc5 , and 2 tokens with the color C pc6 . Finally, the comparison of the Algorithms 1 and 2 performance with some deadlock prevention methods in terms of the numbers of added monitors, added arcs, and states of the controlled net is shown in Table 5. Algorithm 2 provides a controller with one control place and 22 arcs, both of which are minimal in comparison to other methods in [8], [21], [30], [39], [41]- [43].

V. CONCLUSION
This paper presents an approach for preventing deadlocks based on colored Petri nets and a structurally minimal method. First, a vector covering technique is applied to calculate a minimal covered set of FBMs and legal markings. By solving an ILPP in one iteration, place invariants corresponding to control places are constructed to prohibit the maximum number of FBMs. The first-step-obtained controlled model makes the Petri net supervisor significantly more complicated. In the second step, colored Petri nets are applied to design the smallest number of monitors by integrating all generated control places into a single global control place. In comparison to previous work [8], [21], [30], [37]- [39], [41]- [43], our approach enables the development of an optimal or near-optimal supervisor with fewer monitors and without the need for iterations to design place invariants to prohibit the FBMs, while there are no prohibited legal markings.
The main disadvantage of the developed approach is that it is subject to modifications in control requirements and specifications, such as adding new equipment and products or modifying the system's processing routes. In the case that these problems appear, the system must be changed. The proposed model may thus be subject to new deadlock problems. Therefore, our future study will focus on optimizing the efficiency of the proposed method for valid and quick reconfiguration of the FMS [46] and the fault and its security issues [47], [48].
ABDULRAHMAN AL-AHMARI received the Ph.D. degree in manufacturing systems engineering from The University of Sheffield, Sheffield, U.K., in 1998. He has worked as the Dean of the Advanced Manufacturing Institute, the Chairman of the Industrial Engineering Department, and led a number of funded projects from different organizations in Saudi Arabia. He is currently a Professor of industrial engineering with King Saud University, Riyadh, Saudi Arabia. He has published papers in leading Journal of Industrial and Manufacturing Engineering. His current research interests include advanced manufacturing technologies, Petri nets, analysis and design of manufacturing systems, computer integrated manufacturing, optimization of manufacturing operations, flexible manufacturing systems and cellular manufacturing systems, and applications of decision support systems in manufacturing.
ZHIWU LI (Fellow, IEEE) received the B.S. degree in mechanical engineering, the M.S. degree in automatic control, and the Ph.D. degree in manufacturing engineering from Xidian University, Xi'an, China, in 1989China, in , 1992, and 1995, respectively. He joined Xidian University in 1992. Over the past decade, he was a Visiting Professor at the University of Toronto, Technion (Israel Institute of Technology), Martin-Luther University, Conservatoire National des Arts et Métiers (CNAM), Meliksah Universitesi, the University of Cagliari, the University of Alberta, and King Saud University. He is currently with the Macau University of Science and Technology. His current research interests include Petri net theory and application, supervisory control of discrete event systems, workflow modeling and analysis, system reconfiguration, game theory, and data and process mining. He is listed in Marquis Who's Who in the World, 27th Edition, in 2010. He was a recipient of an Alexander von Humboldt Research Grant, Alexander von Humboldt Foundation, Germany, and Research in Paris, France. He is the Founding Chair of Xi'an Chapter of IEEE Systems, Man, and Cybernetics Society. He serves as a reviewer for more than 90 international journals.
WADEA AMEEN received the M.Sc. and Ph.D. degrees from King Saud University, Saudi Arabia. He is currently an Assistant Professor with the Faculty of Engineering and Architecture, Industrial Engineering Department, Al-Yamamah University, Saudi Arabia. His research interests include additive manufacturing; CAD/CAM, product design analysis, and design of manufacturing systems; and optimization of manufacturing processes. VOLUME 10, 2022