Open Loop Synchronization Techniques Benchmarking for Distributed Energy Sources Connection

Synchronization is a crucial process in the operation of grid-connected distributed energy sources. Synchronization techniques are classified in closed-loop (CLS) and open-loop synchronization (OLS) techniques. Unlike the CLS technique, OLS techniques are recent and less known. This paper discusses a comparative analysis of the three prominent state-of-the-art OLS techniques. Accordingly, a benchmark model is proposed to systematically evaluate the performance of the OLS techniques under grid voltage disturbances such as harmonic distortions, voltage unbalance, DC offset, and low voltage ride through operation. Given the hardware resource utilization, the computational complexity and the execution time are also presented to judge the efficacy of the proposed model. Thus, engineers/or researchers can better understand the choice of hardware resources and the preferred dynamic performance of a synchronization scheme applied to control and protect a grid-tied power converter. Simulation and experimental results are presented and discussed to demonstrate the purpose of the proposed model.


I. INTRODUCTION
I N a modern power grid, distributed energy sources (DESs), mainly based on renewable energy, have an increasing share of the overall generation. To connect a power converter to a grid, one needs to provide it with information on the voltage phase and frequency. A synchronization algorithm is used to provide the power converter controller with such information. Traditionally, the synchronous reference frame phase-locked loop (SRF-PLL) is used for synchronization. The conventional SRF-PLL has a wide-bandwidth; thus, it can track fast and accurately the sudden phase or frequency jump. However, the presence of harmonics, voltage unbalance, and DC offset will seriously degrade its output. Filtering out these adversaries requires a narrowbandwidth. For a long time, SRF-PLL provided a sufficient synchronization technique where the rapidity and accuracy were the main concern in the traditional power grid. However, the move from the centralized large power plant to the distributed renewable energy sources compromised the grid stability and deteriorated the quality of the voltage. Hence, the modern power grid is subjected to new standards and requirements that are developed in response to the increased penetration of DES and to enhance the stability and reliability of the grid [1]. Meeting these requirements involves providing the connected power converter with fast and accurate information about the grid voltage phase angle. The large penetration of power electronics in the modern power grid requires a synchronization technique that is simultaneously fast and robust; thus, conventional methods are no longer viable. In the last decade, many advanced synchronization techniques have been proposed in the literature [1]- [9]. The main effort of researchers is to develop a fast synchronization technique with high disturbance rejection capability and low computation burden [4], [6], [10]- [12].
By design, a PLL is susceptible to harmonics; hence, an in-loop or pre-loop filter is used. Introducing an in-loop filter will affect the dynamic of the PLL. Using apre-loop filter will complicate the algorithm of the PLL since these filters are implemented in the stationary frame [10], [13], [14]. A frequency-locked loop (FLL) has been proposed to replace the PLL in power systems and power electronics applications [4], [8], [15], [16]. An FLL is a PLL implemented in a stationary frame [3]; hence, it suffers from the same dilemma, keeping it simple and fast while enhancing its disturbances capability. The closed-loop synchronization technique, namely PLLs and FLLs, has a struggle between the stability margin, bandwidth, and filtering.
In general, an OLS scheme is unconditionally stable and immune to disturbances [25], [30]. However, to be satisfactorily efficient, an OLS needs to be fast with low computational complexity. Three OLS techniques, including enhanced open-loop synchronization (ETOLS) [25], pseudoopen-loop synchronization (POLS) [31], and reduced-order generalized integrator (ROGI) based technique [32], are within the scope of these requirements. Unlike the previously reported OLS techniques, these techniques omit sine or cosine calculations to make their implementation in a lowcost microcontroller easier. Other advantages of these three techniques are the overall simplicity of the algorithm and easy tuning.
While the PLL and the FLL had their share of reviews [2], [4], [6], [10], [11], the OLS technique is relatively new, and as the knowledge of authors, no benchmarking is made to evaluate these techniques. While each technique was submitted to a certain test to confirm its performance, these tests differ from one paper to another.
To fill the gap in the state of the art of OLS, this paper proposes a benchmarking model that will allow distinguishing the performance of each technique. The benchmarking includes the main events that may occur in a power grid. To meet the standard and recommendation applied to the connection of a DES to the grid [33]- [37], the severity of the perturbation is elevated without exaggeration. For a better assessment, a systematic procedure that implies, not only the typical visual evaluation used in most publications, but also, a quantitative evaluation to give more insight into the performances of the synchronization method. Authors seek to provide a simple benchmark to the non-synchronization experts to evaluate several synchronization techniques to choose a proper method for their application.
The rest of the paper is organized as follows. Section II presents the mathematical model and the block diagram of methods. A benchmark is presented in Section III and applied to the methods as shown in Section IV. In Section V, a real-time implementation of the selected OLS techniques is presented. Finally, in Section VI, a discussion followed by a conclusion that summarizes the findings of the paper is presented.

II. OPEN-LOOP SYNCHRONIZATION TECHNIQUES
The quest of developing benchmarking models begins by revisiting three well-known pre-filtering techniques, i.e., the delayed signal cancellation operators directed towards the development of enhanced open-loop synchronization technique [25] and intermediate αβ-axes signal cross-coupling based synchronization techniques [31], [32]. It is important to stress that the organization of the fundamental phase detector unit in the respective schemes is of the same interest and avoided due to the wide acceptance. Further, the fundamental in-phase and quadrature signal extraction is an essential task achieved by a fast-responding pre-filtering stage. Consequently, the estimated phase angle information required for the generation of clean reference and optimal control of a grid-tied power converter is always dependent on the strong disturbance rejection ability of a synchronization scheme. With this interest, the mathematical model of the respective approaches, along with the merits and demerits, are discussed in this section.

A. ENHANCED OPEN-LOOP SYNCHRONIZATION (ETOLS)
In [25], the authors proposed a new open-loop synchronization technique named True Open-Loop Synchronization (TOLS). This method is based on multiple delayed signal cancellation (DSC). The DSCs are implemented in the αβ frame; thus, authors refer to it as αβCDSC ( αβ).

1) The Delayed Signal Cancellation Operator
In a three-phase system, the Clarke transformation is given by If the voltage is contaminated with harmonics, the v v v αβ is the sum of all harmonics given by: Where v v v h αβ = V h e hωt+ϕ h V h is the magnitude. ω: Fundamental angular frequency. ϕ: The phase angle. h: is the harmonic order h=1,2...
The signal v v v αβ can be viewed as a group of space vectors, each of which is rotating at a speed of hω and having its magnitude and phase. Positive sequence harmonics  (7,13,19) rotate counterclockwise -in the same direction as the fundamental-generating heat by the Joule effect. Negative sequence harmonics (5,11,17) rotates clockwise causing motor torque problems [38]. Lets v v v h αβ a harmonic vector. Adding T /n (where T is the fundamental cycle and n is a delay factor) will delay the vector by (T /n) second or by a θ n rad. θ n = hωT /n = 2πh/n. Multiplying the new delayed vector by a rotation angle θ r will result in a new rotated vector [39]. The DSC operator is given by: The gain G G G is a harmonic specific gain given by: with G = |cos(θ r + θ n )/2| and ϕ = −(θ r + θ n )/2 are the modulus and phase angle respectively.
In (3), the degree of attenuation of harmonic h is related to G. For a θ r = −θ n G is equal to one; the DSC will pass the harmonic with a unity gain and zero-phase shift. For a θ r = π − θ n G is zero; the DSC will eliminate the harmonic h. For real-time implementation, the vector form of the DSC given in (3) is rewritten in the time domain as: Where R R R is the rotation matrix given by and θ r is the rotation angle The block diagram of a DSC with h = +1 and n delay is illustrated in Fig. 1.
Applying the DSC operator on v v v αβ signal will delay each harmonic by an angle θ n = 2πh/n during an interval of T /n. Conversely, the rotation angle θ r will have a uniform effect on all harmonics. Choosing θ r = −2πh * /n will yield to a unity gain and zero-phase shift of the harmonic h = h * and zero gain for harmonics h = h * − k + 1 2 n, k = 0, ±1, ±2 . . .. Other harmonics will be attenuated but not eliminated [39]. Hence, by selecting h * and n, the DSC can be designed to pass, attenuate or eliminate a chosen harmonic. DSC ±h n is the convention used by [40]. A ± indicates whether the harmonic is a positive or negative sequence. h: order of harmonic and n is the number of delays as delay factor.
It is worth mentioning that a single DSC operator cannot perfectly blocks all harmonics. Thus, Multiple DSCs are used in cascade -CDSC (Cascade DSC)-with each DSC designed to block a range of harmonics as more details are in [40]). In [25], the authors propose the CDSC as a building block for the TOLS. In the TOLS h * = +1, meaning the CDSC will have a unity gain and zero-phase shift for the fundamental positive component. To eliminate all major harmonics contained in v αβ the TOLS uses the CDSC +1 4,8,16,32 (in [25] authors dropped the +1 notation).
To enhance the performances of the TOLS, authors in [25] used the cascade of two CDSC 4,8,16,32 and a compensation unit. The compensation unit is a countermeasure for the phase shift and magnitude scaling caused by the CDSC 4,8,16,32 operator. its transfer function is given by [25]: where T d = 15T /64. The enhanced TOLS (ETOLS) is given in Fig.2. In [25] authors proposed other modifications to address certain issues such as the presence of DC offset or the presence of a highly unbalance voltage. Both modifications are named CTOLS1 and CTOLS2 respectively. For the sake of clarity and brevity, only the ETOLS is considered in this paper. For more detail about the two modifications, the reader may refer to [25].

B. PSEUDO OPEN-LOOP SYNCHRONIZATION
The POLS introduced in, [31], is based on the Positive Fundamental Component Estimator (PFCE) shown in Fig.3 which is introduced first in [41].
The park transformation of a three-phase voltage is given by: Where ω n is the fundamental angular frequency.
In the stationary frame, v v v αβ is given by Thus, the PFCE is given bŷ where λ is a damping factor andṽ The performance of the POLS depends on two parameters: the frequency estimator and λ. Using a constant frequency of 50 Hz will enhance the dynamic of the POLS at the expense of the frequency adaptability. Likewise, selecting a high value for λ will enhance the dynamics but compromise the POLS's immunity to voltage perturbation [31].

C. THE REDUCED-ORDER GENERALIZED INTEGRATOR
Another pseudo-open loop synchronization technique is presented in [32]. The authors used a reduced-order generalized integrator (ROGI) [42]. The transfer function of the estimator is given by [32]: whereω is the estimated angular frequency; −λ ± jω is the eigenvalue as making the ROGI only tunable by its real part. In [32], the authors proposed an enhancement to the ROGI as shown in Fig.4 making it tunable by both the real and imaginary parts.
The transfer function of the new ROGI -refereed afterward simply as ROGI-is given by: Eigenvalues of ROGI areω(λ 1 ± jλ 2 ), making the ROGI tunable in both real and imaginary parts. Thus, the user has more control over the dynamic performances of ROGI.

III. PROPOSED BENCHMARK MODEL
To be connected to the power grid, a DER must satisfy the technical requirement of the country grid code. A distribution system operator (DSO) and/or transmission system operator (TSO) will require specific measures to be satisfied in case of a power quality issue. A synchronizer unit must provide the fundamental components of the grid voltage event under adverse power quality to allow the DER to remain synchronized during a disturbance event. The proposed benchmark model addresses two parts that reflect real-world problems in a power grid. The first part deals with the dynamic events, shown in cases A to D, with a limited time lap. The main trigger of such events is the sudden connection/disconnection of a load or a source and  The benchmark is designed to take into consideration the most important events that may face a grid-connected inverter. Table. 1 shows the values derived from international standards and recommendations that deal with the connection of the DER to the grid. The European norm (ENTSO [34], [35]), the IEEE standard (519-2014 [37] and 1547-2018 [36]), and the NEMA standard [43] are used in this work.
The benchmark covering seven cases is detailed as follow:

A. FREQUENCY STEP JUMP
The goal of this benchmark is to test the capability of the synchronizer to provide an accurate estimation under a frequency change. IEEE 1547 defines Frequency ride-through requirements between 62 Hz and 57 Hz (5 % High-frequency ride-through and 3.3% for Low-frequency ride-through) [36]. European countries limit the values between 52 Hz and 47 Hz [35].

B. PHASE JUMP
Most grid codes do not include a phase jump requirement [44]. However, in the future, a phase jump could be included. Under the South Africa grid code, a DER must remain connected over a phase jump of 40 • [33].

C. RATE OF CHANGE OF FREQUENCY (ROCOF)
Between the minimum and maximum allowed frequency as 47 − 52 Hz, a DES must maintain operation under a shift in frequency that has rates specified by the operator. According to generation capacity, the frequency change rate is limited between 0.5 Hz/s and 3 Hz/s by IEEE 1547 [36] and 0.5 and 2.5 Hz/s adopted by ENTSO-E in Europe [34], [45].

D. LVRT
Low voltage ride through is a specification at which a DER shall maintain synchronism with the EPS area despite the disturbances in the mains voltage [34], [36]. The synchronization algorithm is required to provide the grid-tied inverter with the voltage information through the LVRT fault. The profile of the voltage differs from countries. In this benchmark, the German profile is used [46].

E. HARMONIC DISTORTION
IEEE 519-2014 limits the voltage total harmonic distortion to 8% for low voltage systems and 1.5% for high voltage systems as well as 5% to 1% for individual harmonics. The inter harmonic is harmonic with a frequency that is not an integer multiple of the fundamental frequency (as opposed to characteristic harmonic) [37]. IEEE 519 − 2014 limits the inter-harmonics to 5% for individual harmonics [37].

F. UNBALANCED VOLTAGE
A voltage unbalance occurs mainly due to the non-uniform distribution of the single-phase loads over the three-phase grid. This kind of behavior is observed in low and mediumvoltage grids. A voltage unbalance negatively affects rotating machines. ANSI C84.1 − 220 [43] limits the maximum voltage unbalance to 3.0% under no-load conditions.

G. DC OFFSET
Although DC current injection is limited below 1% in most legislation [47], Voltage DC component may appear in the microgrid due to grid faults, measurement devices, DC injection from DES,etc [48]. A good synchronizer will remove the DC offset from the fundamental.

H. EVALUATION METHOD
In the literature, a visual evaluation is widely used to determine the performance of a synchronization technique. Authors usually plot the response of multiple methods and then evaluate them based on the look of the graph. This method, even if it is effective in some instances, is not the best suited especially when comparing methods with similar performances or comparing several methods.
A quantitative-based comparison is the best approach to evaluate several methods accurately. Hence, in this paper, an evaluation based on the Root Mean Square Error (RMSE), which is a statistical method that allows the evaluation of deviation of the estimated measurement from the real one using a single number, is suggested. The RMSE is given as: Where (x i −x i ) is the error between the estimated and the actual value. In this benchmark, the visual evaluation is based on the following plots: 3) The phase error: The phase of each generated voltage is extracted and then subtracted from the mains phase. The quantitative evaluation is based on the RMSE as described in Fig. 5, where the number of samples N can be selected independently of the length of a period. However, choosing an N big enough to cover several periods will provide more accuracy. Table. 2 presents a normalized RMSE for the three methods -values are normalized to the ETOLS method-raw data are available in a data repository [49].
To choose a synchronization or to design a new one, it can follow the steps illustrated in Fig.5: 1) Develop the waveform generator block based on the benchmark shown in Table. 1.
2) The synchronizer takes as input the waveform generated. The outputs are the estimated fundamental components, the estimated frequency, and the phase.
3) The error between the fundamental and its estimation is then calculated and buffered. For better accuracy, the buffer size must correspond to at least the number of samples during a period of the fundamental 0.02 s for 50 Hz. Finally, the RMSE is calculated by (17).
It is preferable that the designer tests all cases; however, cases with no interest can be omitted. Since the choice is based on several cases, a visualization of the obtained RMSE is recommended to draw the big picture. To draw a picture, the performance comparison of the methods is studied to draw a rough idea of the strength and weakness of each compared method and the proper application. The spider web chart as a radar chart is a good way to summarize the performances in one graph. It is recommended to use one synchronization method as a base to normalize all other data. Since visually the bigger is better, it needs to inverse the values; thus, the lowest RMSE will be visually attractive.

IV. TEST RESULTS AND DISCUSSION
In this section, the proposed benchmarking model is applied to the three-synchronization methods to evaluate their performances. The methods are evaluated using four criteria previously mentioned. For a fair comparison, the three algorithms are tuned according to their respective articles. For the ETOLS [25] there is no parameter to tune, however, authors proposed four variants: TOLS, ETOLS, CTOLS2, CTOLS3 but focused on the ETOLS. For the ROGI based POLS, we take the same parameters as the paper, λ 1 = λ 2 = 1/ √ 2 [32]. Finally, for the POLS we took λ = 50 [31].

A. FREQUENCY STEP JUMP
In this step, a sudden frequency jump of 3 Hz is introduced. The main frequency jumped from 50 Hz to 53 Hz as shown in Fig. 6a. For the frequency estimation, the 5% settling time of 53± 0.15 Hz of the ETOLS and ROGI was 30 ms, while the POLS had a settling time of 323 ms. Fig. 6b shows the fundamental and generated waveform of phase of the three algorithms. The three algorithms generated a pure sinusoidal waveform. To get more insight, the error between the fundamental and its estimation is displayed in Fig. 6c. The three algorithms presented a faint magnitude and phase error. Table. 2 shows a quantitative presentation of the magnitude and phase error. In this test, the POLS had the largest settling time, but it had a lower error than the ETOLS. It is worth mentioning that a 3 Hz step-change differs drastically from a 2 Hz step change.
After a dynamic response, the three-algorithms settled with a magnitude RMSE of 13 × 10 −4 , 12 × 10 −4 , and 0.4 × 10 −4 for the ETOLS, POLS, and ROGI respectively. This faint error demonstrates the frequency adaptivity of the three algorithms.

B. RATE OF CHANGE OF FREQUENCY
The rate of change of frequency (ROFOC) has been set to 5 Hz as shown in Fig. 7a. Under this frequency change, all the algorithms showed a good tracking performance with a minor error as shown in Figs. 7c and 7d.

C. PHASE JUMP
In this scenario, a sudden phase jump is introduced in the three phases at 0.5 s in Fig. 8a. The generated waveform 6 VOLUME 4, 2016 This article has been accepted for publication in IEEE Access. This is the author's version which has not been fully edited and   Figs. 8c and 8d, respectively, show that the ROGI had the fastest response. The ETOLS had some chattering during a half period. The POLS had the longest dynamic response.

D. HARMONIC DISTORTION
The voltage is contaminated with harmonics, sub-harmonics, and inter-harmonics as shown in Table. 1 and Figs. 9a. Under this severe perturbation, the ETOLS and POLS generated a pure sine wave in Fig. 9b, with the POLS having the smallest magnitude and phase error as shown in Fig. 9c. The ROGI had relatively the worst performances where the generated   Table. 2 shows the advantage of the POLS over the ETOLS and ROGI in terms of harmonic rejection, where the RMSE error of the POLS is 0.03 times lower than the ETOLS.

E. UNBALANCED VOLTAGE
In this case, a negative sequence of 21% is injected into the mains; thus, an unbalance in the three-phase voltage is created as shown in Fig. 10a. Under this condition, unlike ROGI, the ETOLS and POLS managed to generate a pure sine wave in Fig. 10b. The magnitude in Fig. 10c and phase error in Fig. 10d of the ROGI demonstrated its inefficiency to perform under severe unbalanced conditions. The POLS, on VOLUME 4, 2016 7 This article has been accepted for publication in IEEE Access. This is the author's version which has not been fully edited and content may change prior to final publication. Citation information: DOI 10.1109/ACCESS.2022.3182946

F. LVRT
The LVRT is the most severe test. One of the challenges of LVRT is the ability to resynchronize after a total loss of the voltage. In our case, the voltage is lost at 0.5 s and starts recovering at 0.65 s [46]. Fig. 11 shows the simulation result of the LVRT test. ETOLS and ROGI had a very fast dynamic. POLS, on the other hand, needed 5 cycles to enter the 10 % error band.

G. DC COMPONENTS
In this test, a DC component is added to phase b in Fig. 12a. ETOLS and ROGI generated a non-sinusoidal waveform, with the ROGI having the largest magnitude and phase error. On the other hand, the POLS generated a pure sine waveform with a faint magnitude and phase error as shown in Figs. 12c and 12d, respectively.

H. PERFORMANCE COMPARISON AND SELECTION GUIDELINES
By analyzing the simulation results shown in Figs. 6 to 12 and the data in Table. 2, the following points are derived: 8 VOLUME 4, 2016 This article has been accepted for publication in IEEE Access. This is the author's version which has not been fully edited and content may change prior to final publication.  Under ideal conditions, the ETOLS had no estimation error. However, it had the largest RMSE after a frequency change.
It had a better dynamic response than the POLS and a better filtering capability than the ROGI. Based on these remarques, one can draw a picture of the best synchronization algorithm that better fits the application. For example, in the case of a weak grid with a power quality problem, the best choice is the POLS. In the case of a grid with an unset frequency (for example, islanded microgrid), the ROGI will perform the best. For a compromise between dynamic and filtering capability, the ETOLS is the right choice.
Another alternative is to tune a synchronization algorithm so that it covers more area in the charts. For example, tuning the POLS needs only one parameter. A low λ means a more accurate estimation of the PFCE but a slower settling time.
To address the issue of the settling time, one can use a higher VOLUME 4, 2016 9 This article has been accepted for publication in IEEE Access. This is the author's version which has not been fully edited and content may change prior to final publication.  λ . ROGI, on the other hand, uses two parameters (λ 1 and λ 2 ) for the tuning. The ETOLS has no parameter to tune, but to customize the estimation accuracy or the settling time, one needs to add/delete CSDC as the case with CTOLSI and CTOLSII [25]. Hence, to customize the ETOLS, one needs to change its structure.
The radar chart shown in Fig. 13 visually illustrates the finding of the benchmark. In addition to the simulated model, it includes the tuning difficulty and the execution time. The execution time in Table. 3 is measured using the RTI library in a dSPACE 1104 [50]. The more area an algorithm covers, the more polyvalent it is.

I. EXPERIMENTAL RESULTS
The benchmark is validated experimentally using the same simulation steps. For rapid prototyping, the authors propose to follow the method used in [31]. The signal generator is implemented in a real-time digital platform of the dSPACE 1104, but instead of feeding the generated signal directly to the synchronization algorithm, a Digital to Analog Converter (DAC) is used to send the signal out of the card. Then, an Analog to Digital Converter (ADC) is used to read the generated analog signal and feed it to the synchronization algorithm. This method allows the emulation of reading a signal from a physical sensor. Thus, the benchmark is simplified by eliminating the need for a programmable voltage source that may not be available for the researcher. In this paper, we used two dSPACE 1104 platforms as shown in Fig. 14, the first implements the benchmark model, and the second hosts these three tested synchronization methods. The execution time is measured using the RTIlib library [50]. Fig.  15 shows the experimental results of the benchmark model. One obvious remark is the similarity between the simulation and the experimental results. This is logical since the same benchmark model (signal generator) is used.
The dynamic behavior of the three algorithms under a frequency step jump and frequency ramp are presented in Fig. 15a and Fig. 15b. The similarity between these figures and Fig. 6a and Fig. 7a is observed where the POLS had the largest response time. Under a phase jump, the three algorithms had a clean sinusoidal output as shown in Fig. 6c. In Fig. 15d, the harmonic contamination in the grid voltage is considered as per the simulation environment scenario as shown in Fig. 9. Note that all the schemes are able to generate clean unit template signals. In even to voltage imbalance shown in Fi. 15e, it can be observed that the ROGI scheme yields non-linear behavior in the unit template generation despite using a good pre-filtering approach. Note that POLS and ETOLS scheme are more suitable choices for grid voltage unbalance. Further, when the grid voltage is contaminated with 0.5 pu DC-offset as shown in Fig. 15g, it is clear that the POLS has a superior performance in generating clean reference signals when compared to the ETOLS and the ROGI schemes. Finally, the grid voltage undergoes nearly a zero voltage drop along with a slow variation in the voltage signal as shown in Fig. 15f indicating the dynamic performance evaluation of the schemes for a LVRT event. Note that the POLS has better potential capability to generate the clean reference signal and can help maintain a better phase synchronization with the utility grid. Nevertheless, ETOLS and ROGI will suffer from an abrupt loss of synchronous operation and may consequently lead to grid-tied inverter failure.
Testing the synchronization algorithm in a real-time platform will allow engineers to assess the feasibility of running on a digital platform and check the execution time in a realtime application.

VOLUME 4, 2016
This article has been accepted for publication in IEEE Access. This is the author's version which has not been fully edited and content may change prior to final publication.