Double-Differential Amplifier for sEMG Measurement by Means of a Current-Mode Approach

This work proposes a Double Differential (DD) amplifier topology which exploits the advantages of the current-mode approach. DD amplifiers are useful as front-ends in standalone active electrodes for superficial electromyography (sEMG) wearable applications and electroneurography (ENG) measurement devices. Front-ends for these applications need to attain low noise, high common-mode rejection ratio, and high input impedance to measure biopotential signals and can further benefit from low power operation, a small size, and an easily adaptable output. Presently published DD amplifiers are either complex in terms of a high part count, leading to higher power consumption and size, or suffer from limited interference-rejection capabilities and require further analog processing for compatibility with single-ended systems. Therefore, in this work, second-generation current conveyors have been leveraged to obtain a simple topology combining a small active-part count, a high common-mode rejection ratio, and a flexible output stage. The current-mode DD amplifier is presented and analyzed in detail to estimate its parameters and model the effects of nonidealities in the circuit. In order to validate the proposed topology, a discrete-component implementation was realized as a proof-of-concept. The results experimentally demonstrated the properties of the proposed topology and its feasibility for measuring superficial sEMG DD signals.


I. INTRODUCTION
D OUBLE differential (DD) electrodes are useful in superficial electromyography (sEMG) because they help to reject crosstalk from muscles outside the volume of interest, as DD configurations have increased spatial selectivity compared with differential (i.e. bipolar) ones [1], [2]. A DD electrode (also known as Linear DD electrode) has 3 contacts, evenly spaced along a line, that measure voltages v a , v b , and v c respectively as depicted in Fig. 1, and perform the following operation to obtain the DD output: sEMG electrodes are employed in wearable devices using large numbers of sensors distributed throughout the body. These sensors may be implemented as small standalone wireless systems in each measurement location (e.g. the DD Trigno EMG from Deslys [3], or the differential FREEEMG form BTS Bioengineering [4]) requiring low power consumption, or as active electrodes transmitting the signal from each sensor to a central device on the body by wires (Thalmic Labs Myo Armband [5], Ottobock Myo Plus TR [6]), requiring a robust and simple signal distribution strategy [7]. In both cases, the sensors must be small and lightweight for patient comfort and to avoid artifacts [8], and they require good electromagnetic interference rejection capabilities.
Wearable and implantable devices implement sensors in application-specific integrated circuits (ASICs) which include an analog front-end, digitization, and data processing and transmission in a single IC with no or few external components [9]. This has enabled ultra-low-power arrays and single-electrodes suited for EMG and electroneurogram (ENG) recordings to be implemented, which rely on a low-noise biopotential readout analog front-end to measure the target signal rejecting interference sources [10]- [14]. In these cases, new topologies that optimize the trade-off between required area, power consumption, and performance are desirable. ENG electrodes, in particular, have leveraged integrated DD front-ends [15], [16].
There are currently two published alternatives to evaluate the exact DD output, see Fig. 1. The traditional topology amplifier in Fig. 1a finds v DD in relationship (1) by using 3 instrumentation amplifiers (IAs). It attains an excellent common-mode rejection ratio (CMRR) that depends on the imbalances between the CMRR of each IA. However, firstly, it is a complex circuit in terms of the required active components or blocks, since each IA is generally implemented by 3 operational amplifiers (OAs), for a total of 9 OAs. Secondly, the CMRR is not the only determining factor for interference rejection: the potentialdivider effect [17] produces a common-mode to differentialmode transformation at the input of the amplifier due to the finite and unbalanced input and electrode impedances. Although input impedances are large, determined by capacitances of the order of 1-10 pF, it was shown that the imbalanced input of the 3 IA topology renders its high CMRR ineffective [18] when large electrode impedances are present, as can occur with small EMG electrodes [2].
The second alternative is the much simpler implementation based on 4 OAs, shown in Fig. 1b and proposed in [18]. It, with a reduced number of active components, solved the input imbalance problem. However, its CMRR is limited not only by the imbalance of the first-stage OAs but also by the absolute CMRR of OA 4 and further by its open-loop gain [18]. In addition, this implementation presents a voltagemode differential output, but this kind of output is only convenient when interfacing with voltage-mode differentialinput stages; otherwise, an additional mode-transformation circuit is required.
In order to develop a topology to evaluate v DD without the complexity of the topology in Fig. 1a, but improving the CMRR drawback of the topology in Fig. 1b, in this paper the current-mode approach is explored [19], [20].
Calculation of the DD output through an impedance network.
Indeed, we take inspiration from [21], where Toumazou & Lidgey proposed both an IA, which is traditionally designed following the voltage-mode approach, but by using a currentmode approach, and a simpler circuit trading off performance for simplicity. That concept proved attractive for biopotential measurements [22], [23] and was used in an improved implementation achieving a higher CMRR [24].
Some variations of current-mode IAs arose thanks to the possibility of improving several parameters such as frequency performance, circuit simplicity, and low-voltage operation [25, p. V]. Furthermore, a current-output topology can help distribute the signal when the active electrodes are wired and offer robustness against voltage-mode interference [26], [27].
In particular, in this paper, a novel simple topology to obtain the DD output is presented. It exploits the use of a second-generation current conveyor (CCII) [28], and despite its simplicity, thanks to its balanced topology, as suggested by previous work on current-mode IAs, can provide a high CMRR even accounting for the CCII non-idealities. The solution is also suited to be realized in an integrated version as an analog front-end for acquisition ASICs. To validate the idea, in the paper the topology is fully analyzed including circuit non-idealities, and experimental measurements have been carried out on a discrete board-level implementation. The goal of the experimental measurements is to prove that the model and derived equations are valid and that all significant non-idealities that could hinder the front-end's instrumentation capabilities have been identified.
The paper is structured as follows. In Section II after a brief introduction to the CCII, the current-mode DD amplifier topology is presented and discussed. In Section III, the proposed topology is analyzed in detail and a model which accounts for non-ideal parameters is also included. In Section IV simulation and experimental validation are reported. In particular, a discrete-component implementation as a proofof-concept device and DD sEMG signals obtained from experimental in-vivo measurements are included. Finally, the conclusions are drawn in Section V.

A. DD CALCULATION
The proposed topology is based on the impedance network shown in Fig. 2, which by itself can calculate the DD output if the current through Z b can be measured. Using the nomenclature displayed in Fig. 2, the impedance network produces a current i o equal to where Z x||y denotes the parallel combination of Z x and Z y .
If Z a = Z c the double differential output is obtained: where Z a was used in this simplified expression for both Z a and Z c under the assumption that they are equal. This method has two important properties: • The CM is rejected by the first stage because it is not present in the output current signal. • Although it is based on passive components that must have equal values, the effect of imbalances notably neither affects the correct calculation of the DD output nor introduces significant mode transformations Concerning the last point, the imbalances in Z a−c do not degrade the CMRR and only impact the rejection of EMG crosstalk, as will be considered in detail in section III-B. Therefore, the DD signal can be obtained with this simple topology by only measuring the current i o .

B. CCII
In order to measure the current i o in the network of Fig. 2, a Current Conveyor (CC) can be used. The CC is an electronic building block originally introduced in 1968 by Smith and Sedra [29]. To improve its versatility, the same authors two years later proposed a second-generation CC (CCII) [28], which for its characteristic can find useful and more concrete applications in the electronic analog domain. The ideal CCII is a three-terminal device whose nodes, labeled with X, Y and Z, have the following electrical relationship: where the + and -signs in the matrix are used for positive (CCII+) and negative type (CCII-) conveyors, respectively.
By inspection of matrix (5), a CCII can be thought of as composed of a voltage follower between Y and X nodes, and a positive (CCII+) or a negative (CCII-) current follower, since the current on node Z replicates the current flowing through X.

C. DD AMPLIFIER DESIGN
The proposed DD amplifier, reported in Fig. 3, is based on the floating impedance network from Fig. 2 capable of performing the DD signal calculation given by (1) with ideally infinite CMRR. First, each electrode signal must be buffered to present a balanced, high-impedance input stage, and the current through the central electrode's impedance must be measured using a CCII-device.
Following Fig. 3 the output current is Current i o can be converted to voltage so it can be fed to traditional voltage-input devices, or it can be further processed in current-mode circuits. Here we will include the transimpedance stage for compatibility with the board-level proof-of-concept to be built. The negative CCII device was chosen to obtain a positive v DD voltage as defined in (1) at the output. The impedance used to convert the current output to a voltage output can also be useful for filtering purposes.

III. TOPOLOGY ANALYSIS
The DD amplifier is quite different from a traditional differential amplifier, and its performance parameters must be defined in order to study it. Previous work [18] presented a framework to analyze DD amplifiers. The common mode, differential mode, and double differential mode were identified as signal modes useful for analysis. They are defined by the following transformation matrix: Thus, given a single-ended output v o three gains can be defined, omitting frequency dependency for simplicity: The mode of interest for the system is the DD signal, v DDM , whereas v CM and v DM should be rejected. The capability of the amplifier to reject these signals can be described by its CM RR := G DD /G C and its differential mode rejection VOLUME 4, 2016 ratio or DM RR := G DD /G D . Interference can get into the system if the CMRR is not high enough (over 80 dB [30]). In a biopotential measurement system, a CM voltage rejection circuit known as Driven Right Leg (DRL) can help to provide 30-60 dB of this rejection and the rest must be provided by the input stage of the front-end. Moreover, muscular crosstalk can also affect measurements if the DMRR is not high enough (over 40 dB).
For generality, a single-ended output voltage v o will be considered, given by the product of a transimpedance gain R T times the output current i o . The output current itself can be obtained as the superposition of all modes following (8) by defining transconductance gains G i,x where x stands for each mode, so that Hence for the proposed topology, from (6): In order to analyze factors degrading the performance of the presented topology, CCII devices will be represented including nonidealities according to the following simplified model [31]: Reverse effects have been considered negligible. Impedances at the terminals have been included, as well as the forward voltage and current gains. Frequency dependency has been omitted for simplicity. The forward transconductance from terminal Y b to Z b has also been included as an important nonideality with an important impact on the CMRR. The same parameters that describe the voltage buffer of the CCII device can be used to describe VB a and VB c to avoid the proliferation of notation.
Using this model, which accounts for nonidealities, the proposed active electrode is shown in Fig. 4, where the parasitic impedance of the common node v n to ground has been added as well since it is an important parameter for the calculation of the CMRR.

A. COMMON-MODE REJECTION
The proposed topology has the potential to achieve a high CMRR because the CM is rejected by the first stage. The DD signal analog calculation is performed by the impedance network Z a−c and as it is a "floating" network, i.e. it has no paths to ground, its CMRR is ideally infinite [32]. Nonidealities, however, will have an impact on the CMRR, as listed in the following subitems. high value (above 1 MΩ), as shown in previous work in [18]. High impedance values of the order of 1 MΩ and above can result when using small Ag/AgCl electrodes of 5 mm 2 on unprepared skin [33]. Because the input is balanced in the topology hereby presented, this effect can be made negligible with implementations achieving current commercial standards of the order of 1-10 pF [18], considering that at interference frequencies (50/60 Hz and the first 5 harmonics) the capacitive component is strongly dominant in CMOS implementations.

2) Parasitic impedance on the floating averaging node
When the parasitic impedance Z n on the v n node is not infinite, a CM current can circulate to ground through impedances Z a−c and degrade the CMRR producing a CM transconductance gain equal to: For the simple case of all impedances being resistances of equal value, (R a||b||c = R b /3), and Z n considered as a parallel of C n and R n , replacing in (13) we get yielding a CMRR due to v n parasitic impedance equal to under the same set of conditions. For example, if R b = 10 kΩ, even with a very high R n , a C n = 1 pF would yield a CMRR limit of 110 dB. The effect of G mf will be considered, as it is usually an important factor that degrades CMRR in CCII devices [31]. Setting all inputs as v CM the circuit from Fig. 4 yields thus, with the nomenclature from (10) and the CMRR due to G mf results Therefore, for example, with Z a = Z b = Z c = 10 kΩ, the G mf,b should be below −170 dB to preserve a 90 dB CMRR,.

4) Active parameters imbalance
Active gains A vf,a−c can also degrade the CMRR if imbalanced. When v CM is applied to all inputs the voltage at each X terminal is v CM A vf , the current output is which using (11) yields Note that A vf ≈ 1, usually resulting from closed-loop active circuits, hence achieving very small imbalances and in turn a high overall CMRR limit.

B. DIFFERENTIAL MODE REJECTION
Because the signal of interest is the DDM, the DM represents an interference signal and it should be rejected. (3) can be rewritten as: where φ stands for Considering Z a ̸ = Z c the value of these resistors can be rewritten as Z a = Z − ∆Z; Z c = Z + ∆Z. Therefore, replacing in (20) Yielding: The differential-mode signal is an EMG signal, of the same order of magnitude as the DD signal. Hence with resistor tolerances below 1 %, the DMRR is high enough.

C. NOISE ANALYSIS
Next, e and i n will be used to symbolize amplitude spectral densities (in V/

√
Hz and A/ √ Hz respectively). The total current noise at the output of the first stage of the topology (the Z b terminal), i n,o , has contributions from the voltage noise sources referred to each CCII Y-terminal e Y , which will be denoted i n,o|e Y , and the thermal noise from the resistive component of the impedances e R , denoted i n,o|e R . Hence Assuming that CCIIa and CCIIc devices have the same noise (e Ya = e Yc ) then Because of the Y-to-X voltage buffer, each device's voltage noise e Y appears in series with its corresponding resistor's voltage noise e R , hence i n,o|e R can be found directly replacing e Y for e R in (24).
If the transimpedance stage is considered, the total output noise voltage of the system is where R T is the transfer function of the second stage defined in (9), and e R T is the total noise contribution from the same stage.
Finally, when used in biomedical applications, the current noise sources of Y-terminals are important as well because they produce a voltage across electrode impedances.

D. DC PARAMETERS
If Z a,b,c are selected as resistors for DC-coupled measurements and R T is implemented, the gain of this stage will be limited by the large DC offset of the biopotential measurement electrodes, V E,a−b−c , of up to ±150 mV. Considering a worst-case with V E,a = V E,c = −V E,b , then i o = ±4V E /(2R a + R b ) and in a system with supply V s , R T should be designed so that, at least, G DD < V s /(4V E ). This is valid for any DD topology.
The offset voltage of each active device can be represented in series with the electrode offset, therefore presenting a negligible effect compared to the requirement of conforming to this offset. Input bias currents must be low enough to avoid surpassing the limits required by electrical safety standards for biopotential measurement devices [34].
Further, input bias currents I b transverse the electrodes' impedances Z E and could produce a problematic voltage drop. A simple rule is that this drop should not exceed one order of magnitude below the electrode offset: I b Z E < 10 mV, for example, 10 nA maximum for 1 MΩ. Electrodes of smaller size and factors such as dry skin can result in higher impedances, lowering the admissible bias current. For very high values, specialized CMOS input stages can attain low bias currents even in commercial components (e.g. 20 fA for Texas Instruments' LMP7721). Otherwise, AC-coupling could be implemented in the presented topology by including a DC-blocking capacitor in Z b as will be discussed in Sec. IV-D.

A. DISCRETE PROOF-OF-CONCEPT DESIGN
A proof-of-concept circuit was implemented with the goal of validating the topology in a real-world measurement setup and verifying the design equations.
The proposed topology was implemented using the circuit from Fig. 5 where operational amplifiers OA 2 and OA 3 in follower configuration were employed for VB a and VB c . The CCIIb function is performed by measurement of the output current of OA 1 . The measurement was conducted by introducing an impedance in the follower's feedback loop. The negative feedback ensures that the output of OA 1 still follows v b . The impedance was implemented by the parallel of R o and C o so as to also introduce low-pass filtering.
The circuit, besides implementing the proposed topology, was built as an active electrode to experimentally validate the design through in-vivo biosignal acquisition. Therefore, the measured signal was buffered using OA 4 and OA 5 to allow using long lead wires. In particular, the node connected to the inverting input of OA 1 presents no low-impedance paths to ground and is very sensible to coupled currents as occurs with electromagnetic interference coupled to electrode leads [17].
A photograph of the printed circuit board (PCB) is shown in Fig. 6.

B. PROOF-OF-CONCEPT DESIGN RESULTS
In the following subsections, measurements of the parameters obtained with this component selection are displayed and compared to the results of the previous analysis in order to validate it.

1) Frequency Response
The prototype board-level circuit was built as a DC-coupled active electrode, with a DC gain of 4 to improve noise performance by making noise from OA 4,5 negligible, while retaining an ample DC input range. Impedances were set where the following factors from (12) can be identified: The transfer characteristic of the circuit was measured using a Stanford SR760 Spectrum Analyzer. Since the analyzer has a differential excitation output, v a and v c were short-circuited together and connected to one of its poles while v b was connected to the other. By the transformation presented in (6) this input translates to an input with a DD component v DD = 2v i , hence the analyzer output must be corrected by a factor of 2 to represent G DD . Fig. 7 shows the measured gain together with a transfer obtained by using (26) with the implemented values, where a 12 dB gain and 930 Hz cut-off frequency (marked with a + sign) are shown to have been obtained.

2) Output noise
The total output noise e o for this circuit can be obtained using the previously developed equations. As R a = R b = R c , and considering e OA1 = e OA2 = e OA3 , (24) yields The output stage's noise e R T has contributions from the buffer's voltage noise (with e OA4 = e OA5 ), the voltage across Z o produced by current noise from OA 4 , and thermal noise from R o , resulting in: Therefore, completing (25): The noise of the circuit was measured by connecting it to a low-noise differential-input analog-to-digital converter (ADC), ADS1299, configured with a gain of 8 times and 4 kHz data rate. The amplifier inputs were short-circuited to a low-noise 2.5 V reference and the system was placed inside a shielding box connected to ground. Fig. 8 shows a Welch amplitude spectrum estimation of the total noise at the output with a very good match with the noise predicted by (32). In the calculated curve, the ADC's sinc filter response was included. The input-referred noise is also shown, with an integrated noise power in a 10-450 Hz bandwidth of 0.9 µV rms , which is appropriate for biopotential measurements. The acquisition system's noise was simultaneously measured and is shown in Fig. 8 for reference.

3) CMRR
The CMRR was measured using the same equipment at frequencies below 100 Hz and a spectrum analyzer at higher frequencies. G CM was obtained by short-circuiting all inputs to one pole of a function generator and connecting the other to ground. The CMRR was then calculated as G DD /G CM and is shown in Fig. 9.
In this implementation, the CMRR at power-line frequencies was dominated by the input capacitances of the OAs connected to the inverting node of OA 1 (Fig.  5) which produce an analog effect to G mf,b (See Fig.  4 and (17)). A voltage on the equivalent X b terminal (inverting input from OA 1 ) appears due to virtual ground and is also applied to the input of OA 5 . This node has an impedance (s(C i,OA1 + C i,OA5 )) −1 drawing a current from the equivalent Z b terminal, therefore producing a nonzero G mf = s(C i,OA1 + C i,OA5 ) as per (12). Therefore, from (17), the CMRR is limited by C i,OA1 is 8 pF (common-mode input impedance of TLC2274) and C i,OA5 was measured to be 22.4 pF for TLC2202 (it is not listed in the datasheet). Using these values the calculated CMRR was graphed Fig. 9 showing a good match with the measurement.
At lower frequencies, the CMRR is limited because of imbalances between active components. Applying (19) to this circuit, the equivalent A vf of each OA acting as CCII surrogate has a small departure from unity due to imbalances in their open-loop gain A ol or their CMRR. In buffer configuration For example, approximating A ol /(1 + A ol ) ≈ 1 and considering an imbalance CM RR OA1 = C − ∆C and CM RR OA2 = CM RR OA3 = C + ∆C, (19) yields The CMRR of TLC2274 is 75 dB, therefore a 2 % imbalance is sufficient to produce a 97 dB limit for the overall CMRR. As the CMRR limit given by the OAs' parameter imbalance is higher than that given by the input capacitances of the second stage per (33), the total CMRR can be improved by lowering this capacitance, or by reducing R b to decrease the time constant in (33) and obtain a CMRR limited only by (35) up to a higher frequency.
The effect of the parasitic impedance Z n on the CMRR was validated, comparing (15) with measurements soldering capacitors between the sensitive node v n and ground, and assuming very large R n values so CM RR vn ≈ 1/(sR b C n ) at low frequencies. The measurement results are displayed in Fig. 10.
When the "parasitic" capacitance is low enough, the system's CMRR is dominant as seen in the 10 pF line. For higher values, the CMRR starts degrading. The total CMRR results from the combination of the system's CMRR with C n = 0 and that produced by C n by (15). A lower bound for the total CMRR can be described by compounding these two effects as (CM RR ∆ −1 +CM RR −1 Cn ) −1 which is graphed in gray line as a reference, closely matching the measurements VOLUME 4, 2016 Measured CMRR Simulated CMRR CMRR due to C i  when the C n effect is dominant. This result validates (15) as a tool for calculating the highest permissible parasitic impedance for a given set of R a−c and accepted CMRR.

4) DMRR
Finally, R a and R c resistors were measured with a 6 ½ digit multimeter and (22) evaluated to be 60.2 dB. The DMRR was then measured by applying the output of a differential function generator to v a and v c , and a low-noise 2.5 V reference to v b . The DMRR resulted in a constant ratio of mean 60.4 dB in the measured bandwidth as seen in Fig.  11, coinciding with the predicted value. The interfering DM contains EMG crosstalk of the same order of magnitude of the DDM EMG of interest, therefore a DMRR above 40 dB is sufficient.

C. IN-VIVO DD EMG VALIDATION
The amplifier was validated using it for in-vivo tests. It was used as an active electrode for a previously reported acquisition equipment [35], which has 8 differential channels with 24-bit sigma-delta analog-to-digital converters and provides a 5 V supply as well as a 2.5 V reference. The system is connected to a PC through a standard USB bus, and its analog and data conversion stages are galvanically separated from the rest of the acquisition system through an ADUM6401 isolation chip from Analog Devices, which provides both data and power isolation.
The DRL from the equipment was used to set the DC bias of the body, placing it on the waist. The DD electrode was placed on the forearm and hand clenches were executed to pick up the EMG signals from the finger flexor muscles. Measurements were conducted in accordance with ethical guidelines following a research plan approved by La Plata National University bioethics committee. The setup can be seen in Fig. 6b. A sample signal with 3 clenches executed during a 20 s period can be observed in Fig. 12a.
In order to verify the DD function, the output of the DD circuit, v o , was measured with one channel of the acquisition equipment, and each individual electrode signal was measured with additional channels. For this purpose, the active electrode was fitted with two additional wires carrying the output signal from the two buffers to capture v a and v c . The output of OA5 was also recorded in an additional channel to obtain v b . A benchmark DD signalv o was then obtained digitally by applying (1), and all signals were filtered with a 1 pole Butterworth passband filter between 30 Hz and 450 Hz. The result of the DD signal v o captured with the DD electrode is marked in black in Fig. 12b, and the calculated DD signalv o in grey. The DC offset between the signals was introduced for visualization purposes. The correlation of the observed 2 s long record of the output of the DD amplifier v o with the digitally calculated DD signal was 96.5 %, showing that the topology effectively performs the double differential operation in practical EMG measurements.

D. REMARKS AND DISCUSSION
The feasibility of implementing a front-end capable of exact DD EMG measurements with the proposed topology has been demonstrated through a board-level implementation that validates the circuit and the equations obtained through its theoretical analysis.
The features of the proposed topology are displayed in table 1 in comparison with those previously presented in the literature and shown in figure 1.
As expected, the proposed topology can provide a high CMRR limited by the imbalance of the individual CMRRs of its constituent active parts and by the G mf of the CCII. Moreover, the degradation of this CMRR is inversely proportional to the imbalance between the electrodes' impedances, instead of their absolute value as is the case with the 3 IA amplifier of the topology in Fig. 1a.
From the first row of Table 1, it can be seen that the circuit presented in this work has a low active-part count. The proof-of-concept implementation required 2 OAs as voltage buffers, 1 OA instead of a CCII, and the addition of 2 OAs for low-impedance patient-lead connections. However, the buffer OAs are not a necessity for obtaining the DD output (for example considering a use-case as an on-board AFE with an ADC).
The measurements showed a very good agreement between the circuit model, the design equations, and the obtained results. A summary of the resulting parameters characterizing this implementation is presented in the first column of Table 2.
Of course, the performance parameters per se are strongly dependent on the selected commercial components. Therefore, using the criteria stemming from the previous analysis, a second implementation was realized. Indeed, as the CMRR was degraded by the parasitic capacitance of the buffer amplifiers (OA 4 and OA 5 ) that impacted on  the equivalent G mf , an OA with 10 times lower input capacitance was selected (OPA4243, C i = 2 pF) and R b was reduced with the consequence of a more than 20 dB improvement in CMRR at 50Hz. Moreover, since OPA4243 is a new generation OA, despite its more expensive cost, also a lower power consumption is obtained. This implementation showcases the versatility of the topology by adding a DCblocking capacitor C b in series with R b to attain an ACcoupled active electrode with a higher amplification and DC input range. The parameters used in the second implementation are shown in the second column of Table 2. While the previous implementation (Selection 1) was useful for exposing the nonideal factors affecting the circuit's performance and validating the equations, the second implementation (Selection 2) is best suited for comparison with state-ofthe art devices, and it shows how an alternative component selection modifies performance in agreement with the analysis conducted in this paper. Table 3 provides a reference comparison against EMG front-end designs. It is worth noting that although the VOLUME 4, 2016 9
proof-of-concept implementation was built using off-theshelve commercial components, it has achieved performance parameters within the state-of-the-art, except, of course, for the power consumption, since carefully designed ASICs can achieve more than an order of magnitude better performance. Although optimizing power consumption falls outside of the scope of this work, the low active-part count compared with other DD front-ends and the power reduction achieved by modifying component selection are preliminary evidence that this feature could be improved in a specialized implementation including ultra-low-power active-block realizations [36], [37].

V. CONCLUSION
A double-differential amplifier topology based on current mode circuits has been proposed. Three type II current conveyors allow implementing an amplifier useful for a DD sEMG electrode, with an optional transimpedance and buffering stage if voltage output is desired. The topology is attractive for microelectronic integration using CCII blocks with a low active-part count suitable for the low power consumption and small footprint needed in wearable applications. A CMRR analysis of the topology was conducted to identify relevant parameters: the CMRR depends on the imbalance between active component parameters and parasitic impedances and can hence achieve a very high value.
The feasibility of the topology was proven by building a board-level prototype implementation with commercial components. Using this prototype, the theoretical model was validated including the effective calculation of the DD signal, prediction of the CMRR degradation due to parasitic impedances, and DMRR degradation due to passive component imbalance. Moreover, superficial DD EMG measurements using dry electrodes were successfully achieved with the proposed topology.