A Precise Model of DC-link Current in Adjustable Speed Drives for the Harmonic Analysis of Electrical Networks

Adjustable Speed Drives (ASDs) deteriorate the power quality in distribution networks by increasing the harmonic distortions. These harmonics can also cause serious electromagnetic interference-related issues in the network, as they have a high value above 2 kHz. To prevent these issues, the harmonics above 2 kHz have been considered in recent decades by different standardization committees. Therefore, manufacturers seek precise models to analyze ASD harmonics for complying with the forthcoming standards, and network operators need analytical models to estimate these harmonics in networks that include multiple ASDs. In this paper, a new mathematical model is developed for estimating the inverter-side current harmonics that flow through the DC-link in an ASD. The proposed model is found by considering a precise model of voltage ripples across DC-link for calculating the current harmonics at the load side of the ASD. Then, a mathematical approach is used to find the current harmonics that pass through DC-link according to the load side currents. This model demonstrates a higher accuracy to find an ASD’s harmonics over the existing methods due to modeling the effects of voltage ripple across DC-link and the load-side harmonics. The proposed model and the conclusions from the analysis are validated by experimental and simulation results.


I. INTRODUCTION
T He increasing number of loads that require adjustable voltage and frequency in the last decades has demanded more power electronic devices to be connected to electrical networks [1], [2]. In particular, the applications of these devices include speed and torque control of electric motors in residential and industrial networks, and power generation from renewable sources [2], [3]. A typical electrical network, which can be either stand alone, such as the electrical network of ships, or grid connected similar to the network of industrial plants, is illustrated in Fig. 1 (a). As it can be seen, at the Point of Common Coupling (PCC), this network includes nonlinear and linear loads, and Adjustable Speed Drives (ASDs) to drive ac motors for different applications, such as for running fans, compressors, and pumps [1], [2]. These ASDs, which are highlighted in Fig. 1 (a), could make the voltage and current of the network distorted due to their nonlinear function and Pulse Width Modulated (PWM) switching action [3], [4].
The topology of one of the ASDs in Fig. 1 (a) is described in Fig. 1 (b). As it can be observed, a diode-bridge rectifier is used at the front-end of this ASD, whereas an inverter is employed at its load side. The DC-link of this ASD also could have different parameters according to the filter configurations, such as conventional or Slim DC-link Capacitor (SDLC) [4]- [6]. It is worth mentioning that the conventional filter configuration is considered for analytical analysis in this paper, as it is utilized more frequently in the networks compared with SDLC. However, the outcomes of this analysis could be employed to find the current harmonics generated by ASDs with a SDLC filter, as they have similar circuit with a conventional type filter without the DC-choke

inductance.
Papers [2]- [10] study the current harmonics generated by grid-connected power converters. Reducing the secondharmonic current across the DC-link of a two-stage singlephase converter has been a concern of the proposed methods in [7], [8]. They have also discussed the important role of DC-link capacitor size in reducing this current harmonic at the grid side. Nevertheless, they have not discussed the impact of other current harmonics that flow through the DC-link of a converter due to the switching function of rear-end inverter. Authors in [2] have studied the impact of motor drive topology on their current harmonic generation. They have found out that grid configuration and the DC-link capacitor size impact the ASDs resonant frequency, where a smaller DC-link capacitor causes higher resonant frequency. The higher resonance frequency could result in the increase of current distortion in the range of 2-9 kHz, which is the topic of emerging power quality standards. It should be noted that 2-150 kHz frequency range has not been appropriately addressed in the existing standards, and recently has been considered in different standardization committees, such as IEC SC77 [11]. This frequency range has been divided to 2-9 kHz and 9-150 kHz by IEC according to the different required measurement and modeling methods [12].
Existing levels of current and voltage harmonics in the range of 2-150 kHz in distribution networks have been studied in [3], [4], [13]. Authors in [11], [12] have also studied the current harmonics of ASDs in the frequency range of 2-9 kHz. They have described that these devices are the main sources of 2-9 kHz current harmonics in a distribution network. Additionally, they have studied the impact of different switching frequency and load power factors on the 2-9 kHz current harmonics of ASDs. Authors in [14], [15] have investigated the challenges that the propagation of these current harmonics could bring to a distribution network. They have also analyzed the impact of different filter configurations on these current harmonics. The core loss and temperature increase of a permanent magnet motor due to harmonics at high frequencies (supraharmonics) have been discussed in [16]. The authors in that work have shown that the generated heat and power loss due to eddy currents in the rotor and stator cores depend on voltage supraharmonics' magnitude and order. Rather than evaluating the injection of these harmonics to the grid, several harmonic mitigation methods have been proposed in the literature, such as [16]- [22]. Authors in [17] have found that passive techniques of harmonic cancellation, such as DC and AC chokes, could still be an efficient method to control 2-9 kHz harmonics due to their simple and reliable integration to the system. In addition, the type of utility transformer, the grid impedance, type of connected power converters and their load profile are other important parameters regarding the harmonic emission of ASDs [17]. On the other hand, a feed-forward voltage control has been implemented in [18] to mitigate the current harmonics of an ASD connected to a permanent magnet motor. Compared with the conventional methods, this method generates lower current harmonics as the lab measurements confirm. However, it has the downside of requiring accurate parameters of the motor and sensors for measuring rotor current and angle. Similarly, a hybrid hysteresis current control has been applied in [19] to reduce the current harmonics at the grid-side. Authors in [21] have demonstrated that, in a multi-unit system, adjusting the firing angles of ASD systems with SCR can help with the mitigation of current harmonics at the Point of Common Coupling (PCC) [21]. The proposed strategy can maintain an acceptable power factor while reducing current harmonics as confirmed by simulation results and practical measurements.
An analytical method to estimate the DC-link current in a single-phase H-bridge converter has been presented in [23]. The simulation results confirm the accuracy of analytical outcomes, even though separating current harmonics to lowand high-orders and other simplifications in the proposed method create some errors. Similarly, authors in [24] have proposed an analytical method to estimate the harmonics of DC-link current in a three-phase Voltage Source Inverter (VSI). The presented work in that paper has similarities to the methodology applied in this paper. However, the authors in [24] have not considered practical assumptions of DC-link voltage ripples and distorted load currents. This analytical method has been employed in a few other works to find the DC-link current in an ASD when it is connected to an unbalanced load [25], [26]. The input current interharmonics of ASDs due to motor current imbalance have been modeled using the analytical equations of inverter switches function in [25]. The authors in that work have simplified the switching function of inverter switches by neglecting the harmonics due to the switching of the inverter. This approximation increases the estimation error of current harmonics at both across DClink and the input of an ASD, as the current harmonics due to the switching of inverter switches are significant. Rather than the interharmonics modeled in [25], equations to find the voltage ripples across the DC-link for a three-phase inverter connected to an unbalanced load have been derived in [26]. To find those equations, the current across DC-link at the inverter side has been modeled at first. In that study, the current harmonics of inverter's switching function have been recognized insignificant for DC-link voltage ripples and they are neglected. Therefore, the analysis in [26] ignores the 2-9 kHz current harmonics at the inverter-side of the ASD's DClink similar to [25].
The reviewed literature in the area of inverters current harmonics indicate that further research is needed to fully understand these harmonics and evaluate their impact on the network. In a previous related work, [12], an analytical study has been performed to derive required equations to estimate the inverter-side current harmonics without considering DClink voltage harmonics. The present work is the continuation of that research with adding practical and complicated case of considering the ripples of the DC-link voltage. Thus, high frequency current harmonics of a three-phase VSI are investigated in the frequency range of 2-9 kHz using a mathematical analysis considering load-side current and DC-link voltage harmonics. The main contributions of the presented work can be listed as below: • An accurate mathematical model is derived to find the inverter-side current harmonics of ASD considering the impact of voltage harmonics across ASD's DC-link. • Equations are developed for finding the frequency of inverter-side current harmonics that are affected by the voltage ripples across the ASD's DC-link . • The estimated inverter-side current harmonics by the proposed model can be used to find the grid-side current harmonics of an ASD for filter design applications.
The paper is organized as follows. Analytical equations required to find inverter-side current harmonics that pass through DC-link in an ASD are derived in the next section. These equations are then validated using the simulation results of a practical ASD in section III. The analysis of inverter current harmonics individual components using the proposed analytical model is presented in section IV. The accuracy of the analytical model to calculate the current harmonics of a practical ASD is investigated further using experimental measurements in section V. A discussion over the importance of inverter-side current harmonics analysis in the range 2-9 kHz is then presented in section VI. Finally, the presented research is concluded in section VII.

II. MATHEMATICAL FORMULATION OF INVERTER-SIDE CURRENT HARMONICS
In this section, an analytical approach is used to obtain the Fourier series of inverter-side current passing through the DC-link of an ASD, i inv , shown in Fig. 1 (b). It is worth mentioning that the proposed equation for i inv is developed in the next steps based on three models, the switching function of the inverter switches, the variation in the DC voltage across the DC-link of the adjustable speed drive, and the ASD's load side currents For that purpose, at the first step, the switching functions of inverter at phases "a" to "c", s x , where x ∈ {a, b, c}, and the load-side currents, i x , need to be calculated. The relationship between the phase "a" of the load-side to DC-link "0" point voltage, v a0 and the switching function s a , assuming v rec = v dc , can be expressed as v a0 = s a v rec . (1) From [27], Fourier series of the switching function at phase "a" s a for a Sinewave PWM is where ω c =2πf c is the carrier frequency, ω o = 2πf o is the fundamental frequency of output voltage, and M is the modulation index. Coefficient C mn also can be expressed as where J n represents the Bessel function of order n. Next, to find the Fourier series of v a0 from (1), the equation of v rec needs to be identified. As mentioned earlier, v rec has been simply assumed a ripple-free DC value in the previous works, such as [12], to simplify the derivation of an equation for i inv . In this paper, a more accurate representation of v rec including its ripples due to the voltage rectification of the three-phase grid voltages is considered for finding the inverter-side current harmonics. Towards that goal, the grid voltage at phase "a" v ag is assumed as where V p is the voltage amplitude, and ω g = 2πf g is the fundamental frequency of ASD's grid-side voltages. Thus, v rec is illustrated in Fig. 2, which can be found according to the rectifier function of the ASD and its grid-side voltages.
The equation for v rec can be found, for the highlighted interval [−π/6, π/6] in Fig. 2, as Moreover, the Fourier series of v rec is After substituting the value of V dc and coefficients a n and b n in (6) based on the relevant integrations over [−π/6, π/6], v rec is found as where V dc =3 √ 3V p /π. It can be realized from (7) that harmonic components of orders 6k, where k ∈ N, with respect to the grid frequency have a zero phase-angle for odd k, and 180°for even k. In the next step, the phase-neutral voltages at the load side of the ASD, v xn , where x ∈ {a, b, c}, need to be identified to find the load-side currents, i x . The relationships between phase-neutral voltages at the load side of the ASD's inverter in Fig. 1(b), v xn , and the phase-zero voltages, v x0 , at phase "a" is It should be noted that the Fourier series of phase-zero voltages v x0 can be found from (1) using Fourier series of switching function from (2) and v rec from (7). Using (8), v an can then be obtained as given in (9), where n ̸ = 3j, for j ∈ N.
Afterwards, i x can be found by v xn and the ASD's load impedance Z h ∠θ h , in each harmonic frequency. In this way, time-domain expression of the phase "a" load currents, i a , can be obtained from (9) as given in (10). Where Z o and θ o are the load impedance magnitude and phase-angle at f o , and Z mn,6k and θ mn,6k are the load impedance magnitude and phase-angle values at frequency mf c + nf o + 6kf g .
It is worth mentioning that the load-side impedance has been modeled by a Z mn in these equations, hence it could be used to model different load types. This variable, however, is assumed a resistive-inductive load for the analysis, simulations, and experimental results presented in this paper rather than a pure resistive or inductive load. The reason for this assumption is that the load of ASDs is usually an ac motor, which its circuit includes both resistors and inductors in practice. The inverter-side current that flows through the DC-link of the ASD, i inv , can finally be found by adding up the load-side currents i x in the top inverter leg switches as After inserting the time-domain expressions of switching functions at phases "a" to "c", s x , from (2) and load currents from (10) in (11), i inv can be calculated as given in (12). It needs to be mentioned that terms s b i b and s c i c can be obtained from (2) and (10)  and ω o t + 2π 3 , respectively. It is worth mentioning that the switching function in the above-mentioned process models the high frequency harmonics of the inverter. However, the amplitude and frequency of these harmonics depend on the modulation strategy and the switching frequency of the inverter. Thus, as s x in (2) is developed for an inverter that has a Sinewave PWM (SPWM) modulation strategy, the estimated current harmonics might be different when a modulation strategy other than SPWM is used. Therefore, in a case that another modulation strategy rather than SPWM is used, v a0 needs to be found based on Double Fourier series according to the PWM strategy, as explained in [27]. Then, the above-mentioned process can be repeated again to find these current harmonics. It must be noted that although the other modulation strategies are not considered here, the result of the proposed investigations and conclusions can be extended for the ASDs with different modulation strategies The Fourier expression of i inv in (12) includes eight terms shown as T1-T8, each with a specific range of harmonic frequencies. Term T1 is the DC component of i inv . Terms T2, T5, and T6 also include harmonics at mf c + 3nf o , whereas harmonics in terms T4, T7, and T8 have frequencies of form mf c + 3nf o + 6Kf g . On the other hand, term T3 models harmonics with only frequencies of form 6Kf g . These terms are employed in section IV to analyze the harmonic contents of i inv . It can be seen from (12) that the summation indices (m, n, k) go to infinity. On the other hand, the factors drop at higher indices values as can be seen from (3), where C m,n drops in larger values of m and n due to the behavior of Bessel function, J n . Moreover, coefficients with k have term 1/ 36k 2 − 1 , which quickly drops in magnitude in larger values of k. Thus, the summation indices (m, n, k) can be selected relatively small, but a more accurate estimation of i inv harmonic components is achieved by considering larger values for them. The required accuracy and the frequency range of the estimated harmonics can determine the required size of these summation indices. However, selecting a larger value for these indices causes longer calculation time, whereas the accuracy of i inv estimation at a higher frequency range is increased. The current harmonics of i inv , which can be found using (12), are the key variables for finding the current harmonics at the grid-side of an ASD. In fact, these current harmonics could pass through ASD's DC-link and transfer to the grid side with regard to the different filter configurations, the DC-link capacitor and the grid impedance. As a result, the proposed equations for i inv could be employed to find the current harmonics at the input of ASD at different conditions so that proper filter's configurations and parameters can be selected. To verify (12) for estimating i inv , its calculated outcomes are compared with simulation results of a practical ASD in the next section.

III. VALIDATION OF MATHEMATICAL FORMULATION WITH SIMULATION RESULTS
To verify the accuracy of the extracted mathematical equations, i inv is compared with simulation results based on an ASD modeled in Matlab Simulink in this section. The ASD is connected to a 240 V, 50 Hz grid, and it supplies a load with 10 Ω resistance and 1 mH inductance by f o =40 Hz, and f c =3 kHz. The filter configuration in these simulations was adjusted a conventional type with L dc =2.5 mH and C dc =500 µF. Fig. 3 (a) compares the time-domain waveform of i inv calculated by (12) with the simulation results. This figure confirms that i inv has similar waveforms in both cases. The harmonic contents of i inv , denoted by I h , in analytical and simulation cases are also compared in Fig. 3 (b)-(d). As this figure shows, the harmonic contents around the switching frequency of 3 kHz and its multiples, 6 kHz and 9 kHz, are close in the two cases. In fact, the reason for a small error in this figure is the differences between the voltage across DC-link, v dc , in the simulation model and v dc considered in the equation (12). Indeed, Fig. 1(b) shows that both DCchoke, L dc , and DC-link capacitor, C dc , are located across DC-link between the rectifier and the inverter in the ASD with a conventional-type filter. Among these parameters, C dc affects the voltage ripples and reduces them from the voltage waveform expected at the DC side of a six-pulse rectifier shown in Fig. 2. The inductor L dc also makes v rec ̸ = v dc with regard to the current that passes through this inductor. Thus, these parameters increase the error for estimating i inv , as v dc was assumed as the ideal voltage waveform in Fig.  2 expected for a six-pulse rectifier. It is worth mentioning that this error decreases for an ASD with SDLC filter configuration, as C dc in SDLC-type filter configuration is much smaller than the conventional-filter type. This capacitor is 500 µF for a 7.5 kW ASD with conventional filter used in this simulations, whereas it is reduced to 30 µF in a SDLC-type filter configuration as described in [28]. Additionally, L dc in the conventional filter type is removed when the SDLC filter is used, hence v rec = v dc at different loading conditions.
Next, the proposed model is compared with two existing models, (a) based on Constant DC-side voltage and the Fundamental-component of Load-side current (CDCFL) [29], and (b) based on Constant DC-side voltage and the Harmonics of Load-side current (CDCHL) [12]. The differences between the proposed model for estimating the current harmonics that flow through DC-link over the existing methods is discussed in Table 1. This table shows that CDCFL only considers the fundamental value of the load side currents, whereas load-side current harmonics are considered in CD-CHL method. In addition, DC-link voltage ripples have not been considered in both CDCFL and CDCHL. As the voltage ripples across DC-link affect load-side currents, neglecting them might increase the estimation error of i inv depending on the load parameters, especially in the frequency range below 2 kHz, such as at 300 Hz and its multiples. As it can be seen, the proposed method considers both DC-link voltage ripples and current harmonics at the load side for estimating i inv . Considering these voltage ripples increases the accuracy of estimated i inv .
As the accuracy of (12) is verified by time-domain simulations, this equation can be applied for analytical analysis of current harmonics device and system levels. Using (12) as a mathematical tool, the inverter-side circuit after DC-link can be accurately demonstrated as a current source with multiple frequencies. The equation can then be used to calculate the magnitude and phase-angle of the current source harmonic component at each frequency. This can facilitate the analysis of grid-side current harmonics and help with the modeling of a system with multiple ASDs (multi-drive network). A practical application of (12) is evaluating the frequency and pattern of the individual harmonics in i inv , which is presented in the next section.

IV. ANALYSIS OF INVERTER SIDE CURRENT HARMONICS
It can be realized from the terms T2 to T8 in (12) that the frequency of i inv harmonics can be found by one of the functions as and Where A ∈ N, B ∈ Z, and K ∈ Z. The amplitude and phase angle of i inv current harmonics in each of frequency functions (13) to (15) are described in the next paragraphs.

A. CURRENT HARMONICS AT FREQUENCIES f h1
The harmonics at Af c + 3Bf o are found based on the terms T2, T5 and T6 in (12). As each harmonic components Only the fundamental value of load-side currents was considered and its current harmonics were ignored.

CDCHL
The voltage across DC link was considered constant and the voltage ripples were neglected.
Load-side currents were modeled considering their harmonics and the impact of load impedance.

Proposed model
The voltage across DC link and its ripples are modeled. Load-side currents are modeled considering their harmonics and the impact of load impedance. and The current harmonics at f h1 = Af c + 3Bf o denoted by I h1 h can then be calculated by adding components from (16)- (18), as

B. CURRENT HARMONICS AT FREQUENCIES f h2
It can be figured out from (12) that only the term T3 is responsible for the current harmonics at f h2 = 6Kf g , hence the current harmonics for this frequency group, I h2 h , is equal to . (20)

C. CURRENT HARMONICS AT FREQUENCIES f h3
The equation (12) confirms that the harmonics at f h3 = Af c + 3Bf o + 6Kf g need to be found by considering the terms T4, T7, and T8. Thereby, the harmonic components phasors for the frequency group f h3 can be categorized into and as given in (23). As a result, a current harmonic at f h3 , shown by I h3 h , needs to be calculated by adding phasor components from (21) to (23) as Finally, the current harmonics of I inv,h can be found by I h1 h + I h2 h + I h3 h according to (19), (20), and (24). It can be found out from this study that the voltage ripples of v dc at 6Kf g need to be considered for finding I inv,h . In fact, the harmonics found by (20) are ignored when v dc is approximated by a constant DC voltage. In addition, this approximation could lead to a significant estimation error for I inv,h according to (24).

V. PRACTICAL MEASUREMENTS
Lab measurements of inverter-side current, i inv , of a threephase power converter in different switching frequencies are presented in this section. As the analytical results were consistent with the simulation results in section III, the lab measurements are compared with the simulation data of a similar system for further verification. The lab setup is shown in Fig. 4, where the utilized 7.5 kW motor drive is connected to a balanced three-phase voltage of 240 V (phase-ground) generated by a Chroma grid simulator. The connected load is a Y-connected load with series R-L (R = 80 Ω, L = 40 mH) at each phase.
The fundamental output voltage frequency (f o ) is set to 50 Hz in this test. Three cases with different switching To compare the measurement and simulation results, a system with similar load parameters has been modeled in Matlab Simulink. As the practical drive has two series 1000 µF DC-link capacitors, these values have been used in the implemented Simulink model. The switching patterns of the inverter-side six-pulse switches in the modeled system were also defined to be similar to the measured ones from the practical motor drive. Fig. 6 (a)  Harmonic components of experimental and simulation results of i inv between 2-9 kHz are compared for the three f c cases as shown in Fig. 7 (a)-(c). This figure confirms that higher frequency distortions at range 2-9 kHz are relatively close in both measurement and simulation results.

VI. DISCUSSING THE APPLICATION OF THE PROPOSED ANALYSES FOR THE POWER QUALITY IMPROVEMENT
This paper presents mathematical equations that can accurately estimate the inverter-side current harmonics considering the voltage ripple of the DC-link caused by rectification action of the diode-rectifier stage. Thus, the inverter stage in an ASD can be modeled simply as a current source with known magnitudes at different frequencies in the range 2-9 kHz. This provides a tool to analyze and estimated the injected harmonics to the power network for different applications as discussed in the next paragraphs.

A. HARMONICS FLOWING THROUGH THE DISTRIBUTION NETWORK GENERATED BY AN ASD
This inverter side current harmonics in an ASD could flow through DC-link and create the harmonics at the grid side of the ASD. However, the value of current harmonics at the grid side depends on different parameters, such as grid impedance, DC-link filter topology, DC-link filter design. Indeed, the DC-side current of inverter is the main variable in finding the current harmonics at the grid side. In fact, the inverter side can be modeled by current sources for each frequency applying the proposed equation (12) in this paper. After this simplification, the effect of DC-link filter parameters and rectifier switching on the inverter-side current harmonics need to be considered to find the current at the grid side. The process that these harmonics pass through DC-link and inject to the grid is described in detail to describe the application of the proposed analysis. To investigate the value of these current harmonics at the rectifier input, the model in Fig 1 (b) is simplified further based on different DC-link filter types as shown in Fig. 8.  As it can be seen in the model of Fig. 8, the inverter side of the ASD is replaced by a current source I inv,h that can be found according to the equation (12). In fact, a part of the current harmonics at the DC-side of inverter circulates through the DC-link capacitor C dc . However, the percentage of these harmonics that is damped by DC-link filter depends on the ASD's design and the parameters of electrical network. On the other hand, I inv,h can be canceled out by the current that passes through DC-link filter caused by the v rec ripples. The voltage harmonics due to these voltage ripples across DC- link are shown in Fig. 9 in the frequency range below 9 kHz.
As it can be seen in this figure, these voltage harmonics are at 6nf g , where ∀n ∈ N, due to the switching function of the rectifier. As a result of the harmonics due to i inv and v rec in an ASD, i rec can be represented according to the DC-link parameters configurations by where D f,h and θ f,h model the damping effect of dc-link filter parameters as explained in [25]. Also, I rip,h and θ rip,h are found by where Z f,h ∠θ f,h = Z Ldc,h ∠θ Ldc,h + Z Cdc,h ∠θ Cdc,h , assuming the conventional filter type configuration for DC-link parameters.
To investigate the impact of DC-link filter on the current harmonics, I inv,h , that pass through DC-link, simulations are performed. In these simulations, two common types of DClink filter in an ASD, Conventional and SDLC as introduced in Fig. 1(b), are considered. Fig 8 (a) and (b) depict the equivalent circuit of system when conventional type and SDLC type filter topologies are employed. The parameters of L dc and C dc for the conventional and SDLC type filters in these circuits are provided in Table 3 according to [28]. Fig. 10 shows the current harmonics that pass through the DC-link filter of the ASD at the rectifier side when either conventional filter type or SDLC filter type is used. It can be realized from this figure that the amplitude of I rec,h reduces significantly below 2 kHz when SDLC is used compared to conventional type filter. In addition, conventional filter type causes more mitigation of I rec,h between 2-9 kHz than the SDLC filter type, as D f,h × I inv,h is less when conventional type filter is used rather than the SDLC type filter. The current harmonics of i rec affect the currents at the grid side of ASD, i xg , x ∈ {a,b,c} according to the switching function of front-end rectifier that can be extracted as described in [25]. In fact, i xg is found by multiplying the switching function of the rectifier, denoted by s xg , and i rec as where s xg = ∞ k=1,5,7,11,13... S xg,k sin (kω g − θ sx,k ), and, Where C can take two values, 1 for k ∈ {5, 11, ...} and 2 for k ∈ {7, 13, ...}. According to (27), the harmonics at the input of the rectifier, I rec,h , affect the value of different current harmonics at the grid side. The variation in the frequency of the harmonics at the DC-side when they are transferred to the grid side can be found according to (25) and (28). Table 4 describes the harmonics at the grid side that are affected by a harmonic among f h1 , f h2 , f h3 at the DC-side of the ASD. This table demonstrates that a harmonic at the grid side can be affected by current harmonics at different frequencies in the DC-side due to the nonlinear function of the rectifier. In fact, it can be realized that the frequency of a current harmonic at the DC-side is shifted ±kf g when it is transferred to the grid side according to (28).
To further investigate the frequency and amplitude of current harmonics at the grid side of an ASD, I ag,h is demonstrated in Fig 11. In this figure,  The poor filtering of DC-link filter can occur when a small DC-link capacitor or DC-choke is used across the DC-link of an ASD. The reason for this poor filtering is that by selecting a small capacitor/DC-choke, the impedance seen at the grid side compared to DC-link capacitor decreases. As a result, the portion of 2-9 kHz that circulates through the DC-link capacitor is reduced. This conclusion can be confirmed by comparing the 2-9 kHz current harmonics at the grid side of an ASD when the conventional filter and SDLC DC filter types are used in Fig 11. It must be noted that the main reason that the SDLC type is used instead of the conventional type filter, in spite of poor filter between 2-9 kHz, is that it decreases the input harmonics below 2 kHz. Indeed, a smaller value of DC-link capacitor and DC-choke for the SDLC compared with the conventional type increases the DC-link impedance. Therefore, the current harmonics across DC-link due to the voltage ripple of v rec decrease. As these voltage harmonics have a high value in the frequencies below 2 kHz, the higher DC-link impedance for SDLC compared with the conventional type improves the input current harmonics below 2kHz.

B. THE SIGNIFICANCE OF FINDING 2-9 KHZ HARMONICS FLOWING THOUGH THE DISTRIBUTION NETWORK
Different types of linear and nonlinear loads in distribution networks generate reactive power as well as network disturbances and harmonics. High penetration of power electronics converters has the potential to degrade the power quality of grids introducing strong resonances in grids and harmonics, which pose severe risks to the distribution networks and their connected equipment. International standardization committees such as IEC and IEEE have developed different power quality standards such as IEC 61000-3-2 or 12 to control harmonic emissions in the grids below 2 kHz as described by Fig. 12. This figure depicts the emission limits that the ASDs need to meet according to the International

The frequency of a harmonic component at DC-side
The frequency of a harmonic component at grid-side f h1 = Afc + 3Bfo Afc + 3Bfo ± kfg f h2 = 6Kfg 6Kfg ± kfg f h2 = Afc + 3Bfo + 6Kfg Afc + 3Bfo + 6Kfg ± kfg Electrotechnical Commission (IEC) and International Special Committee on Radio Interference (CISPR). It should be noted that these standards are defined to control harmonic emission at a product level based on test conditions, such as setting the grid voltage with or without any harmonic background for any product tests. Other standards, such as IEEE 519, are based on demand current at the system level without considering the impact of grid voltage harmonics on power converters. Fig. 12 also shows that the harmonics generated by an ASD between 2-9 kHz have not been covered in the existing standards. In fact, the main reason for the emerging interest of standards in the range 2 kHz to 9 kHz is that the switching frequency of power converters and power line communication is within this frequency range. It must be noted that the existing measurement methods to calculate Total Harmonic Distortion (THD), power loss, and efficiency for the harmonics have been defined for harmonics below 2 kHz, thus they cannot be applied for the 2-9 kHz harmonics. To address this gap in the existing standards, standardization committees, such as IEC SC 77, have considered 2-9 kHz recently to develop emission limits and measurements methods for them [11], [28].

VII. CONCLUSION
In this paper, a precise mathematical model to estimate the inverter-side current harmonics in an Adjustable Speed Drive (ASD) is proposed. This is done by formulating the effect of DC-link voltage ripples on the load-side current of an ASD considering the inverter switching function. The inverter-side current harmonics that flow through DC-link are then found according to the harmonics at the load side of ASD and the modulation strategy of its rear-end inverter. Using the derived model, it is found that the frequency of the inverterside current harmonics could be categorized into three groups based on the harmonic components. One of these groups includes all the components related to rear-end inverter switching frequency, the fundamental frequency of load side voltage, and the DC-link voltage ripples harmonics, whereas the other one contains only the components due to DC-link voltage ripples harmonics. Furthermore, the study of these harmonic components showed that voltage ripples across the DC-link affect the inverter-side current harmonics at several frequencies, thus ignoring them can result in a relatively high estimation error. However, the existing models assume DClink voltage constant and ignore the load side harmonics for estimating inverter-side current of the ASD. As a result, since the proposed model considers the effect of these voltage ripples and load side harmonics in the ASD, it demonstrates a better performance for estimating the current harmonics than the existing models as simulation results confirm. Finally, the accuracy of the proposed model for estimating current harmonics up to 9 kHz in an ASD and the conclusions are validated through simulation and experimental results.