4-Pole Hybrid HVDC Circuit Breaker for Pole-to-Pole (PTP) Fault Protection

Numerous problems have emerged with the development of HVDC transmission technology. One of them is the fault current that occurs when there is an issue in the line. In particular, in the case of a PTP (pole-to-pole) fault, a DCCB design suitable for the direction is required because the fault current flows through the positive and negative poles. In the case of PTP fault, a fault current of the same value occurs in the opposite direction, and in the case of DCCB, the breaking efficiency may be reduced or even impossible to break due to a mistake in the emission direction or a wrong design. In particular, when designing using several unidirectional DCCBs, it is cheaper and consumes less area than typical DCCBs, so it is economical, but this problem may be more prominent. To solve this problem, this paper proposes a 4- pole Hybrid HVDC circuit breaker to solve this problem. This circuit optimizes the DCCB internal components through quantitative analysis of the fault current to reduce the influence of the residual fault current as well as the previously most important parameter, Zero-Cross Time (ZCT). We also verified the circuit’s energy dissipation process to increase reliability. The circuit in this paper is simulated based on the VSC-based HVDC transmission link. Physically analyze the derived results and described the circuit mechanism.


I. INTRODUCTION
To reduce greenhouse gas emissions during the power generation process, renewable energy sources such as solar and wind power were required. Renewable power generation is highly influenced by various environmental factors and very inconsistent, and the need for a different transmission technology also emerged due to the growing demand for energy in the modern society [1]. In the case of DC power transmission technology, the power factor is always 1 without transmitting reactive power compared to AC power transmission, so the transmission efficiency is high and the magnetic field is hardly generated, and it has attracted attention as a renewable power transmission method. In addition, the VSC-HVDC system is proposed as a multi-terminal technology because it The associate editor coordinating the review of this manuscript and approving it for publication was Enamul Haque. receives power from multiple solar and wind generators and can transmit power to different destinations using multiple inverters [2]- [4].
However, there are still many problems in HVDC transmission technology, which is the fault current generated in the event of a fault [5]. The fault current is very high compared to the steady-state, which adversely affects the entire transmission line, and causes secondary damage such as fire [6], [7]. To solve this problem, DCCB technology was introduced [8].
In the DC distribution system, faults occur largely due to pole-to-ground (PTG) fault and pole-to-pole (PTP) fault [9]- [12]. In Fig. 1, various situations of fault contingency are simply diagrammed [13]. In general, any fault that occurs between the converter and the current limiting reactor rather than in the line is called an external fault. Furthermore, based on the transmission direction, the fault is expressed as forward external fault (for example, converter station2 in the forward direction of the positive line) and backward external fault (for example, converter station1 in the reverse direction of the positive line) [13]. In the case of PTP fault, a short circuit is formed between the positive and negative lines or between the line and the case, creating a path for the fault current to flow in both lines [11], [12]. Therefore, multiple DCCBs suitable for the direction are inevitably required, increasing performance requirements such as the need for bidirectional DCCBs [14], [15].
There are many ways of breaking DC. Among them, the inverse voltage generation method is compacted using a fast disconnector, but it this approach is difficult to use for ultra-high voltage transmission. The inverse current injecting method has a large capacity and is easy to apply to the existing circuit breaker, but it has several drawbacks such as a long breaking time and a need for pre-charging in order to operate. In addition, there is a current communication method in which energy is stored and used in an inductive circuit. This paper uses the divergent current oscillation method to create an artificial current zero point using LC resonance currents connected in parallel for breaking them. The circuits of the same breaking method used in the past were simulated under the same conditions, and the results were compared in Chapter 3. Fig. 1(b) is a device arrangement structure of conventional hybrid HVDC circuit breaker [16]. Fig. 1(c) shows the structure of Fig. 1(b) in more detail as a circuit [16]. The conventional structure can break the PTP fault by arranging the structure to be symmetrical up and down. Each part can be divided into hybrid breaking units (HB), damping branches (DB), and pulse generator (PG) depending on usage. In hybrid DC circuit breakers, hybrid breaking units (HB) generally have a high-speed mechanical switch which minimizes loss when steady-state [17], [18]. Damping branches (DB) serve to limit overvoltage and emit LC resonant current generated by Pulse Generator (PG). Zero-crossing creates a current zero and, if detected safe, turn off the Breaking Units (HB) to completely break it. In this process, it generally takes a short time within 5ms to generate and break a fault current [16], [19].
We need a faster and a more efficient DCCB that does not significantly increase the number or specifications of the components in the conventional DCCBs, and we researched and developed a circuit of this paper. In the circuit, we propose a 4-pole DCCB that connects the positive and negative lines between the converter station and the transmission line, respectively. This circuit breaker can break both PTP and PTG faults, as described in Chapter 2B. In order to increase the efficiency, the reverse charging method is used, and the current limiting reactor and the grounding component are optimized in consideration of the effect of the residual fault current after the main line breaks [20]- [23]. In addition, the circuit is analyzed in the perspective of energy dissipation to improve the reliability of the circuit breaker [24].

II. OPERATING MECHANISM OF DCCB
The paragraph describes the operating mechanism of the DCCB presented in the paper, along with the quantitative analysis of fault current [25]- [27]. When verifying circuit performance in detail in the quantitative analysis of fault current in Chapter 3, it is used as data to supplement the evidence.

A. QUANTITATIVE ANALYSIS OF FAULT CURRENT
The transmission link used in this paper is VSC-based HVDC, and it is assumed that a fault occurs on the right side of Converter Station 1 [28]. The DCCB is located between Converter station 1 and the transmission line. Converter station 1 consisted of a DC capacitor, a DC filter 3 rd harmonic, and a smoothing reactor [29]. The sum of the impedances of DC Capacitor and DC filter 3 rd Harmonic is as follows: It is as follows: Therefore, a simplified equivalent circuit can be constructed as shown in Fig. 2(b). Applying the Laplace transform to the equivalent circuit is as follows: When D(s) = 0 is p 1,2 , it is as follows: R Sr + nR Tl L Sr + L Clr + nL Tl ,

VOLUME 10, 2022
It is the parameter of TABLE 1 and L Clr = 20mH, and it is α 2 < ω 0 2 (under-damped) assuming that the fault has occurred on the right side of the DCCB.
At this time, by the boundary condition, it is B 1 = i(0) and is as follows: On the other hand, Fig. 2(b) According to Kirchhoff's current law in the equivalent circuit, it is as follows: (6) and (7) are simultaneous.
Through (5) and (8), it is as follows: Fig. 2(c) is a graph comparing the actual simulation results when calculated under simulation conditions using the equation in (9). These are the simulation results and predicted values when the conditions of TABLE 1 and L PG = 1µH, C PG = 1µF, R GND = 10 , L Clr = 0.4mH. Comparing the magnitude of the predicted value and the simulation value at the first amplitude (here, around t = 3.001s) that has the greatest effect on the fault current, the error rate is relatively accurate at 8.9%, and the equation is also used to interpret the physical mechanism of Chapter 3, which will be described later.

B. DCCB OPERATION PROCESS
In this chapter, we propose a hybrid HVDC circuit with excellent performance that can break PTP faults and explain the operation process in detail. Fig. 3 shows the overall circuit diagram and operation process of DCCB proposed in this paper. As shown in Fig. 3(b), the current flow in the steady state is shown in the circuit. In addition to the path through B pos and B neg , C pg is charged through D pos and D neg . For C PG , when charging is complete, DC current no longer flows and no additional power loss occurs [30]. In the case of PTP fault, as shown in Fig. 3(c), fault current flows through the positive and negative poles and detects this and turns on T PG , T dis , and IGBT dis . In general, this detection measures the current near the port of Converter Station 1(pos) and Converter Station 2(neg), and sends a signal when there is an abnormality of a predetermined value (1.3 times the stead-state current in this paper) accurately measured. During this process, as the T PG is turned on, a reverse charging process occurs, generating a higher resonant current [30], [31]. Turn B pos and B neg to completely break the main line when creating zero-crossing point on the positive and negative lines respectively [32], [33]. As a result, the fault current flow as shown in Fig. 3(d).
To reduce residual fault current, the IGBT dis is turn-off as shown in Fig. 3(e) to allow the fault current to flow to ground, minimizing the effect on the converter station [34], [35]. Fig. 3(f) and Fig. 3(g) show the current flow that is break when PTG fault occurs on the right side of DCCB. In the case of T PG , when a fault current is detected on either the positive line or the negative line, T dis is designed to turn on only when a fault current is detected on the positive line, and IGBT dis is when a fault current is detected in the negative line. Therefore, the proposed circuit can break not only PTP fault but also PTG fault. However, different values of fault currents usually require a more comprehensive selection of pulse generator components is required than when used in one application. Fig. 4 is a graph showing the change in operating time and fault current of the switching components DCCB proposed in this paper. I fault is the current measured by B pos when the fault current is breaking in the main lines and I fault is the residual fault current after the main lines break. In the graph of IGBT dis , the black solid line turns on when the fault current is broken from the main lines as described above, and turned off when the residual fault current is eliminated. The red dotted line is the simulation result by excluding the turn-off process to examine the effect. If the IGBT dis is still on, the I fault will remain for a long time, which will have a huge adverse effect. If the current flow is changed by turning IGBT dis off, I fault is affected by R GND and the value of α in (9) increases, so the magnitude of I fault rapidly decreases. Therefore, it is possible to significantly reduce the components of the converter stations remaining in the residual fault current, so that it can be managed more safely.

III. SIMULATION RESULTS
The simulation results in this paper are validated based on VSC-based HVDC Transmission link 200MVA (±100 kV) in MATLAB simulink [36], [37]. As shown in Fig. 2(a), in the case of the right side of the transmission line, the DCCB and converter station with only the pole location changed symmetrically to the left. In the case of the conventional circuit, which is a comparison circuit, the PTP fault circuit was configured according to the arrangement of the circuit in Fig. 1(c) according to the arrangement of Fig. 1(b) and was designed to be symmetrically on the right side. Basically, when a 60km line is assumed, it is assumed that a fault occurs on the right side of the DCCB, and the parameters of the components are as shown in TABLE 1.

A. RELATIONSHIP BETWEEN DUTY CYCLE OF IGBT AND I fault
In addition to briefly looking at the role of IGBT dis in Fig. 4, we analyzed how the I fault value and the root-mean-square   (RMS) of the I fault changes with decreasing duty cycle. Rootmean-square (RMS) of the I fault was measured from 3 seconds to 3.2 seconds immediately after breaking. In this process, L Clr = 4 · 10 −4 H, L PG = 10 −6 H, C PG = 10 −6 F, R GND = 10 were fixed, and only the duty cycle of IGBT dis was changed. Fig. 5 is a graph showing the change in I fault according to a duty cycle of IGBT dis . The higher the duty cycle, the longer the residual fault current will remain in the circuit and its effect tended to persist. On the other hand, a lower duty cycles makes I fault more dependent on the grounding component, which greatly reduces its magnitude and reduces the effect of residual fault currents. It can be seen that reaching about duty cycle 1% with the intuitive I RMS duty cycle can be reduced by 56% compared to duty cycle 10%. It does not necessarily have to reach duty cycle 0.1%, but a shorter duty cycle has a direct impact on the I fault reduction, and the shorter time between on and off of the IGBT dis technology the better the performance of the DCCB.

B. RELATIONSHIP BETWEEN L GND AND I' fault
In the case of the proposed circuit, the initial I fault influence is relatively high because the arrester VDR is not used in the pulse generator path compared to the conventional circuit, but this can be improved by adjusting the value of the component connected to the ground. In order to exclude the influence of other components, only the value of L GND is changed and measure under the conditions as before, L Clr = 4 · 10 −4 H, L PG = 10 −6 H and C PG = 10 −6 F. Fig. 6 is a graph showing a change in I fault as the value of L GND changes. For L GND , the location of the R GND component is replaced by an inductor. In the case of the proposed DCCB, since the residual fault current returns to the inside of the DCCB, the impedance increases as the inductance increases, so the value of I fault decreases. At this time, the higher the inductance, the lower the value of I fault and ripple, which improves the performance, but it is necessary to look more closely in terms of energy dissipation.

C. DEFINITION OF ENERGY DISSIPATION TIME t dis
In the case of the proposed circuit, since the arrester VDR is not necessarily arranged, the voltage between DCCB and ground is measured to determine whether energy dissipation has occurred after main lines break. Fig. 7 shows the measurement of the voltage between DCCB and ground according to the change of L GND to analyze the circuit in terms of energy dissipation. In this paper, the energy dissipation time t dis is defined as follows: based on the steady-state voltage (here, t = 3s), if the point 95% lower after the fault is called t dis , the highest value of t dis is defined as t dis . This definition is to determine the energy dissipation time at a point where the internal voltage fluctuates and the value of t dis occurs multiple times during the break process. Here the energy is gradually and no more energy is dissipated. In the case of DCCB in this paper, since the value of t dis is defined in arbitrary parameter, a separate component such as a surge arrester is not required.

D. RELATIONSHIP BETWEEN I fault AND ENERGY DISSIPATION ACCORDING TO THE CHANGE OF THE GROUNDING COMPONENT (L GND OR R GND )
As mentioned in Chapter 3 B, simulation measurements were performed to prove that I fault decreases as the L GND increases, but becomes more disadvantageous in terms of energy dissipation. In the simulation, the conditions are the same as before, except that L GND is L Clr = 4 · 10 −4 H, L PG = 10 −6 H, C PG = 10 −6 F. The conventional circuit is schematically shown in Fig. 1(c), but it is simulated under the conditions of L Clr = 4 · 10 −4 H, L PG = 10 −6 H and C PG = 10 −5 F (If C PG = 10 −6 F, the main line cannot be broken) without a grounding component.
In Fig. 8(a), various physical values were measured to confirm the relationship between I fault and energy dissipation according to the change of L GND . As described in Fig. 7 above, the voltage fluctuation is high when the fault current occurs and then breaks. At this time, the upper and lower limits of the voltage are shown in a graph, and the lower the pulse range, the less the performance of energy and the better the performance. In addition, the related factor t dis , generally has a similar pattern to the voltage between DCCB and ground, likewise the lower the voltage, the faster the energy dissipation and the better the performance. Also, for I fault , lower the effect of the fault current on the entire circuit, the better. However, as the value of L GND decreases, the influence of inductor on the energy dissipation process can also decrease t dis , but there is a trade-off relationship between these factors as it increases the value of I fault as mentioned in Fig. 6. However, in the case of t dis , the change occurs gradually, whereas in the case of I fault , it changes significantly based on a specific branch point. Therefore, we suggest that an L GND design of 20mH is optimal. Compared to the conventional circuit, the performance is better at both t dis and peak current of I fault at the optimized value, but the value becomes higher at the voltage between DCCB and ground, so improvement is needed. Fig. 8(b) measured various physical values to confirm the relationship between I fault and energy dissipation according to the change in R GND . As with L GND , residual fault current flows after the main line break, the impedance increases as the value of R GND increases and the value of I fault decreases. However, there is also a trade-off between these factors as this also delays the elimination of the residual fault currents and increases t dis . In this process, it is suggested that it is optimal to design 10 that does not have high t dis and is relatively less affected by I fault . Compared to the conventional circuit, the voltage between DCCB and ground, which need improvement in L GND , as well as the t dis and peak current of I fault performance are significantly improved. When comparing the absolute values of the optimal points presented in Fig. 8(a) and Fig. 8(b), 20 mH and 10 are I fault_peak (20mH) ≈ 10kA, t dis (20mH) ≈ 10ms and I fault_peak (10 ) ≈ 9.2kA, t dis (10 ) ≈ 2ms, designing with resistors has better characteristics than designing with inductors.

E. RELATIONSHIP BETWEEN I fault AND ZCT ACCORDING TO L Clr CHANGE
In case of L Clr , it has a great influence on the process of reaching the fault current before main line breaks. In this VOLUME 10, 2022 process, L PG = 10 −6 H, C PG = 10 −6 F, R GND = 10 were fixed, and only the L Clr was changed. Fig. 9 is a graph showing the zero-crossing time (ZCT) and the value of I fault according to the change of L Clr . At this point, the circuit is symmetrical, so we change the value of the current limiting reactor on the positive and negative lines. In particular, in the case of current limiting reactors, inductors are used to reduce energy consumption at steady-state current and to reduce sudden changes in current. This characteristic also results in a much longer time for the fault current to reach its sensed value, which also increased the break time. On the other hand, L Clr is a parameter that affects the value of I fault like L GND , and as L Clr increases, I fault decreases. For ZCT and I fault , there is a trade-off between both factors, as lower values result in better performance. Both ZCT and I fault factors have advantages because a sharply decreasing point occurs during the reduction of I fault when the change in ZCT is low, and is optimally suggested when L Clr = 10mH. In the case of the conventional circuit, when the value of L Clr_pos (or L Clr_neg ) is 2·10 −2 H, it cannot be broken by divergence. Even when the breaking optimized values are compared, the proposed circuit has excellent performance in the case of ZCT.

F. THE RELATIONSHIP OF ZCT ACCORDING TO THE CHANGE OF C PG AND L PG
For C PG , L PG , the ZCT depended on the waveform and value generated because it generated a resonant current and a zerocrossing point. Likewise, in the case of conventional circuit, it is not possible to break all values of L PG and C PG of pulse generator, so the values of L PG and C PG that can be broken are found and ZCT is measured accordingly.  conventional circuit and proposed circuit selected L PG and C PG near 10 −6 H and 10 −6 F. In the case of a proposed circuit, there is an advantage in that the spectrum of L PG and C PG that can be broken is wide compared to the conventional circuit. In addition, even if a problem occurs in the components of the pulse generator during the manufacturing process, the performance is not significantly deteriorated, which means the reliability of the proposed circuit.

G. THE RELATIONSHIP BETWEEN THE LOCATION OF THE FAULT IN THE TRANSMISSION LINE AND THE I fault
In this case, the PTP fault point n means the length assumed in Fig. 2(a). Basically, the previous results were simulated based on 60km, but in this simulation, the transmission line was tested by extending not only 60km but also 300km to observe the characteristics of the transmission line on DCCB. In this process, L Clr = 4 · 10 −4 H, L PG = 10 −6 H, C PG = 10 −6 F, R GND = 10 were fixed, and only PTP fault point n was changed. Fig. 11 is a graph showing the changes in I fault value according to the location. Since PTP fault occurs at points n and 1-n, a fault occurs at each point where n is 0 ≤ n ≤ 1. In the case of a 300km transmission line, it can be seen that the value of I fault decreases faster as n increases compared to 60km. However, as explained above, the peak current of I fault is only affected by the grounding component, so it should be independent of the length of the transmission line.
This problem can be solved by analyzing in detail through Fig. 11(b). Fig. 11(b) is the measurement of I fault waveforms for a very short time before and after ZCT. In this graph, n is divided into three parts: 1, 0.5, and 0 to show the changing pattern concisely. The solid line in the graph represents the case where the IGBT dis duty cycle is set to 0.1% as follows:  Fig. 11(a), the dotted line is the case where 1% is set to investigate the influence of the grounding component. You can see the effect in more detail. In the time zone behind the arrow, a sharp decrease can be seen under the influence of the grounding components. It doesn't show up on the graph, it is very low in 'µs' in the main line break, so it is not a problem in the situation where I fault times are compared to 'ns'. However, since the turn-on and turn-off times of IGBT dis are the same as the dotted and solid lines, as for the time delay until the main line break, the lower than the value of n, the faster the I fault increased. Since peak current of I fault is measured based on the upper limit of residual fault current after the main line break, the value of I fault tended to decrease as n increased. When the time interval between turn-on and turn-off of the IGBT dis increases relatively significantly, the same upper bound is reached in all three cases, eliminating the difference from changes in n. On the other hand, Fig. 11(a) slightly increased after n = 0.7 because the longer the transmission line, the greater the influence of the initial generated I fault , the greater the ripple. As a result, the peak current of I fault is generated at the local maximum after the first. Therefore, in the case of DCCB presented in this paper, the value of I fault is determined by grounding component regardless of the length of the transmission line.

IV. CONCLUSION
In this paper, we propose a 4-pole hybrid HVDC circuit breaker for PTP fault protection. Located between the converter station and the transmission line, the purpose of this study is to develop a DCCB to effectively break PTP faults. The circuit does not require separate charging by charging the capacitor when the capacitor is a steady-state current, and it breaks the fault current by inducing it more efficiently through the reverse charging method. IGBTs also allow residual fault currents to flow to ground after a main line break, reducing the effect of fault currents on the converter station.
Grounding components, L Clr , C PG , and L PG , which are important components used in the circuit, are verified using ZCT and I fault , which determine their performance, and the optimum points are presented to clarify the considerations for design. Qualitatively analyze the mechanism of the circuit and add quantitative analysis in case of I fault , an important parameter, to increase reliability. These analysis methods and simulation results are thought to be helpful for DCCB research.

A. Z eq DERIVATION PROCESS
The conventional DC capacitor and DC filter 3 rd Harmonic components are arranged as shown on the left of Fig. 12.
In order to treat this as a simple equivalent RLC single component, the equivalent circuit must be constructed and calculated, so the Y-transformation is applied to C Cs1 , C Cs3 , R Cs , and L Cs .
Substitute the value of (17) into (14) to derive the local maximum value.