A Family of Discontinuous PWM Strategies for Quasi Z-source Nine-Switch Inverters

This paper proposes a new family of discontinuous PWM strategies to control the quasi-Z-source nine-switch inverters (qZS-NSI). The presented strategies provide buck and boost inversion capabilities, and suitable for common-frequency and different-frequency modes of operation. Accordingly, two different shoot-through (ST) approaches are introduced and compared. The first approach uses three-leg ST, while the second uses single-leg ST to reduce the number of switching commutations, therefore minimizing switching losses. Both approaches can be implemented using simple-boost (SB) and maximum boost (MB) control methods. The operating principles, performance criteria, and PWM modulator of each scheme are introduced. Compared to the conventional PWM technique for the same output voltage gains, the proposed schemes ensure continuous input current with minimum ripples, and the voltage stresses on the switching devices and capacitors could be reduced in the proposed MB control schemes. Moreover, the effective switching frequency of upper and lower switches of all schemes is fixed and could be reduced by 1/3 from the switching frequency of the conventional technique of the qZS-NSI, while only the single-leg ST schemes ensure minimum effective switching frequency of the middle switches. The proposed modulation strategies are digitally implemented and tested on the LAUNCHXL-F28379D DSP. The feasibility of the proposed modulation schemes is confirmed via simulation and experimental results, which show good agreement with the theoretical analysis. Moreover, the presented strategies can be applied to other types of Z-source NSIs.


I. INTRODUCTION
Reducing converter size through reduced switch topologies and lower volume passives is an active research theme in power electronics. Conventional nine-switch inverters (NSIs) were proposed in [1] to supply two independent AC loads with only nine active switches instead of the twelve used in the conventional converter, as shown in Fig. 1. As a result, the converter switching losses, thermal stresses, and cost are eventually reduced [2]. The switch-count reduction in NSIs represents the main reason why such a topology received considerable interest in the literature.
The operation of this structure has already been practically confirmed for two different modes of operations: Different Frequencies (DF) mode, which can be used to drive two threephase ac motors independently, and Common Frequencies (CF) mode, which can be used to control the operation of a six-phase motor [3]- [7]. Various carrier-based (CB), space vector PWM and model predictive control techniques have been proposed to achieve superior performance of the NSI for both DF and CF modes [1]- [4], [8]- [12]. The CB-PWM techniques are a simple and efficient approach to modulate the NSI switches. Fig. 2 shows four different CB-PWM schemes. Many researchers have assessed these schemes, as discussed in [8], [9]. Among these schemes, the discontinuous PWM (DM) with a sawtooth carrier wave scheme dramatically reduces the switching loss of the NSI with minimal low frequency and even harmonic distortion [9].
Literature has also shown that the NSI is a highly functional topology; it is well suited for various applications that require both CF and DF operating modes. The NSI, therefore, has a wide variety of uses, such as uninterruptible power supplies [2], drive systems [5]- [7], [13], charging and propulsion systems for EVs [14], reactive power compensation [15], wind energy [16], unified power quality conditioner [17], [18] and The main features of the proposed schemes for qZS-NSI can be summarized as follows: 1) Provides dual three-phase outputs, while both boosting and bucking operations can be achieved; 2) Continuous input current operation with lower ripples; 3) No need for dead-time intervals; 4) The utilization of ST states increases inverter reliability; 5) The adopted DM schemes reduce the inverter's switches commutations; 6) The qZS-NSI topology can be utilized for dual-output, six-phase operation, and ac-ac power conversion. The topology's main drawback is the higher stresses experienced by both NSI units on the middle switches.
Given its many merits, the rest of this paper is organized as follows. Section II introduces the topology of qZS-NSI and its operating principles. Two main PWM strategies based on DM techniques with simple-boost (SB) and maximum boost (MB) control approaches are classified and presented in section III. These strategies are namely three-leg ST and single-leg ST. Sections IV and V present the detailed analysis and the basic concepts of the proposed DM schemes. Moreover, the boosting factor and voltage gain relationships, as well as the modulator of each scheme, are analyzed in detail. The design considerations for the analyzed schemes are presented in section VI. The proposed methods have been compared and assessed in section VII. Finally, Section VII deals with the simulations and experimental results.

A. TOPOLOGY
The power circuit of the qZS-NSI and their equivalent circuits for different operating modes are shown in Fig. 3. In addition to a diode, an impedance network is inserted at the front-end of the standard NSI-bridge. This combination is used to boost the input dc-voltage using additional ST state combinations.

B. OPERATING PRINCIPLES
The equivalent circuits of the qZS-NSI during the ST and the non-ST states are shown in Fig. 3(b) and (c). From the steadystate analysis of the qZS-NSI circuit of Fig. 3(b) and (c), the boosting factor, can be defined by (1); (1) where ̂ is the peak dc-link voltage, is the input voltage and is the average ST duty cycle, which depends on modulation and shoot-through control methods.
Based on the volt-second balance concept across both 1 and 2 , the normalized capacitor voltages are expressed in (2).
Finally, the voltage-gain for each output unit of the inverter ( 1 and 2 ) is defined as the ratio of the peak phase-voltage of each output to the input dc-voltage. Hence:

III. PROPOSED DM TECHNIQUE FOR QZSNSI
The standard DM scheme for NSIs was well described in the literature [8], [9], but several details that serve as the foundation for building the proposed DM strategies for qZS-NSI are first reported in this section. Then, the proposed modulation technique is presented.

A. CONVENTIONAL DM SCHEME FOR NSI
The duty cycles in the DM scheme of the NSI for the upper and lower units, respectively, ( and ) are defined by (4); where ≥ (0 ≤ ≤ 1) and * , * and , are the sinusoidal reference and zero-sequence signals (ZSS) for both units, respectively. The sinusoidal references are defined by (5) [9] and the ZSSs are governed by (6).
In (5), 1 and 2 are the frequencies in rad/s, 1 and 2 are the modulation indices of upper and lower units, respectively, the angle represents the phase angle between the two sets of output voltages, where | | ≤ , and ∈ {1, 2, 3}. In DF operating mode, to avoid the crossover between the duty cycles of each leg (e.g., and for leg 1), the modulation index is limited by 1 + 2 ≤ 2/√3, while for the CF mode, their limit is 1 + 2 ≥ 2/√3 depending on the phase angle . For the sake of illustration, Fig.4 shows the generation of the B9 gating pulses for DF mode using the DM scheme.

B. PROPOSED DM SCHEMES FOR QZSNSI TOPOLOGY
As in the standard ZSI, to achieve the boosting action for the qZS-NSI, the zero switching states are partially or entirely replaced by the ST state. Quite obviously, due to the upward and downward level shift of the duty cycles to obtain a clamping operation in the DM approach, only one zero state {0,0,0} is generated in the range of 1 + 2 ≤ 2/√3, like the duty cycles drawn in Fig. 4. Therefore, the modulation range for the proposed schemes must be limited by 1 + 2 ≤ 2/√3 in both DF and CF modes. Based on the volt-second balance concept, the zero-state duty cycle is equal to the corresponding region's height, which is varying, as shown in Fig. 4. It can be determined from (7); and . are the minimum and maximum envelop of upper and lower duty cycles, respectively.
The proposed modulation schemes are classified according to how they achieve the ST state as Three-Leg ST (3L-ST) and Single-Leg ST (1L-ST) approaches. In this paper, the SB and MB control methods are developed for both approaches with CF and DF modes of operations. In the SB method, (the ST duty cycle) is constant and less than 0 , while in the MB method, the zero-state duration given in (7) is used for ST.

IV. THREE-LEG SHOOT-THROUGH DM APPROACH
This approach utilizes two additional ST envelope signals, namely 1 and 2 that are inserted in the zero-state region, as shown in Fig. 5(b) and (c) to achieve the ST mode. Consequently, the total ST duty ratio during a switching period can be obtained from the ST envelope signal as follows

A. USING SB CONTROL METHOD (3L-ST DM/SB)
The ST envelope signals in this method (see Fig. 5(b)) are Based on (9), the ST duration, in this case, is constant, with an average value shown in (10).

B. USING MB CONTROL METHOD (3L-ST DM/MB)
To achieve maximum boost, the ST envelopes (as shown in Fig. 5(c)) are defined by (11).
Consequently, in this case is time-varying, outputfrequency dependent, and equals the zero-state duty-cycle 0 given in (7). Regarding the output frequencies, the average ST duty cycle, is a constant and given by (12).
Finally, the ST pulses are logically added to that of the standard modulator to obtain the gating pulses of the qZS-NSI. Fig. 7 shows the duty cycles and gating pulses for both standard and qZS-NSI using the 3L-ST approach. It is evident from Fig. 6(a) that, using this modulator, the NSI-bridge goes to the ST state by turning ON all the switches simultaneously, resulting in an equal distribution of the ST current among them. Furthermore, each switch is continuously commutating with one-third of the ST current during the entire fundamental cycle. Another observation raised from Figs. 4, 7(a), and 7(b) is that the standard NSI has only seven commutations during each switching cycle, while the qZS-NSI has 10 and 8 commutations in the 3LST/SB and 3LST/MB control methods, respectively. This is owed to the application of ST pulses in all switches. Quite expectedly, the 3LST schemes produce higher switching losses under all operating conditions. Besides, it induces high ripples in the inductor currents. Based on the prior discussion, the following section's main objective is to avoid these harmful effects.

V. SINGLE-LEG SHOOT-THROUGH DM APPROACH
Alternatively, the 1L-ST approach can be utilized by inserting ST states in one leg during the zero-state. As can be observed from Fig. 4, four state transitions (e.g., Active-1, Active-2, Zero {0,0,0}, Active-3, and Active-4) occur in the standard NSI using the DM scheme. As a result, different approaches can be used to insert the ST interval in each switching cycle. Two 1L-ST schemes called DM4 and DM2 are proposed here. It is worth noting that the following constraints should be respected to obtain proper operation of the qZS-NSI with a reduced number of commutations and, therefore, the overall inverter switching losses: 1) The ST insertion should not affect active state length.
2) To maintain clamping operation, the active states A1 and A4 should be applied at the start and end of a switching cycle, respectively. As a result, one phase from the upper group is clamped to the positive dc rail and, another one from the lower group is clamped to the negative dc rail while the remaining phases are modulated.
3) The ST states are added immediately adjacent to the active states of the conventional NSI to ensure minimum commutations of the qZS-NSI switching devices. 4) In each scheme, equal ST sub-intervals are utilized to minimize the inductances in the impedance network.

1) USING THE SB CONTROL METHOD
In this scheme, the total ST period is equally divided into four sub-intervals per switching cycle ( /4), as shown in Fig. 7(c).

FIGURE 5. The modulating and ST envelop signals for the proposed DM strategy. (Shaded areas represent the area of ST states).
Each sub-interval is inserted immediately adjacent to one of the active states without affecting its length. The first ST state (ST 1 ) is inserted at the right of the active state A1, while the last ST state (ST 4 ) is applied at the left of the active state A4. The remaining two active states from the upper and lower groups (A2 and A3) are then shifted to the right and left by /4, respectively. Hence, the last two ST states (ST 2 and ST 3 ) are then applied. Thus, during a switching cycle, this scheme has eight-state transitions (e.g., A1, ST, A2, ST, Zero, ST, A3, ST, A4) with only seven commutations as in the standard NSI Again, scalar implementation of qZS-NSI using 1L-ST DM schemes is possible by modifying the duty cycles given in (4) to obtain the ST states.
In this approach, two duty cycles for each upper and lower switch are utilized. These duty cycles are spaced by the ST sub-interval ( /4 in this case). Hence, the new duty cycles for the B9 switches are given by (14); Finally, under this scheme, the total ST duty cycle is defined by (10). Fig. 5(c) shows the duty cycles of this scheme.

2) USING THE MB CONTROL METHOD
To obtain a maximum-boost operation, the total ST interval should be equal to that of the zero states, and therefore, the zero states will have vanished. Consequently, the ST states should be redistributed to achieve equal sub-intervals. As a result, only three ST sub-intervals are utilized in this scheme, as shown in Fig. 7(d), and the new duty cycles are given in (16), where is given by (17). Moreover, the waveforms of this scheme are shown in Fig.  5(d). Finally, it is essential to note that this scheme is called DM4 due to the utilization of 4 modified duty cycles to achieve the performance.

B. 1L-ST DM2 SCHEME
Another 1L-ST DM scheme is proposed here. It is called the DM2 scheme. It modifies only two duty cycles. Also, both SB and MB control approaches are valid in this scheme.

1) USING THE SB CONTROL METHOD
Here, the total ST duration is equally divided into two parts per switching cycle ( /2). Each interval is inserted between the active and the zero states without affecting their intervals, as shown in Fig. 7(e). Therefore, this scheme's duty cycles are as given in (18)

C. PROPOSED MODULATOR FOR 1L-ST DM SCHEMES
As an illustration, Fig. 6 Fig. 6(b) and the resulting switching signals of Fig. 7(a)-(d), it can be observed that ST states are obtained in the 1LST schemes via turning-ON the middle switches, of B9, which increases the burden of these common switches.

A. USING SB CONTROL METHOD
As in the qZSI, and based on the volt-second balance concept, the required inductance ( = 1 = 2 ) and capacitances ( 1 and 2 ) for the qZS-NSI can be determined by (21) where ̃ is the effective switching frequency, Δ is the current variation, is the average input dc-current, and ∆ 1 and ∆ 2 are the peak-to-peak voltage ripples of 1 and 2 , respectively.
In the SB approach, the ST duty cycle is constant and given by (10). Then, the required inductance and capacitance are as shown in (22). It should be noted that the effective switching frequency on the dc-side varies from one scheme to another, as will be explained in the next section. Even though all SB control schemes have the same voltage gains, they require different inductances and capacitances.

B. USING MB CONTROL METHOD
In general, the ST duty cycle in the MB approach is timevariant and has low-frequency components. It repeats at six times the fundamental frequency of the output voltage of qZSIs. However, in the qZS-NSI, there are dual outputs, and the output frequencies may be equal in CF mode or unequal in DF mode. Therefore, although the average value of the ST duty cycle is the same for both CF and DF, the frequency of the fundamental component of the ST duty cycle is varying and given by (23).
As a result, there are two components of the inductor current ripple: 1) high-frequency components due to the DM schemes' switching nature and 2) low-frequency components due to the ST duty cycle variation. It should be noticed that the high-frequency component can be negligible compared to the low-frequency component in the evaluation of the impedance network passive components. Following the procedure used in [29] for the qZSI, the required inductance and capacitance for qZS-NSI can be calculated from (24); where ̂ is the peak value of the fundamental component of the ST duty cycle for the MB control approach. Based on Fourier Series expansion ̂ is obtained in the qZS-NSI (25).
Thus, the values of impedance network elements (inductances and capacitances) are given by (26).
Equations (24)- (26) are used to determine the minimum inductance and capacitance for the MB approach.

VI. COMPARATIVE ASSESSMENT AND SIMULATIONS
This section introduces a detailed comparative assessment of the introduced DM schemes of qZS-NSIs described in this paper. This assessment includes the following aspects: steady-state analysis, current and voltage stresses, the effective switching frequency of all semiconductors, and the passive components requirements. Finally, the switching losses and the inverter efficiency are explored. Note that a one kVA qZS-NSI has been designed and modeled via MATLAB/PLECS platforms to be used in the assessment. A constant dc voltage source of 100V is assumed to feed the inverter. The parameters of the impedance network, output filters, and loads are listed in Table I. Table II lists more evident visual comparisons among the analyzed schemes regarding steady-state equations of the qZS-NSI. Since the boosting factor ( =̂⁄ ) is determined by the total average ST duration, , regardless of the ST insertion manner. Therefore, the boosting ability and the corresponding output voltage gains of the qZS-NSI are the same while maintaining the same total ST duration.

A. MODULATION AND STEADY-STATE EQUATIONS
The subscript maybe 1 for the upper 3-phase group or 2 for the lower one.

FIGURE 8. Results for analytical comparisons between the presented modulation schemes.
Consequently, the proposed modulation schemes can be subdivided into two groups (SB group and MB group), where each group has the same average ST duty cycle, i.e., the same voltage gain capability. Fig. 8(a) shows the dependency of the boosting factor of the qZS-NSI based on SB and MB control methods on the possible modulation indices. Moreover, the results of the analytical comparisons are shown in Fig. 8(b).

B. IMPLEMENTATIONS
The implementation procedure represents an important aspect that should be considered for the proposed DM schemes. Table III compares the analyzed DM schemes in terms of the number of duty cycles and ST intervals used in the implementation aspects. The complexity is determined based on the analyzed schemes' implementation procedure using the enhanced PWM (ePWM) modules of modern DSPs. Although the 1L-ST schemes are complex in implementation, it has a minimum number of commutations.

C. EFFECTIVE SWITCHING FREQUENCY
From the prior discussion in the analysis parts of this paper, it has been observed that each scheme has a unique switching pattern. This yields different values of the effective switching frequency of semiconductor switches. Consequently, different dc-side passive elements are required. Table IV lists the effective switching frequency for the qZS-NSI topology as a function of the carrier frequency, . Furthermore, the following conclusions can be made: 1) The effective switching frequency of upper and lower switches of the B9 is fixed at 2/3 in all schemes. This is owed to the nature of DM techniques, which have clamped modulating signals.    2) The utilization of all switches of B9 for ST state in the 3L-ST DM schemes increases the total number of commutations, as shown in Table III. This increases the effective switching frequency of the middle switches, as shown in Table IV. 3) In the case of 1L-ST DM schemes (DM4 and DM2), the effective switching frequency of the middle switches are reduced to . Consequently, it can be predicted that the switching loss of these schemes will be reduced. 4) The effective switching frequency of the front-end diode, is hugely different between the presented schemes. It has higher values for DM4 schemes. On the other hand, the 3L-ST DM scheme has a lower switching frequency on the dc-side.

D. REQUIRED PASSIVE COMPONENTS AND RIPPLES
As can be observed from (22), the required inductances and capacitances in the SB control schemes are inversely proportional to the effective switching frequency for the same current and voltage ripples. Consequently, it can be found that the 3LST DM/SB scheme requires a higher inductance and capacitance than the other schemes. On the other hand, in the implementation of MB control schemes, the fundamental frequency of the impedance network , given in (23), instead of the effective switching frequency should be considered. This is owed to the presentation of low-frequency (LF) components in the dc-side, as concluded in Table V. Therefore, all MB schemes require higher inductances and capacitances than SB schemes for the same ripples. Fig. 9 shows the required inductance and the capacitance ratio between these control approaches for different voltage gains and operating frequencies.
On the other hand, to ensure the same voltage and current ripple magnitude under various operating conditions, different impedance network capacitances and inductances are required for each scheme. According to (22) and (26), the required , and values to ensure the voltage ripple of 2% and current ripple of 25%, respectively, are determined, and the results are listed in Table VI.
It is worth noting that the impedance network, in practice, shall be designed based on the lowest value of the effective switching frequency to optimize the operation for all analyzed schemes. Based on the values listed in Table VI, the recommended chosen parameters of the 1-kVA qZS-NSI circuit's impedance network are 1.25mH and 470µF, respectively. The dc-link voltage, capacitor voltage, and inductor current waveforms are depicted in Figs based on these values. 10 and 11 for the presented modulation schemes. Fig. 10 shows the ripple characteristics of the SB control approach. In this case, the modulation indexes are set to 0.3374 to obtain unity voltage gains for both outputs. It can be observed that the inductor current and capacitor voltage waveforms are free from low-order harmonics. Fig. 11 also shows the MB control schemes' results, where the modulation indexes are set to 0.3561 to obtain the same voltage gains of the SB control approaches.
In both cases, the simulation results confirm and verify the functionality and the reported analysis of the proposed modulation strategies.  Lratio Lratio Cratio Cratio Moreover, the dc-link voltage and current measured values comply with the theoretical values for all cases.

1) VOLTAGE STRESSES
The boosting factor and capacitor voltages of the analyzed modulation schemes are listed in Table II, where ̂ is the peak dc-link voltage, which represents the voltage stresses across the different B9 switches. Fig. 6 shows the ratio of boosting factors between the presented schemes for the same output voltage gains of the two groups. It is worth noting that the voltage stresses on the switching devices and capacitors, which are proportional to the boosting factor, are lower in the MB control schemes versus SB schemes for the same voltage gains.

2) CURRENT STRESSES
As in all reduced switch count topologies, reducing the active switches of the B9 bridge leads to different current stresses in the inversion stage in the qZS-NSI configuration. This is owed to the middle switches that are shared between the upper and the lower inverter units. Table VII lists the current stresses defined as the peak current through the different semiconductor switches of the qZS-NSI using the analyzed DM schemes. The current stresses are determined as a function of the RMS value of the fundamental components of the output phase currents ( 1 and 2 ), the average value of the inductor current ( ), and the peak-to-peak ripples of the inductor current ( ).
It is crucial to note that the 1L-ST modulation schemes (DM4 and DM2) produce higher current stresses in B9 switches. This is due to achieving the ST state through one leg at a time. However, in the 3L-ST DM schemes, the ST current is divided on the legs. Meanwhile, the current stress on the impedance network's front-end diode is the lowest and the same for all schemes. Fig. 12 shows the upper, middle, and lower switch currents for the first leg of the B9 ( , and ) for the analyzed modulation strategies. As can be seen, the results confirm the analysis of the maximum current through the B9 switches.  10A/div.
10A/div.  Fig. 13 shows the output current and filtered output line voltage waveforms of the qZS-NSI using SB approaches. It can be observed that these results exhibit high-quality sinusoidal output currents and voltages. Moreover, Fig. 14 shows the FFT spectrum of the output line voltage ( ) using the SB approach. It can be seen from Fig. 14 that all schemes have the same fundamental peak voltage, ̂∅ 1 (̂∅ 1 = due to = 1). However, the DM4 scheme has a minimum harmonic component at the dominant frequencies. This result reflects the dc ripple characteristics on the ac-side. Therefore, it can be concluded that the waveforms and FFT spectrum confirm the preliminary analysis and demonstrate the advantage of using the DM4 scheme over the other schemes.

F. OUTPUT VOLTAGE AND CURRENT WAVEFORMS
In MB schemes, some variations in the dc-link voltage envelope can be observed, as shown in Fig. 11. These variations are occurred due to the use of variable magnitude ST periods to boost the supply voltage. As a result of these variations, lower and non-triple odd harmonic components are induced in the FFT spectrum. However, these components are not significant in DM schemes due to the third harmonic injection [22], [28], and their magnitudes in the qZS-NSI still small compared with those at the dominant frequencies.
Moreover, another factor that reduces the effect of these harmonics is that to give the same voltage gains, the MB control methods use higher modulation indexes than the SB schemes, as can be observed from Fig. 8 and Table VI. The utilization of higher modulation indexes reduces all of the harmonic components and, therefore, reduces the effect of these induced harmonics. It is important to note that the filtered output voltage and current waveforms of the MB control approaches are like that of the SB approach for all presented schemes.

F. HARMONIC ANALYSIS
To evaluate the harmonic contents of the qZS-NSI outputs, Table VIII lists the unfiltered output voltage total harmonic distortion (THD) values that are determined for the proposed schemes versus the modulation index. To further strengthen the comparative finding, the table also shows the THD values for the standard NSI with the DM techniques documented in [11] and [12] and implemented here using a sawtooth carrier. Quite expectedly, the MB schemes of the qZS-NSI produce slightly higher THD values compared with the standard NSI and the proposed SB schemes under all the tested conditions. This is owed to the dc-voltage fluctuations at the B9 terminals discussed in the previous subsection. However, the SB and conventional DM schemes produce the same THD for the same operating region.

VII. EXPERIMENTAL RESULTS
An experimental qZS-NSI prototype shown in Fig. 15 is designed and tested in the laboratory to investigate the proposed DM schemes. The low-cost DSP LAUNCHXL-F28379D kit is used to control the inverter switches using the proposed modulation strategies.   A series-connected inductive load of 10Ω and 5mH was connected to each of the inverter terminals. Each three-phase group of the load has its neutral point. The qZS-NSI operation was tested for all the presented 3LST and 1L-ST DM schemes, and the results are shown in Fig. 16-18. In the experimental test, the input dc-supply voltage is set at 50V, and the selected output voltage frequencies are adjusted to 50Hz and 25Hz, respectively, while the modulation indices for both units are set at 0.4. A 2.5kHz sawtooth carrier is selected. The experimental parameters are listed in Table IX. As can be observed from Fig. 16 and 17, the MB approach gives a larger dc-voltage than the SB approach. Moreover, the 1L-ST/DM4 scheme gives lower ripples in the current and voltage waveforms in the dc-side than the other schemes in both SB and MB control approaches. On the other hand, all the presented schemes give sinusoidal output currents, and therefore, the results for the 3L-ST/DM with the SB control approach only is introduced in Fig. 18. Moreover, the voltage waveforms for two output phases from each inverter unit are shown in Fig. 19. Finally, it can be mentioned that the presented theory, concepts, and analysis of the proposed DM schemes of the qZS-NSI and introduced in the analytical sections of this paper are confirmed using the simulation results given in section VI and the experimental work in this section.

VIII. DISCUSSION
This section discusses the performance of the qZS-NSI with the proposed DM schemes. Based on the analysis parts and results sections of this paper, it is clear to say that • The qZS-NSI can perform bucking, boosting, and inversion processes and increase the system reliability due to the utilization of ST states, and it can be used to replace the two-stage NSI with a front-end boost converter for applications where the required voltage gain is up to 2. • As is pointed out here, although many types of PWM schemes are introduced for the NSI, the DM technique reduces the number of commutations, which is translated to lower switching losses. Moreover, using the proposed DM schemes, the effective switching frequency of upper and lower switches of the NSI bridge is reduced by 1/3 than the conventional solution. • Due to the utilization of sawtooth carrier wave in the implementation of the proposed 1L-ST DM schemes, the effective switching frequency of the middle switches are reduced to and therefore, it can be predicted that the switching loss of these schemes will be reduced.
• In practice, the SB control methods required lower passive component values than the MB methods and give better performance in terms of voltage output THD values. Nevertheless, it is essential to recognize that • Even though the presented qZS-NSI topology reduces the number of switch counts by 25% than the conventional twelve-switch with dual three-phase output inverters, it has high and unequally distributed switch current stresses, especially for the proposed 1L-ST schemes. • The voltage stresses on the B9 switches and impedance network capacitors would increase with the boosting factor, lower in the MB control schemes versus SB schemes for the same voltage gains.

VII. CONCLUSION
This paper proposes a family of PWM strategies for the quasi-Z-source dual-output nine-switch inverter (qZS-NSI). This family of PWM strategies is based on the discontinuous modulation (DM) approach, and the main conclusions are listed as follows: 1) The schemes can be used for both CF and DF modes of operation.
2) The presented schemes ensure continuous input current with minimum ripples. 3) Using a leading-end sawtooth carrier-wave in the carrierbased modulation of the proposed scheme reduces the inverter switching frequency. 4) The effective switching frequency of upper and lower switches of qZS-NSI is fixed at 2/3 in all the proposed schemes. This is owed to the nature of DM techniques, which have clamped modulating signals. However, only the 1L-ST DM schemes (DM4 and DM2) ensure the minimum effective switching frequency of the middle. 5) The 1L-ST/DM4 schemes give the minimum ripples on the dc-side of the qZS-NSI.
Moreover, unique carrier-based modulators are suggested for the proposed PWM schemes. Furthermore, a comprehensive study of the presented schemes has been performed. Simulations and experimental work were successfully used to validate the theoretical analysis.