Expandable Non-Isolated Multi-Input Single-Output DC-DC Converter with High Voltage Gain and Zero-Ripple Input Currents

In this paper, an expandable non-isolated multi-input single-output DC-DC high voltage gain converter with the capability of cancelling input current ripples is proposed, which can be applied in photovoltaic (PV) systems. The proposed converter has several advantages including: 1) it provides a single voltage gain for the whole range of duty cycles; 2) the duty cycle’s operating range is not decreased when increasing the number of input stages; 3) it has a simple switching pattern, and all switches go on and off, simultaneously; 4) the current ripple of each input stage is eliminated for the whole range of duty cycles; 5) the output load has a common ground with all input voltage sources; and 6) the voltage stress on switches is low. In this paper, the proposed converter in a dual-input single-output (DISO) form is analyzed at first, and then, its general form with multi-input single-output (MISO) is analyzed. Following that, the voltage gain, voltage and current stresses on switches, diodes and capacitors, and input current ripple cancelling condition are calculated. Finally, experimental results are used to validate the calculated theoretical results.

INDEX TERMS DC-DC power converters, high-voltage gain, input current ripple cancellation, dual input single output (DISO), multi input single output (MISO).

I. INTRODUCTION
In recent years, different types of multi-input single-output (MISO) DC-DC converters are presented for photovoltaic (PV) systems to deliver the required power and regulated voltage. Because the voltage level of PV sources is low, so a step-up DC-DC converter is needed to increase their voltage levels in practical applications. Single-input single-output (SISO) converters are suitable for low power applications in PV off-grid systems. To extract the high power from a PV system, multiple PV sources can be integrated by using only one MISO DC-DC converter instead of using multiple SISO DC-DC converters [1]- [4]. The conventional technique to integrate several PV sources is to connect each PV source separately to a SISO converter with an individual controller, and the output power of each SISO converter is delivered to a DC bus [1]. By using only one MISO converter, the number of components is much decreased; and only one control system is needed to achieve the maximum power point tracking (MPPT) of PV sources, instead of applying several MPPT controllers in the conventional PV system.
In the conventional technique of integration of multiple PV sources, multiple SISO converters can be connected either in parallel or in series at their output ports [1]- [4]. In PV systems, obtaining MPPT on each PV module, which is named as distributed MPPT (DMPPT), is necessary to increase the extracted power from PV. DMPPT may include various PV panel-converter topologies, such as parallel module integrated converters (MICs) topology, cascaded MICs topology, and MISO converters. Although DMPPT can be implemented by the SISO step-up converters, but a MISO converter for implementing DMPPT is a more cost-effective solution [1], [3]. Moreover, to achieve suitable voltage regulation of PVs by MPPT controllers, the converters with zero input current ripples are desired [5].
The structure of the converter in [6] is simple and all ports are connected to a common ground, i.e., input and output ports of the converter share the same ground, which is important for renewable energy conversion units. However, to increase the voltage gain, the duty cycle of the switches must be increased, which leads to the high voltage stress on switches and diodes. The converters in [7] and [8] have low input current ripples, which can improve the life span of the renewable energy sources, and both converters are also connected to a common ground. However, similar to the topology presented in [6], voltage gains of these converters are close to the conventional boost converter.
In [9]- [11], two-input single-output DC-DC converters are presented. These converters are connected to a common ground, except for the converter presented in [9]. All of these DC-DC converters have the low voltage stress on their switches and diodes. The switching pattern of the presented converters in [10]- [11] are interleaved, which leads to the reduced stress on semiconductor elements. However, converters with interleaved switching patterns have different conversion ratios for different ranges of duty cycles, which leads to more complexity of the control system in the whole range of duty cycles.
In [12] and [13], transformer-less multi-input multi-output (MIMO) DC-DC converters are presented. These converters utilize diode-capacitor cells to increase their voltage conversion ratio. They have the merit of low input current ripples. However, these converters suffer from being noncommon grounded. Since these converters do not have transformers in their structure, extra transformers should be used to isolate the ground of DC output loads in practical implementations. However, utilizing several extra transformers to isolate the ground of non-common grounded transformer-less converters will increase the volume, size, losses, parasitic effects, the cost of implemented circuit, and decrease the efficiency. As a result, being common-grounded in multi input converters is a desirable feature, which can lead to lower size, lower cost, higher efficiency converters than non-common grounded converters.
The significant difference between the converters presented in [12] and [13] is that the output ports of the converter in [13] can provide different ranges of voltages, but the output ports of the converter in [12] can only provide a single voltage.
Transformer-based multiport DC converters are presented in [14]- [16]. The modules of the converter presented in [15] can be extended and have multi-output ports. The main drawback of the converter in [15] is its high input current ripples, but the converters in [14] and [16] are isolated with low input current ripples.
To explain the importance and necessity of a non-isolated topology for the proposed converter, the non-isolated converter topology does not have any galvanic isolation between input and output sides, variations on the input side directly affect the output side of the converter. On the other hand, having a separate ground in isolated converters means it does not impose any effect of the input over the output side of the converter, so it can operate on a wide range of inputs and generate a stable output. Safety concern is a common reason to use an isolated converter. Isolation of a converter's input and output ports enhances the safety of consumers on the load side, also prevents short circuit currents on the load side passing through and reaching the source side.
To achieve isolation, isolated converters use transformers in their structures (one transformer for a single-input singleoutput converter, and several transformers for a multi-input multi-output (MIMO) converter), causing a higher volume, higher cost, lower power density and lower efficiency than non-isolated converters; while non-isolated converters don't need such isolation transformers. Another issue is isolated converters require expensive measurement equipment, for example, isolated probes, to measure currents. In an isolated MIMO converter, several isolated probes are needed, which significantly increase the overall cost. Therefore, if the safety of consumers is not a concern, non-isolated converters are good choice for multi-input converters. Isolated converters also persist several significant issues, such as leakage inductance, core saturation, thermal effect, high voltage spikes across the switches, and huge size, which make them costly compared to non-isolated converters.
The proposed multi-input DC-DC converter in this paper is for integrated PV applications with multiple PV sources supplying a high voltage DC bus, where isolating input and output terminals is not necessary. The most important feature for the proposed converter in this paper is to achieve high power density, small size, high efficiency, and low cost. In this case, a non-isolated topology is an ideal choice.
It is recognized in the literature that non-isolated DC-DC converter topologies are more beneficial and feasible options than isolated converter topologies for renewable energy applications, despite certain issues, such as high duty cycle ratio, low voltage gain, and additional circuitry in nonisolated DC-DC converter topologies. To overcome existing technical issues and improve the performance of non-isolated DC-DC converters for renewable energy applications, we have conducted research and proposed the novel multi-input non-isolated DC-DC converter topology in this paper.
DC-DC converters presented in [17]- [19] are three-port coupled-inductor-based converters. These converters have utilized a high number of components and their input ports cannot be extended.
Multiple-input high step-up DC-DC converters can be used in grid-connected PV power generation systems due to the following advantages [1], [3]- [4], [10]- [11], [20]- [21]: 1) In the multi-input converter with N input ports, its component number is lower than a N-input power conversion system utilizing N individual SISO converters. By adding a lower number of components, more input DC ports (PV sources) can be added to the system to achieve the high output power level of DC bus. As a result, the cost is decreased by using multiinput converters with the capability of having extendable input ports. 2) By using the MISO converter, only one control system is needed to achieve the maximum power point tracking (MPPT) of PV sources, while the conventional PV system requires several MPPT controllers. 3) Multi-input converters are capable to supply the load under the condition of turning-off one input port, i.e., when one of the input ports does not deliver the power and is turned off, the other port can still supply the load, which is the feature required in grid-connected PV systems. Although using two SISO converters satisfy this requirement, double number of components and double number of control systems are needed, which results in the decreased efficiency and increased costs. 4) Considering that the extracted voltage of PV sources is low, a step-up DC-DC converter is required to increase the low input voltage level of PV sources (in the range of 10-30 V) to the high voltage level of DC bus (in the range of 380-400 V). Moreover, based on [10]- [11], [21], most of traditional multi-input single-output converters and dual-input singleoutput converters are interleaved multi-phase and two-phase converters.
A multi-phase converter utilizes a higher number of components to achieve the reduced voltage and current stress on switches and diodes than a single-phase converter, and thus, to achieve the improved efficiency. Because when the current and voltage stress on switches is decreased, conduction losses are decreased accordingly, which results in the improved efficiency than the single-phase type. For example, the voltage and current stress on semiconductors for a conventional boost two-phase converter is reduced to only half of that for a conventional single-phase converter by using a double amount of components. The efficiency of the two-phase boost converter is improved compared to the conventional single-phase boost converter.
A multi-phase converter does need a more complicated control system than a single-phase converter due to multiple different voltage gain functions (for example the two phase converters have two different voltage gain functions for duty cycles lower or higher than 0.5). Consequently, in multiphase converters with the increased number of input voltage sources, the number of voltage gain functions also increases, leading to a complicated control system.
In [22], a PV system using two-input DC-DC converter with buck-boost operation has been presented, where a PV panel and an ac line are integrated to supply the load through the two-input DC-DC converter. In this system, when input power from PV panels is not generated at night, the commercial ac line delivers power to the load. As a result, stable output power is available.
For multi-input single-output converters with the ability to add more input renewable energy sources, if the load needs higher power by adding an extra input port that interfaces an extra power source, and by making small changes in the control system, more power can be transferred to the load by using less semiconductor number and occupying less volume. On the other hand, having multi-input renewable energy sources makes the supply of the converter more reliable, which means whenever one of the sources is not generating power or generating less power than normal, the load will be supplied by other sources. In general, multi-input converters have advantages, such as possible to simultaneously use two or more power sources, lower cost due to applying less passive components, smaller size of the converter, and larger power generation because of using several power sources [23]. In Fig. 1 (a), the distributed PV system by using several SISO converters is shown; Fig. 1(b) illustrates the distributed PV system with a MISO converter.
In [24], coupled inductor-based converters with high voltage gain are presented. In [25], a high voltage gain converter based on switched capacitor cell is proposed, it is a three-phase converter with a narrow duty cycle range for achieving its optimum performance, and it has three voltage gain functions which need a complicated control system. Converters in [24] and [25] are SISO converters with high input current ripples, so they are not suitable for PV applications.
The main contribution of this paper is to propose a multiinput single-output high step-up converter with the following advantages: 1) using a MISO converter ( Fig. 1(b)) instead of several SISO converters ( Fig. 1(a)) for integrated PV source applications can decrease the number of components and the size of the converter); 2) input current ripples in input ports are be cancelled for the whole range of duty cycles; 3) comparing to other conventional converters of same type, the proposed converter has the highest voltage gain (to increase the low input voltage of PV sources), and decreased power losses due to less component counts; 4) the proposed converter has low voltage stresses on diodes; 5) it has extendable structure with an extendable number of input ports (which can decrease the system's cost when several PV sources are integrated); 6) the proposed converter has a single voltage gain function for the whole range of the duty cycle D (0< D <1), this feature leads to a simple control system for the output voltage regulation; 7) The proposed converter is common-grounded for all input ports which makes it applicable for integration of several PV sources.
Finally, the accuracy performance of proposed converter is verified by using the theoretical and experimental results.
The paper is organized as follows: In Section II, the structure and operating principles of the proposed multi-input single-output converter are explained for the continuous conduction mode (CCM) and discontinuous conduction mode (DCM), and critical parameters and scenarios (the voltage and current stresses on switches, average currents of switches and inductors, voltage gain, expandable converter analysis, required conditions for cancelling input current ripples, design consideration) are also analyzed and obtained in this section; to clarify the better performance of the proposed circuit, it is compared with other recently reported similar converters in the literature and the comparison results are presented in Section III; To verify the practical operation of the proposed converter, the circuit is implemented in laboratory and the experimental results are reconfirmed by comparing with theoretical results in Section IV; and conclusions are drawn in Section V.

II. OPERATING PRINCIPLES OF THE PROPOSED TWO-INPUT, SINGLE-OUTPUT CONVERTER
The main power circuit of the proposed converter in the form of two-input, single-output and its equivalent circuit by using a transformer model of coupled inductors are shown in Figs. 2(a) and 2(b), respectively. The power circuit of the proposed converter with extendable input module stages are illustrated in Fig. 2(c). In this part, we first study the proposed converter in the form of two-input single-output in this section, then we will expand it to the general form of multi-input single-output in the following section.
In Fig. 2(a), in each input module stage, a coupled inductor is used to increase the voltage gain and eliminate input current ripples. Each coupled inductor has the magnetizing inductor of m L and leakage inductor of k L . The first, second and third winding of each coupled inductor has p n , s n and t n turns, respectively. As a result, the turns ratio of second and third windings of each coupled inductor is considered as / V , respectively. The switching pattern of switches, voltage and current waveforms are shown in Fig. 3. The proposed converter has two switches with the same trigger pulses, and thus, a simple switching pattern is needed.
The proposed converter has two operating modes during a switching period as shown in Fig. 4. The two modes, Mode 1 and Mode 2, are explained in detail below. , are determined as i , are calculated as follows: where the initial currents Step-up DC-DC Converter (b) FIGURE 1. The distributed PV system: (a) using several SISO converters (conventional systems), (b) using a MISO converter.
where the initial currents

A. VOLTAGE GAIN AND VOLTAGES OF CAPACITORS
By considering the voltage balance law for the inductors 2 m L and 1 m L , the average voltages across the inductors during a switching period should be equal to zero as follows: By simplifying (5) and (6), we have

B. VOLTAGE STRESS ON DIODES AND SWITCHES
During Mode 1 ( 0 s t DT   ), the diodes 1 D and 2 D are off, and the voltage stress on diodes are calculated by 1 1 During Mode 2 ( s s DT t T   ), the switches 1 S and 2 S are off, and the voltage stress on switches can be obtained by (11) and (12), the voltage stress on the switches are lower than the high output voltage. 1 18 The voltage stresses on switches and diodes at the switching moment are calculated depending to input voltages using (9)- (12). As a result, the switching voltage of switches and diodes over the three input voltage levels of for 1 As shown in Table IV in Section VI, the parameters for the implemented prototype's power circuit are selected as to achieve the output voltage as 470 , which is applicable to supply the output load of the DC bus as shown in Figure 1. Therefore, the turn ratio used to plot Figure 5 is , the purpose is to provide a theoretical analysis for voltage stress on switches and diodes before choosing suitable switches and diodes for the prototype. In Figure 5, the region between the plotted green curve ( 1 for the duty cycle equal to 0.6 shows the range of voltage stress levels on switches and diodes, which include the experimental operating point.
Using (8) The voltage stresses on switches and diodes at the switching moment versus seven different turn ratios and the duty cycle for the constant input voltage values is illustrated in Figure 6. To plot this figure, the input voltage values are the same as the selected values for experimental implementation ( 1 18 ). In Fig. 6, the turn ratios equal to 1, 1.5, 2, 2.

C. AVERAGE CURRENTS OF SWITCHES
Based on Fig. 4(a), the currents flowing through the first transformer's windings can be written as By applying KCL in the first stage, the current stress on the switch 1 S is calculated by

D. Average Currents of Diodes
conducting. As a result, the current stresses on diodes 1 D and 2 D during Mode 2 can be obtained by Based on Fig. 2(b), the average currents passing through diodes and switches during a switching period are calculated as . These equations are obtained based on that the average currents passing through the capacitors are equal to zero.

E. AVERAGE CURRENTS OF CAPACITORS AND INDUCTORS
At the steady state, the current balance law for capacitors should be verified. Therefore, the average current of the capacitors 1 C and 2 C during a switching period are equal to zero. Therefore, the average current of the capacitors 1 C and 2 C can be written as follows: By simplifying (17)- (18), the average values of the inductors' currents are calculated as: As a result, the maximum and minimum values of currents Consequently, the maximum currents of switches and diodes can be written as By considering that at the steady state, the average currents of the capacitors are equal to zero, the average input current of the first and second stages are calculated by As a result, the switching current crossing through the switches and diodes over the three input voltage levels of Fig. 8. In  Fig. 9.

F. VOLTAGE GAIN OF PROPOSED CONVERTER CONSIDERING EQUIVALENT SERIES RESISTANCE OF COMPONENTS
In this part, equations of the voltages on capacitors and the output voltage of the proposed converter by considering Equivalent Series Resistance (ESR) of all components are calculated. Fig. 10 shows the equivalent circuits of the proposed converter considering ESR of components in the two operating modes during a switching period.
By considering the voltage balance law for the inductors 2 m L and 1 m L , the voltage of the capacitor 1 C V and the output voltage are obtained as follows: 1 1 1 where the parameter F is defined as follows: where the output current can be replaced as / The voltage gain of the proposed converter including ESRs of inductors, diodes and switches can be plotted in Fig. 11. The ESRs of components are 1 Fig. 11, the maximum achievable voltage gains are 39, 55, 70 and 80 for Ro equal to 500 , 1000 , 1500 , and 2000 , respectively. As shown in Figure 11, the duty cycle corresponding to the maximum voltage gains is around 0.8 for different output load values. The maximum achievable voltage gain increases with the increase of the output load. Ref [21] did the similar calculation and plots for voltage gains of the converter.

1) OPERATION MODES
The proposed converter has four operating modes in the discontinuous conduction mode (DCM) operation.
The theoretical waveforms of voltages and currents of the proposed converter in DCM operation are shown in Fig. 12.
In this mode, only the switches, 1 S and 2 S , are conducting, while the diodes, 1 D and 2 D , are off.
Considering Fig.  2(b), we have In this mode, the switches, 1 S and 2 S , are turned off, and the diodes, 1 D and 2 D , are turned on. As a result considering Fig. 2(b), the voltages,   L , the average voltages across the inductors during a switching period should be equal to zero as follows: Consequently, the output voltage under DCM condition is At the steady state, the current balance law for capacitors should be verified. Therefore, the average currents of the inductors are On the other hand, considering waveforms of 1

Lm i and 2
Lm i in Fig. 12, it can be written as follows: To simplify the analysis, the parameters, 1  and 2  , are assumed to be equal 1 Consequently, the voltage conversion ratio ( / o i V V ) for DCM operation can be calculated as follows;

H. DESIGN CONSIDERATIONS
By considering Fig.13 Fig. 13(a) Fig. 13(a), it can be seen that . Consequently, the following inequalities has to be verified to achieve CCM operation of the proposed converter. , are calculated as follows: To obtain a more accurate design for the capacitors, the peak-to-peak value of the output voltage ripple is equal to the sum of the voltage ripple across each output capacitor ( ) , and voltage ripple caused by the ESR of the output capacitor ( ) An important condition in the design of the output capacitor is the hold-up time requirement for the step-load response [9]. Therefore, the minimum values of capacitors 1 i C , 2 i C , 1 C , 2 C are calculated as specified in Table I, which are calculated for their maximum voltage ripples, V r I and are used to verify the inequalities in Table I.

III. OPERATING PRINCIPLES OF THE PROPOSED MULTI-INPUT, SINGLE-OUTPUT CONVERTER
The proposed multi-input converter is achieved by increasing input modules in Fig. 2(b). In the multi-input converter, as it can be seen from Fig. 2(c

A. VOLTAGE GAIN AND VOLTAGES OF CAPACITORS
By considering the voltage balance law for the inductors 1 m L , 2 m L ,…. mN L and 3 N  , the average voltages across the inductors during a switching period should be obtained using (5), (6), and the following equation: The capacitor voltages 1 ) capacitor for the proposed converter with N input modules is calculated by As a result, by increasing input stages of the proposed converter, the voltage gain can be increased. ) is calculated by  By applying KCL in the first stage, the current stress on the switch 1 S during Mode 1 is calculated as (14).

E. AVERAGE CURRENTS OF CAPACITORS AND INDUCTORS
In steady state, the current balance law for the capacitors leads to a zero average current of capacitors The average current of capacitors In Fig. 2(b), the equation for the average currents flowing through the 1,3, 4,..., ( 1) th N  transformers in steady state are written as: The average currents of capacitors are equal to zero in steady state. As a result, the average input currents of first, second, …, ( 1 Considering Fig. 2(b), the average input current of the th N stage is calculated by In the same way, the second coupled inductor in Fig. 2(a) is modelled as shown in Fig. 2(b). The voltages across the first, second and third windings of the first coupled inductor in Fig. 1(a) can be written as follows: The equivalent circuits of the proposed converter in Modes 1 and 2 using the coupled inductor model are shown in Fig. 14.

1) INPUT CURRENT RIPPLE CANCELATION IN THE FIRST STAGE
In Mode 1, the switches, 1 S and 2 S , conduct and the diodes, 1 D and 2 D , are turned off. According to Fig. 14(a), applying the KVL law in voltage loops and the KCL law in current nodes will result in the following equations: where the five parameters, 1  , 2  , 3  , 4  and 5  , are defined as follows: To achieve zero input current ripples at the first stage in Mode 1, the equation 1 1 verified. Considering the parameter 2  and by substituting parameters of the transformer model in (77), it is found that the parameter 2  is equal to zero.
Equ. (75) can then be simplified as follows: As a result, the numerator of the mentioned fraction in (11) should be equal to zero. Then, the parameters in (82) should be equal to zero: (84) Consequently, the third winding turn ratio should be Since the denominator in (82) should not be zero, as a result, 3 4  The required conditions to achieve zero input current ripples in the first stage in Mode 1 are derived as follows: In Mode 2, the switches, 1 S and 2 S , are off and the diodes, 1 D and 2 D , are turned on. In this mode, by applying the KVL and KCL in Fig. 14 (b), we have Considering (1) Equ. (92) can be rewritten by 1 1 The required conditions for cancelling input current ripples at the first stage in Mode 2 can be obtained by solving the equation 1 1 The numerator of the mentioned fraction in (92), should be equal to zero. Then, the parameter 1  in (93) should be equal to zero, so we have On the other hand, the denominator of the written fraction in (93), should not be zero: M , in Fig. 2(a) can be replaced depending on the parameters in Fig. 2(b).
Based on (94) and (95), the required conditions for cancelling input current ripples in Mode 2 are determined as follows:  Table II in Section IV).

2) INPUT CURRENT RIPPLE CANCELATION IN THE SECOND STAGE
During Mode 1, the switches, 1 S and 2 S , are conducting and the diodes, 1 D and 2 D are off. According to Fig. 14 (a), 2 2 0 Ts Ls i i   . As a result, based on Fig. 14 (a), the voltages across the first and third windings of the second coupled inductor are equal to 2 . Accordingly, it can be derived further as follows: Therefore, to achieve zero input current ripples at the second stage in Mode 1, the following equations should be verified:  Fig. 14 (b), the following equations can be obtained: Therefore, the required conditions to achieve zero input current ripples at the second stage during Mode 2 are given as follows: The current ripples in the second stage is eliminated during a switching period for whole range of duty cycles.

IV. ANALYSIS OF THE PROPOSED CONVERTER FOR TWO DUTY CYCLE CONDITIONS (D1>D2 AND D2>D1)
In this section, the theoretical analysis of the proposed converter is conducted under two conditions of duty cycles, D1 and D2: D1>D2 and D1<D2.

A. FIRST CONDITION OF DUTY CYCLES: D1>D2
Under this condition, the proposed converter has three operating modes during a switching period as shown in Fig.  15 (a). Fig. 15(a), this mode starts with turning on the switches, 1 S and 2 S , while the two diodes, 1 D and 2 D , are OFF. Its equivalent circuit of this mode is the same as that shown in Fig. 4(a). The inductor voltages, , respectively. As a result, this mode is the same as the first mode with the duty cycles, D1=D2=D. Fig. 15(a), at the beginning moment of this mode, the switch, 2 S , is turned off, and the diode, 2 D , is turned on; while the switch 1 S is conducting and the diode 1 D is off. Its equivalent circuit of this mode is shown in Fig. 15(b). The inductor voltages, t t t   ]: In Fig. 15(a), at the beginning moment of this mode, the switch, 1 S is turned off, and the diode, 1 D is turned on; while the switch, 2 S , is off, and the diode, 2 D , is conducting. Its equivalent circuit of this mode is the same as the equivalent circuit of the proposed converter for D1=D2=D in the second mode as shown in Fig. 4(b).

Voltage Gain for First Condition of Duty Cycles, D1>D2
By considering the voltage balance law for the inductors 2 m L and 1 m L , the average voltages across the inductors during a switching period should be equal to zero as follows: By simplifying (5) and (6), we have

B. SECOND CONDITION OF DUTY CYCLES: D2>D1
Under this condition, the proposed converter has three operating modes during a switching period as shown in Fig.  16(a). Fig. 16(a), this mode starts with turning on the switches, 1 S and 2 S , while the diodes, 1 D and 2 D , are off. Its equivalent circuit of this mode is the same as that shown in Fig. 4(a). The inductor voltages,  Fig. 16(a), at the beginning moment of this mode, the switch, 1 S , is turned off, and the diode, 1 D , is turned on; while the switch 2 S is conducting and the diode 2 D is OFF. Its equivalent circuit of this mode is shown in Fig. 16(b). The inductor voltages,  Fig. 16(a), at the beginning moment of this mode, the switch, 2 S , is turned off, and the diode, 2 D , is turned on; while the switch, 1 S , is off, and the diode, 1 D , is conducting. Its equivalent circuit of this mode is the same as that of the proposed converter for the condition D1=D2=D as shown in Fig. 4(b). The inductor voltages, , are obtained as

Voltage Gain for Second Condition of Duty Cycles, D2>D1
By considering the voltage balance law for the inductors, 2 m L and 1 m L , the average voltages across the inductors during a switching period should be equal to zero as follows: By simplifying (5) and (6), we have Considering the output voltage equations, (109) and (113), for both duty cycle conditions, D1>D2 and D1<D2, respectively, if the duty cycles D1 and D2 are replaced by D (D1=D2=D) in (109) and (113), the two equations become (8) for the output voltage Vo.

C. SMALL SIGNAL ANALYSIS AND CONTROL SYSTEM FOR THE PROPOSED CONVERTER
According to the equivalent circuits of the proposed converter in Figs. 4(a), 4(b), 15(b) and 16(b), it is assumed that the inductor currents, 1

C2. Second Condition of Duty
(1 ) The small signal equation of the output voltage can be written by To generate the drive signals for S1 and S2 in Fig. 17, the PWM technique is used, and D1 and D2 are compared with the sawtooth wave Vt. When D1 is higher than Vt, S1 is in onstate; when D2 is larger than Vt, S2 is in on-state.
In the first stage, the transfer function of the output voltage over the duty cycle (G1), the open-loop transfer function (TO1 =Gc1*G1), the closed-loop transfer function (T1=feedback(Gc1*G1)) considering the selected parameters in Table IV for the experimental implemented prototype of the proposed converter are calculated as given in APENDIX.
In the second stage, the transfer function of the output voltage over the duty cycle (G2), the open-loop transfer function of (TO2 = Gc2*G2) and the closed-loop transfer function (T2=feedback(Gc2*G2)) considering the parameters in Table IV are calculated as APENDIX as well.
As a result, the bode diagrams of the open-loop transfer functions with the PI voltage controller based on the control of each of the two duty cycles 1 D and 2 D are obtained as shown in Fig. 18(a) and 18(b), respectively. From Fig. 18 are both greater than 0. Therefore, the closed-loop system of the proposed converter, which adopts the PI voltage controllers, can operate stably. The poles of the closed loop transfer function were calculated previously and they were located in the left half of the plane.  Table II   . The proposed converter is compared with the three step-up converters presented in [10], [11] and [21], because all converters have two input ports, single output port and are common-grounded.

V. PERFORMANCE COMPARISON
By considering specifications of the converters in Table II, Fig. 19 is plotted. To plot Fig. 19, the turns ratio of the coupled inductors in the proposed converter and the existing converter in [21] is considered as 1 Where, the ratio of / o i V V for the presented dual input converters is obtained by considering Fig.   19(a) shows that the proposed converter has higher ratio of / o i V V comparing to existing converters in [10], [11] and [21]. Both the proposed converter and the converter in [21] used two three-winding coupled inductors to increase the voltage gain, and eliminate input current ripples, but the proposed converter, not only has higher voltage gain than the converter in [21], but also, uses lower components number than the presented converter in [21]. It is proved that the proposed converter has the capability to operate in a wider duty cycle range (0 1) D   than the converters in [10], [11] and [21], which has been operated only for duty cycles higher than 0.5 (0.5 < D <1).
In the proposed converter and the existing converter in [21], the input currents ripples are thoroughly eliminated for the whole range of duty cycles (0 1) D   . However, for the conventional converters in [10] and [11], the input current ripples are eliminated only for the duty cycle D=0.5. The converters in [10], [11] and [21] are interleaved converters and have two-phase switching pattern. Interleaving causes the converter to have two or even more numbers of conversion ratio functions, which may lead to a complicated control scheme for these converters. However, the proposed converter can provide a single voltage gain function for the whole range of duty cycle, which makes the output voltage regulation controller much simpler than the converters in [10], [11] and [21]. In Table II Considering Fig. 19(b), the ratio of ( / ) / o i T V V N for the proposed converter is higher than that for the converters in [10], [11] and [21]. Fig. 19(c) shows the normalized voltage stress on switches for the compared converters, in which the proposed converter has a lower value than the converters in [10] and [11], and a higher value than the converter in [21]. Similarly, Fig. 19(d) shows the normalized voltage stress on diodes, the proposed converter has a lowest stress on its diodes compared to the converters in [10], [11] and [21]. Considering Figs. 19(e) and 18(f), the maximum normalized current stress on switches and diodes for the proposed converter (PC) are lower than that for the converters in [10], [11] and [21].
By using the theoretical analysis of the proposed converter and the three existing converters in [10], [11], and [21], Figure 19(g) is obtained, which shows the maximum voltage gain achieved considering the ESR of components under the condition with for the four converters. The converters in [21], [10] and [11] are calculated for the duty cycle ranging from 0.5 to 1. The theoretical results are compared with experimental results. Since in the real life applications, the converter typically operates in the duty cycle from 0.1 to 0.9, Figure 19(g) is plotted for this duty cycle range. In Fig. 19(g), the maximum achievable voltage gain for the proposed converter is close to 39, which is obtained at the duty cycle of 0.8. On the other hand, the maximum voltage gain is 40 in [21], close to 20 in [10] and 18 in [11], all under a duty cycle of 0.9. The voltage gain of DC boost converters will be increased with an increased duty cycle. Consequently, the proposed converter has achieved the maximum voltage gain among the four converters. Moreover, the voltage gain considering ideal components for a constant duty cycle of 0.6 is obtained as illustrated in the third column of Table II. It shows the proposed converter has the highest voltage gain for this constant duty cycle. The proposed converter and existing converters reported in [10], [11] and [21] have extendable structures to multi-input single-output converters. These existing converters use the multi-phase switching pattern for multi-input structures (for example for a two-input converter, the switching pattern involves two phases; and for a four-input converter, the switching pattern involves four phases), which decreases a suitable operating region for the converters (for example, in two-phase structures, the suitable operating region is obtained for the duty cycles higher than 0.5; and in four-phase structures, the suitable operating region is obtained for the duty cycles higher than 0.75).
When the number of input voltage sources increases, the suitable operation region is further limited and the control system becomes more complicated for these existing converters.
However, in the proposed converter, the switching pattern for the extendable structure with several input voltage sources is in the same way as the two-input converter by using the same switch operation with the same turning on and off moments, which result in a simple control system. Also, the multi-input structure of the proposed converter has just one voltage gain function for the whole range of duty cycles (0 < D <1), which leads to a simple control system as well.
The cost benefits of the proposed DC-DC converter (PC) can be analyzed from the four aspects: 1) the total cost of implementation of power circuits and driver modules; 2) the provided power of each converter; 3) the ratio of the total cost per watt; and 4) the extracted efficiency for the operating power rating, which can be seen in Table III. As shown in Fig. 20, the proposed converter has a lower value of the Cost per Watt [$/W], which demonstrates that the proposed converter is able to provide a higher power with lower costs. Considering the efficiency range from column 11 of Table III and the operating power rating in the column 13 of Table III, the proposed converter has the highest power and efficiency comparing to other three selected converters. Fig. 21 shows the comparison results of the efficiency of the implemented circuits versus the output power value for the proposed converter and converters presented in [10], [11] and [21].
From column 9 of Table III, it can be seen that the total cost of the proposed converter is equal to $78.37$, which is lower than the total cost of all other three conventional converters in [10], [11] and [21] (129$, 110.5$, 99.63$). The efficiency of the proposed converter for 450 W output power is 93.5%, which is the highest value for such output power among other converters (91.3%, 91%, 92.1%). The costbenefit plot of the proposed converter is shown in Fig. 20.
The proposed converter has the highest output power, the lowest total cost of implementation, the minimum Cost per Watt [$/W] ratio comparing to three other conventional converters in [10], [11], [21]. Note: in Fig. 20, the Cost per Watt [$/W] values of the converters are multiplied by 100, so they can be noticeable in the graph.
The last column of Table III shows the maximum extracted voltage gains for the chosen duty cycles for the proposed converter's prototype of this paper and prototypes of the three existing converters in [10], [11] and [21] through lab experiments. It is found that the proposed converter's prototype has achieved the highest voltage gain of 15.66 for the duty cycle of 0.6; while the extracted voltage gain from the implemented prototypes of the converters in [10], [11], [21] are 9.75, 4.85, 11.2 for the duty cycles equal to 0.75, 0.6, 0.6, respectively.

VI. EXPERIMENTAL RESULTS
To verify the calculated theoretical results for the proposed converter, a prototype of the converter has been built and its parameters are provided in Table IV. The experimental results using the prototype were measured as shown in Figs. 22 and 23. The calculated values of voltages and currents from the theoretical analysis by using the parameters in Table IV are given in Table V. By a simple comparison, the calculated theoretical values in Table V are  ). Moreover, in the fifth and sixth rows of Table V, the calculated values of voltage stress on diodes from (9) and (10)  ). The average output current based on parameters in Table  IV  , respectively, which are very close to the calculated theoretical results. Fig. 23(a) also shows that the input current ripples are almost equal to zero with a constant dc value.
The average currents through the magnetizing inductances of the coupled inductors are calculated as 1  In Fig. 23(a), the input current ripples of the proposed converter is equal to zero. The measured current waveforms for the switches and diodes of the prototype demonstrate that the mean value of the experimental current waveforms in Fig. 23 can easily verify the calculated values in Table V. The measured efficiency using the parameters of the implemented prototype from Table IV is equal to 93.5% for the extracted power of 450 W. The experimental efficiency of the proposed converter vs. various output power Po (Po is equal to 150 W, 250 W, 350 W, and 450 W) are obtained as shown in Fig. 24. The experimental prototype of the proposed converter is shown in Fig. 25.   Therefore, the extracted controller block with the specified PI parameters as equations (123) and (124) are applied to generate the required codes of the pulses of switches S1 and S2 to be interfaced with Lunchpad C2000 280049C. As a result, the generated pulses S1 and S2 from Lunchpad 280049C are applied as gate-source trigger pulses of switches.