Effect of Current Distortion and Unbalanced Loads on Semiconductors Reliability

This article presents a reliability analysis of a 4-wire grid-tied inverter under different loading conditions, considering unbalanced loads and harmonic distortion in the current consumed. The proposed power converter is used as a case study to assess the impact of current disturbances on the semiconductors’ reliability. The 4-wire inverter analyzed is implemented with a 3-leg SiC MOSFET power module and a neutral wire connected to the midpoint of the DC-link. The analysis is founded on the reliability curves for power switches provided by the literature. As key take-home findings, the addition of harmonic content in the load current plays a dominant role in the semiconductors’ expected lifetime, especially for the low-frequency harmonics, e.g., third harmonic. Furthermore, the phase delay of the harmonic current content is revealed as a critical factor in the semiconductor’s reliability. Additionally, the existence of unbalanced loads substantially modifies the reliability of the semiconductors of the inverter. The results confirm that converters’ reliability is highly dependent on the loading conditions and harmonic content, so identifying the most critical conditions is inevitable.


I. INTRODUCTION
The reliability of grid-tied converters has been extensively studied in the past years. Multiple analyses can be found in the literature. However, such analyses have often been performed only for ideal operating conditions without regard to possible disturbances to these systems. For example, the presence of low-frequency harmonic distortion in the grid voltage may lead the converters connected to it to operate with a distorted current. The presence of harmonics can change the shape of the current and, thus, the inverter's thermal load, which, if not taken into account, can affect the expected lifetime of the equipment [1].
This paper analyzes the effect on the semiconductors' reliability of unbalanced and harmonic distorted currents for a 4-wire inverter. The obtained results can be extrapolated to any kind of equipment that operates under these conditions such as, 4-wire inverters for isolated microgrids [2], threephase power factor correction (PFC) rectifiers [3], uninterruptable power supplies (UPS) [4], active filters [5], or inverters for drives and EV traction systems [6].
The increasing use of microgrids and isolated grids leads to systems that inherently operate under these conditions [7]- [9]. In a microgrid, the presence of nonlinear loads, i.e., with high current THD, and single-phase type, can be high. Consequently, converters operating as power sources for these microgrids, [10]- [12], need to work reliably with these types of loads, and their estimated operating lifetime must consider them. The same considerations apply to UPS systems as portrayed in [4].
Typically, PFC rectifiers consume unbalanced currents when connected to unbalanced grids [13]. As pointed out in [14], this is also a common situation for AC/DC grid-tied inverters with a dq0-based control.
Finally, active filters are typically used to balance the current consumed from the grid and, at the same time, eliminate the current harmonic content [15]- [18]. Consequently, its current usually is unbalanced between phases and presents a high harmonic distortion.
As it has been exposed, these operating conditions are not uncommon and shall be taken into account. However, the effect of these disturbances has generally been overlooked in the literature, and few examples are reported. In [19], the authors analyze the impact of reactive power injection on PV inverters' reliability. In [20], the effect of grid voltage unbalances on the reliability of adjustable speed drives is studied. However, only the capacitors' reliability is analyzed.
In [21] and [22], the authors analyze single-phase transformerless PV inverters' reliability. In [23], the authors propose an optimized design method for transformerless PV inverters considering its reliability. In all the cases, the analyses are performed considering a null THD. Therefore, the possibility of operating with a current with harmonic content is not considered.
Reducing the harmonic content and current unbalances in motor control algorithms is a hot topic in the literature [24]- [28]. However, most of the solutions proposed are complex. Usually, the inverters used for motor control applications do not include these features. Therefore, it is interesting to analyze the effect of the disturbances on reliability. In [29], the semiconductor reliability for a three-phase inverter used in a wind turbine is analyzed. By the nature of the study, the presence of unbalanced loads is unlikely. However, the presence of low-frequency harmonics in the current cannot be ruled out. Due to AC machines' manufacturing limitations, the back electromotive force (EMF) is not purely sinusoidal and has harmonic content [30]. Consequently, it is likely to have a harmonic distortion in the currents [31]. Its effect may be relevant for the semiconductors' reliability, and it has not been considered. Finally, [32] presents a three-phase inverter reliability analysis for more electric aircraft. An airplane can be regarded as a microgrid. Therefore, as mentioned previously, it can have single-phase and nonlinear loads, which increase the current imbalances in the inverter and the harmonic current content. Again, the effect that such disturbances may have on semiconductors' reliability has not been considered.
In [33], the authors analyze the IGBTs' reliability of an active filter. However, it does not take into account the phase delay of the harmonics compensated. As it is proved in our paper, this is a critical point in the semiconductors' reliability.
It is critical to analyze the effect of imbalances and harmonic current distortion on semiconductors' reliability for all the reasons mentioned above. This paper proposes a comparative methodology to establish the impact on the semiconductors' reliability of current imbalances and harmonic content. In [34], the authors present a similar analysis to assess the effect of different modulation strategies on semiconductors' reliability. The authors use a power converter as a case study and, with the help of established lifetime models, assess the variation in reliability with different modulation strategies.
Both disturbances are analyzed separately, considering different cases. The reliability values for each case are compared against a base case. The results show that unbalanced loads reduce the semiconductors' reliability if some phases are overloaded. Furthermore, the harmonic content is proved to be a stress factor that can substantially reduce the semiconductors' reliability. Additionally, the phase delay of the harmonic is confirmed to play an extremely relevant role in the semiconductors' reliability.
The paper is organized as follows. First, a brief description of the 4-wire inverter is done. Next, the different operation cases analyzed in the paper are presented. The reliability models used for the comparative analysis are presented, and the results obtained are discussed. Next, the cases with harmonic content are analyzed in-depth to understand the differences among the cases. Finally, conclusions are drawn. Fig. 1 shows a simplified diagram of the 4-wire inverter analyzed. The inverter is supplied by an adjustable DC voltage source providing between 680 V and 800 V. The inverter itself consists of a three-branch module of SiC MOSFETs (Wolfspeed CCS050M12CM2 [35]). The DC-link is split into two half-buses. Like this, the midpoint can be accessed to connect the neutral line and easily implement a 4-wire system. The DC-link is composed of two capacitors (EPCOS B43564A6278M000 [36]). The capacitors' reliability is not under this paper's scope and is analyzed separately in another paper [37].

II. HARDWARE DESCRIPTION
The outputs of the semiconductors are connected to an output filter implemented with three inductors. Each phase's current is independently controlled using Fractional Proportional Resonant (FPR) controllers [38]. Fig. 2 shows the inverter with open sides so that the internal elements can be seen. On the left, the three inductors of the output filter can be seen. Next to them is the lower half-bus capacitor. The SiC power module is mounted on a heatsink with forced convection. The fan is mounted under the heatsink and includes an air inlet. Finally, on the right-hand side is mounted the upper half-bus capacitor. For the current application, the converter is mounted rotated 90 degrees on the X-axis shown in Fig. 2. The converter is completely closed on the sides for the platform analyzed, and only an air outlet is left on the left-hand side to let out the hot air. Table I summarizes the main parameters of the power converter.   The converter is mounted on a large cabinet with other elements, such as the DC power supply, a low-frequency isolation transformer for the DC power supply, and the necessary switchgear to connect the inverter to the AC grid and the control boards. Because of its size and multiple elements, the cabinet can be modeled as an environment with a constant temperature since its thermal inertia is substantial. For this paper, the cabinet temperature is assumed to be a constant value of 25 °C.

III. WORKING CASES
The effect of current imbalances and harmonic distortion is analyzed separately. The obtained results are compared with a base case to get a good picture of the reliability variation.
The base case selected is the operation of the power converter with a three-phase balanced load and each phase with the nominal active power. Therefore, the active power (Pbase) is 18 kW.
Three different cases are analyzed to assess the reliability variation with unbalanced loads. In all of them, one of the phases is operated with 0 current. The other two phases are operated with the following current and total output power a) Iph and 0.66Pbase b) 1.05Iph and 0.7Pbase c) 1.20Iph and 0.8Pbase For cases b and c, the converter is operated with a slight current overload in two phases.
Last, four different cases are analyzed to assess the reliability variation with loads with harmonic distortion. The three phases are operated with the nominal balanced current at the fundamental frequency ( f ). A 30% content of the third harmonic is added in each phase.
a) Iph at f and 0.3Iph at 3f with phase delay 0 rad. b) Iph at f and 0.3Iph at 3f with phase delay π/2 rad. c) Iph at f and 0.3Iph at 3f with phase delay π rad. d) Iph at f and 0.3Iph at 3f with phase delay 3π/2 rad.
The harmonic distortion added is limited to the third harmonic. As analyzed in [1], the low-frequency harmonics have a higher impact on the semiconductors' thermal load and, consequently, a higher impact on the reliability [39].
The currents and power for all the cases are summarized in Table II.
All the cases analyzed are not realistic operation profiles for a power converter. Nevertheless, they are helpful in the analysis of the reliability variation.

A. SIMULATION MODEL
Simulations are performed with a power electronics simulation software to determine Tjm and ΔTj for each of the scenarios. The power electronics simulation software integrates into one simulation, the electrical simulation, including the control implemented in discrete-time and the thermal simulation.
The models provided by the manufacturer on their website [40] are used to implement the thermal simulation. The models include look-up tables to determine both switching and conduction losses. The turn-on and turn-off energies are provided at different currents, voltages, and temperatures. The gate resistance is taken into account for the calculation of the switching losses as well. The voltage drop on the MOSFET is  Cauer thermal network also provided for different currents and temperatures to calculate the conduction losses. Additionally, the model includes a thermal network of the module. The radiator with forced convection [41] used has been simplified as a thermal resistance, Rheatsink, 0.103 K·W -1 , and a thermal capacitance, Cheatsink, 1.67 kJ·K -1 . Fig. 3 shows the resulting thermal network. As stated previously, for all the cases analyzed, the ambient temperature (Tamb) was set at 25 °C.
The software calculates the losses by interpolating from the temperature, current, and operating voltage. Fig. 4 shows the response of the power converter for an output current (Iout) setpoint of 15.6 ARMS at 50 Hz, 5.2 ARMS at 150 Hz, and 5.2 ARMS at 250 Hz, marked in blue. In orange is shown the output current calculated with the simulations, and in yellow is shown the output current measured in the experimental setup. The output current is sampled at the converter's switching frequency, fsw, 30 kHz. For the sake of clarity, only one phase is measured.
The inverter analyzed is a piece of commercial equipment designed bearing in mind its compactness. Consequently, the gate drivers are placed on top of the power module, making it impossible to access the semiconductors to measure their temperature directly. Therefore, it is not possible to validate the simulation results with experimental measurements. Nevertheless, as pointed out before, the goal is to compare different cases without obtaining exact reliability values. Consequently, the simulation results are sufficient for the current analysis.
The simulation results are summarized in Table III. For each case is provided the heatsink temperature (Th), the average junction temperature (Tjm), the junction temperature swing (ΔTj), and the bond wire current (IB) of each MOSFET and their estimated number of cycles to failure (Nf). The MOSFET's labeling is depicted in Fig. 1.
For the unbalanced load cases (2a-2c), the load current on phase c is null. Despite this, the MOSFETs switch, and their currents are not null due to the current ripple at the highfrequency switching. Fig. 5 shows the heatsink temperature (Th) measured in the experimental setup, in blue, with the power converter operating in case 1 conditions. And the heatsink temperature calculated with the simulations, in orange. The simulation results match the dynamic response of the experimental setup closely. Moreover, the steady-state experimental heatsink temperature, 45,78 °C, matches the temperature simulation results closely, Table III.

B. LIFETIME MODEL
For the inverter analyzed, a power module based on SiC MOSFETs is used. From the analyses performed by different authors, [42]- [47], it is clear that the number of cycles to   Table II   failure, Nf, is closely related to the average junction temperature, Tjm, and the junction temperature swing, ΔTj. Considering this, we propose to calculate the Nf value with the CIPS2008 model [48]. The CIPS2008 model is based on the model obtained from the LESIT project [49]. The CIPS2008 model calculates Nf based on the average semiconductor temperature (Tjm) and the temperature swing in a period (ΔTj). Additionally, it considers other parameters such as the power-on-time (ton), the current for each bond wire (IB), the voltage class of the chip (VC), and the diameter of the bond wires (DB). The different parameters' effect is adjusted with experimental constants (A and β1-β6). The calculation of the number of cycles to failure is expressed as The authors of the CIPS2008 model developed it as a lifetime model for power modules. Therefore, Nf is calculated considering the typical failure mechanisms for power modules, such as bond wire liftoff and thermal fatigue of solder joints, [49], which are still present in a SiC MOSFET power module. Consequently, it is suitable for our analysis.
The constants of a lifetime model (A and β1-β6) shall be adjusted for every power module. When it comes to a comparative analysis, identifying the model parameters is not crucial. The constants contain the semiconductors' technologic factor, which is irrelevant to performing comparisons among different cases. This paper's scope is to get a series of comparable results to assess the importance of current disturbances in semiconductors' reliability. The interest is not in the exact Nf value for each case, but Nf's variations depending on the case analyzed. The same approach is followed in other comparative reliability analyses [33], [34].
The parameters used in (1) are summarized in Table IV and were extracted from [50], or they can be obtained from the manufacturer's datasheet [35]. The diameter of the bond wires was obtained by performing direct microscopic measurements on a module. The number of bond wires in parallel is three. For the case under study, ton is 10 ms. It corresponds to half period of the grid. For the four cases analyzed, the ton, VC, and DB parameters are constant. IB is dependant on the case and phase analyzed. The MOSFET RMS current for each case is determined with the help of simulations.
The semiconductors module includes a freewheeling SiC Schottky diode [51] in parallel with the MOSFETs' body diode. This diode is usually no longer included because the body diode provides a good enough switching performance.
Additionally, the MOSFETs can drive current in both directions. In the studied module, when the current flows from source to drain, it is shared between the MOSFET, the body diode, and the external freewheeling diode. Therefore, the current flowing through the freewheeling diode is low, and consequently, its thermal load is low [1]. Notably, the temperature swing, ΔTj, is low. From (1), it can be deduced that a low ΔTj leads to an unrealistic Nf estimation, for this reason, these diodes are excluded from the study.
It is worth noting that, according to (1), we expect a decrease in the number of cycles to failure with Tjm, which increases with Tamb. However, in this paper, the ambient temperature was held constant.

V. DISCUSSION
A reliability block diagram (RBD) has been chosen to model the system-level reliability. This approach is the most appropriate since the system does not have redundancies [52]. Failure of a single semiconductor would cause a system failure. Fig. 6 shows the RBD used for the reliability analysis.
The system reliability function (Rsys) can be determined from the MOSFETs reliability function (RQi) as A computational software was used to implement Monte Carlo simulations to obtain the reliability functions of each MOSFET considering variability in the parameters of (1). One hundred thousand simulations have been performed for each case to obtain the probabilistic distribution of the estimated lifetime (Nf) of each MOSFET.
Typically, semiconductors fail because of wearout mechanisms. Mostly, bond wire liftoff or substrate delamination, which are accelerated over time [39].
Consequently, it has been considered that the probabilistic distributions follow a two-parameter Weibull distribution. Therefore, their probability density function (pdf) can be expressed as being η the scale parameter and β the shape parameter of the Weibull distribution. It has been considered for (1) that the parameters A, ΔTj, β1, β2, β4, and Tjm follow a normal distribution with the mean value (μ) described in Table III and Table IV and a standard deviation (σ) such that 3σ is equivalent to 5 % of the average value.
From the pdf, the reliability function (R(t)) can be obtained from the cumulative distribution function (cdf) (F(t)), leaving the expression as  The results shown in Table V already offer some interesting results. The scale parameter (η) for the different MOSFETs is similar except for the MOSFETs with a 0 load current, cases 2a to 2c. Nevertheless, the addition of harmonic content can reduce it by more than 40%, case 3d. Moreover, the unbalanced operation can reduce it even further, more than 60%, case 2c.
With these values, the reliability curves have been obtained. Fig. 7 shows a comparison of the power converter reliability with unbalanced loads. Fig. 8 shows a comparison of the power converter reliability with distorted harmonic loads.  From Fig. 7 and Table VI, we can conclude that unbalanced loads affect the system's reliability. If the legs' current does not exceed the nominal value, 2a, the reliability is increased. However, if the phase current is increased to partially compensate for the power reduction, 2b, and 2c, the reliability can rapidly decrease. For case 2b, we can see that despite the total output power being only 70% of the nominal power, the B10 value is almost the same as the base case. For case 2c, with a total output power of 80% of the nominal power, the B10 value has substantially decreased by almost 60%.
From Fig. 8 and Table VI, we can conclude that harmonic distortion can also reduce the system's reliability. Case 3d has a B10 value almost 50% smaller than the base case. On the contrary, case 3c shows similar reliability. It can be seen that the phase delay of the harmonic current plays a highly relevant role. Therefore, harmonic distortion has to be analyzed carefully and cannot be limited to the RMS value. The shape of the current is relevant.
Consequently, for power converters used in applications prone to the appearance of these disturbances, microgrids [7], [8], [10]- [12], PFCs [13], [14] or active filters [15]- [18], the reliability analysis has to take into account the appearance of these disturbances. Omitting them from the analysis can lead to wrong estimations of the system's reliability.

VI. HARMONIC DISTORTION ANALYSIS
The results obtained for the cases with harmonic distortion, 3a to 3d, are counter-intuitive. One could expect to get a more   Table II  significant reliability reduction with the cases with a higher peak current. However, it is not like this. Fig. 9 shows the output currents for cases 1 and cases 3a to 3d. As it can be seen, the larger peak current corresponds to case 3a; however, the reliability reduction is higher for case 3d, which has a lower peak current. Additionally, cases 3b and 3d have the same peak current but highly different B10 values.
The results in Table III help to explain the significant differences. Among cases 1 and 3a to 3d, the only parameters of (1) that change are Tjm, ΔTj, and IB.
The parameter that is causing the most significant Nf variations is ΔTj. The variation of Tjm is always lower than 4%, and the effect on the exponential term of (1) is low, less than 3%. The maximum ΔTj variation is a 13.5% increase between case 1 and case 3d, and the parameter β1 is substantially bigger than the other exponential coefficients (β3 to β6). Consequently, the main drive for the Nf variation is ΔTj.
Consequently, the ΔTj variation caused by the harmonic content addition is the root of the reliability variation. Fig. 10 shows the junction temperature of the MOSFETs for cases 1 and 3a to 3d. As expected from the values shown in Table III, the mean junction temperature is similar in all the cases, but the temperature swing varies. Fig. 11 summarizes the procedure followed to analyze the difference in the temperature swing among the different cases. First, with the help of a power electronics simulation software, the MOSFET power losses are calculated. Next, with the help of a computational software, the power losses are low-pass filtered to eliminate the components at frequencies equal or greater than the switching frequency. Using the Fourier transform, the power losses are decomposed into fundamental (50 Hz) and its harmonics. Finally, with each harmonic's magnitude (αk) and argument (ϕk), the effect in ΔTj amplitude and shape of the MOSFET thermal network is analyzed.  Table II Fig. 12 shows the filtered power losses for cases 1 and 3a to 3d. Fig. 13 shows each harmonic's magnitude. The power losses at frequencies greater than 0 Hz are the ones contributing to the temperature swing.
These two figures provide relevant information. First, it can be seen that, as expected, case 3a shows a higher peak in the power losses than the other cases. The power losses at frequencies greater than 0 Hz are the highest among all the cases. Despite this, the temperature swing is not the biggest.
Additionally, the power losses between cases 3b and 3d are similar in shape. Furthermore, their Fourier decompositions have similar magnitude (αk) values, as shown in Fig. 13. Nevertheless, their temperature swing and reliability differ substantially.
The key point is the thermal network's frequency response and its interaction with the power losses argument (ϕk) for each harmonic. Fig. 14 shows the MOSFET's thermal network bode diagram. The transfer function of the thermal network is a complex equation that can be calculated following the detailed approach proposed in [53], being Ci and Ri the thermal capacitance and resistance of the different layers, see Fig. 3.
With the thermal network gain (Gk) and phase (φk) for each harmonic obtained from Fig. 14 together with the power losses Fourier decomposition coefficients (αk, ϕk), it is possible to calculate the temperature swing as the superposition of multiple sinusoidal waveforms, ∆ ( ) = ∑ · · cos(2 k + + ) .
Fig . 15 shows the ΔTj calculated with this methodology for cases 3b and 3d. As it can be seen, it matches the simulation results as expected. It confirms that 2 cases with similar power dissipation in absolute values can have different temperature FIGURE 14. MOSFET thermal network bode diagram. FIGURE 15. MOSFET junction temperature for cases 3b and 3d, calculated following the methodology proposed in Fig. 11. Refer to Table  II   swings. The phase delay of the harmonic decomposition is crucial regarding the junction temperature swing.

VII. CONCLUSIONS
This paper proposes a comparative methodology to assess the impact of current imbalances and harmonic distortion on the semiconductor's reliability. The analysis has been done using a three-phase four-wire inverter. Still, the results can be extrapolated to other topologies.
In the paper, we have proved that the presence of unbalanced loads substantially distorts the reliability of the semiconductors, especially if some phases are overloaded to compensate for the loss of power in other phases.
The paper demonstrates that overloading more than 5 % two phases while the third one operates with 0 current is harmful to the semiconductor's reliability. A 20 % overload in two phases with the third phase operating with 0 current implies a 57 % reduction in reliability compared with a balanced load.
Furthermore, we proved that harmonic content in the load current substantially decreases the semiconductor's reliability.
A 30% of third harmonic content in the load current can reduce the semiconductor's reliability to half compared with a load without harmonic content.
Finally, the analysis shows that the harmonic content's phase delay is crucial in determining the semiconductor's reliability. Cases 3b and 3d have the same harmonic content but different phase delays, π/2 and 3π/2. Both cases show similar peak current and similar power losses in magnitude. However, the different shape in the MOSFET power losses results in a different junction temperature swing and a substantially different semiconductor's reliability. Case 3d shows a B10 value 40 % lower than case 3b.
For all the reasons mentioned above, the reliability analyses of power converters for microgrids, PFCs, UPS, or active filters should not overlook these disturbances. FRANCESCO IANNUZZO (M'04-SM'12) is currently a professor at the Aalborg University, Denmark, where he is also part of CORPE (Center of Reliable Power Electronics). His research interests are in the field of reliability of power devices, including mission-profile-based life estimation, condition monitoring, failure modeling, and testing up to MW-scale modules under extreme conditions, like overvoltage, overcurrent, overtemperature, and short circuit. He is the author or co-author of +250 publications on journals and international conferences, three book chapters, and four patents. He has edited the recently-published Modern power electronic devices: physics, applications, and reliability book. Besides publication activity, over the past years, he has been invited for several technical seminars about reliability at first conferences as ISPSD, EPE, ECCE, PCIM, and APEC. Prof. Iannuzzo is the founder of the newborn Power Electronic Devices and Components journal with Elsevier and serves as Associate Editor for the IEEE Transactions on Industry Applications, the IEEE Journal of Emerging and Selected Topics in Power Electronics, and Elsevier Microelectronics Reliability. He is the vice-president of the IEEE IAS Power Electronic Devices and Components Committee. He was the general chair of ESREF 2018, the 29th European Symposium on Reliability of Electron Devices, Failure physics, and analysis, and has been appointed EPE-ECCE Europe General Chair in 2023.