Synthesis of Reversible and Quantum Circuit using ROCBDD and Mixed-Polarity Toffoli Gate

In the last decade, the synthesis of reversible logic circuits has become a trending topic because of its future necessity and importance. Many methods have been studied and proposed, for instance, transformation-based, search-based, cycle-based, ESOP-based and BDD-based methods. Each of them has its limitation related to time processing, ancilla and garbage line, quantum cost. This study develops an algorithm that could synthesize quantum circuits based on mixed-polarity Toffoli gate and a variant of binary decision diagram (BDD) called reduced-ordered-complemented edge-bdd (ROCBDD). It is an optimized method of BDD to reduce nodes in the representation of Boolean functions, which leads to adding more lines and quantum gates in the reversible circuit. First, the differences between synthesis using ROCBDD, the traditional BDD and others methods are introduced. Then, we define a new structure consisting of mixed-polarity Toffoli gates relied on nodes of ROCBDD. An efficient algorithm to match BDD representation to the reversible logic circuit is also mentioned. Finally, the experimental results show that our algorithm has better synthesizing costs than previous BDD-based methods.


I. INTRODUCTION
Many studies about the application of quantum logic circuits [1]- [3] have been introduced and proved ever before. Two main problems solved by quantum logic circuits are reducing circuit power consumption and increasing the density of transistors in an area of layout circuit. In [1], [4], the authors show that the power consumption of a calculation using qubit can be less than KTln2 -which is the least power consumption of the same calculation using a traditional bit. In the definition of the quantum equation, a qubit can express many states simultaneously, which leads to calculations being conducted simultaneously. It solves processing time and resources problems. Its application in many domains is also introduced, like DNA computing [1], optical computing [5], nanotechnology [6] and quantum computing [7]. However, almost all algorithms used to synthesize irreversible traditional logic cannot be carried on to synthesis reversible logic due to two issues: fan-out and feedback. Only cascade structure is accepted in reversible circuits. To solve the earlier problems, many techniques for synthesizing quantum circuit has been researched and developed over the past two decades.
In [8], [9], Maslov et al. proposed a transformation-based method that transforms outputs sequentially and relies on the properties of the pre-selected quantum gate (Toffoli, Fredkin, …) to choose the path from output to input and synthesis the circuit. This first method depends on the size of the truth table, which leads to a considerable processing time when the numbers of inputs are increased. The following method introduced is search-based (heuristic methods), [10]- [12] which iteratively finding the possible path selection using Hamming distance [13]. After this phase, a variety of reversible gates are selected by finding the possible matching reversible gate. Similar to the transformation-based method, this method relies on the size of the truth table, but the results are better due to using Hamming distance to find the best path. In [14], [15], Saeedi et al. introduced a technique called the cycle-based method to decompose Boolean functions into smaller cycles. From each cycle, this method synthesizes it into a quantum circuit. The result of this method depends on the number of cycles and the decomposition process. The ESOP-based method proposed in [16]- [20] was the synthesis algorithm with no adding lines. By using Positive-polarity Reed-Muller expansion [21], this method synthesis quantum circuits by matching each selection-part in expansion to a built-in template in the library. Its disadvantage is the processing time to build the library when the numbers of input grow up.
Our research starts by using the BDD-based methodwhich was first introduced by Wille in [22]. The first step of this method is building a BDD [23] for Boolean functions. An advantage of conduct BDD is the capability of large function expression infinite time which overcomes the weakness of previous methods. Then, each node of BDD is matched to a cascade of reversible gates or templates. The additional templates may add more garbage lines to the circuit result due to the properties of the shared nodes of BDD. Many BDD versions are introduced to optimize the algorithm. Three structures called shared BDD, complement edges BDD and advanced ordering BDD were used in synthesis and evaluation individually in [24]. Shared edges BDD reduces lines and quantum costs by sharing nodes for many functions. The complement-edge version decreases the total sizes of BDD (measured by the numbers of nodes) in half, causing a reduction in additional lines. Besides, by using complement edges, the templates are more complicated with only Toffoli gate expression, which lead to higher quantum cost. Meanwhile, advanced ordering BDD required many loops to choose the correct orders of variables to get the simplest structure of BDD. Taking all the advantages of the two last versions, ROCBDD is used to synthesize the quantum circuit. Moreover, we also study an algorithm to match templates at share nodes -an important property of BDD. Inheriting the properties of complement edges BDD, a new template using mixed-polarity Toffoli gates is proposed to decrease the number of gates. These gates comprise of Toffoli gate, semi-controlled Toffoli gate and negativecontrolled Toffoli gate, which were studied in [15], [25] and used with search-based and cycle-based methods.
The paper is organized as follows: Section 2, Preliminaries, introduces basic definitions of reversible logic, BDD and the theory of transforming from BDD to ROCBDD. Section 3 introduces a template rebuilt relying on mixed-polarity Toffoli gates and illustrates the algorithm that matches each node to the corresponding quantum circuit. Section 4 presents experimental results and Section 5 concludes the paper.

A. REVERSIBLE LOGIC FUNCTION
A multiple output Boolean function is mapping • The number of input is equal to the number of output which means n = m. • The mapping from inputs to output is bijective or any input only maps to a unique output. Using this definition, a multiple output function having n inputs and m < n outputs can become reversible when adding (n-m) value to output called ancilla lines.

B. QUANTUM LOGIC GATE
To implement a reversible logic function to a quantum circuit, quantum logic gates are used. Differentiating from classic gates, quantum gates have the numbers of inputs equal to the numbers of outputs. These properties allow us to realize quantum circuits by connecting cascade quantum gates. In general, a quantum gate expresses a function , ,..., , • 2 inputs and 2 outputs: • 3 inputs and 3 outputs: 1c). Mixed-polarity Toffoli gate with 2 or 3 inputs and outputs are defined similarity: • 2 inputs and 2 outputs: • 3 inputs and 3 outputs: inputs and 3 outputs: To evaluate each gate, we use quantum cost defined in [8]. The quantum cost for 6 gates is shown in Table 1.

C. FROM BINARY DECISION DIAGRAM -BDD TO ROCBDD
Binary Decision Diagram (BDD) is a graph used to represent a Boolean function. Assume that we have Let denote: Using Shannon decomposition [26], we have: With this form, a function can be represented by a quantum gate like the Toffoli gate (Fig. 2b). In Figure 2, the circuit is reconstructed by mapping each node of BDD and adding four lines. When synthesizing high node x1 and low node x1, two lines are added to the quantum circuit for each node. However, none of the lines are used to synthesize node f. Two previous cases illustrate two types of templates using in matching. The templates for matching and BDD sizes need to be concerned to reduce lines and numbers of gates. Using complement edges is one of the best ways to reduce the size of the BDD structure. This method is based on the transformation of Shannon expansion: Instead of using the original form, this expression gives a new way by adding a complement edge definition. In our paper, when illustrating this edge on BDD, a line with -1 is used. The node to which this edge pointing is represented for a complimented function. Using this notation, both positive edge (solid line) and negative edge (dot line) of VOLUME XX, 2017 9 traditional BDD structure can become complement edge. As mentioned above, this edge is used to describe expression (1), so in the final diagram, only dot lines with -1 are used. Positive edge is still complemented when applying transformation rules but does not appear in the final diagram. The example in Fig. 2a has a complement edge, as illustrated in Fig. 3a. By comparing two diagrams in two figures, we could see the number of nodes reduce. In theory, this diagram combines two complement nodes into one node so the total nodes can decrease up to twice. Two important reduction rules used for ROCBDD are described in Fig. 3b. Another example using this form is in Fig. 4. In this figure, both complement edges and negative edges are shown. This property leads us to an idea to use a mixedpolarity Toffoli gate in a matching circuit.

A. TEMPLATE FOR MATCHING USING MIXED-POLARITY TOFFOLI GATE
As discussed in Section 2, using ROCBBD helps decrease the number of nodes in the diagram, reducing ancilla lines and gates. We study and apply templates with mixed-Toffoli gates to help reduce quantum costs for each template ( Table 2).
For structure number 4, using Shannon expression and negative Davio expansion [26]: Similarly, using the function (4) and (5), we study the other templates. Especially with structure number 5, we do not have the template for column 4. To explain it, the function for this diagram is: there are many types of gate structures illustrating for a function, we choose the structure with the least gate cost and quantum cost. The quantum cost for each structure is shown in Table 3. In Table 2, with the template in column 3, an ancilla line is added to make the circuit reversible. Meanwhile, the template in column 4 is not reversible, which means when using this type of template, the following circuit cannot use line high and line low become f. In the rest circuit, if there is no appearance of the line high and low, we can apply the template in column 4. If not, the templates in column 3 must be used and therefore, one ancilla has to be added to the circuit. Using mixed-polarity Toffoli gates, a function with a complemented variable is represented by a semi-negative Toffoli gate (Fig. 1e) with a quantum cost of 5. If only used Toffoli gate, the circuit for this function has a quantum cost of 6 and is represented by 2 gates (Fig. 5).

FIGURE 5. Two templates represent for a function.
In the ROCBDD, there are two special cases shown in Table 4. Case 1 always appears in this diagram, represented the last order variable. The circuit in this case is shown in column 4. The algorithm sees this node like a variable, unlike a function. Case 2 rarely appears in diagrams. In our algorithm, when we meet this structure, it prioritizes matching at column 4.

B. ALGORITHM FOR SYNTHESIS
The pseudocode for our algorithm is described below. This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. For our algorithm, the first step is to create BDD with appropriate order and then reduce it with complement reduce rules to make BDD become ROCBDD. After constructing the diagram, one node may be pointed by many edges. It means the function represented by this node is shared by many other functions, as shown in Fig. 6. In this case, choosing a template in column 3 or 4 is necessary. Assume that node(i) is pointed by n node or n function using node(i), then our algorithm is using (n-1) template in column 3 and the other's template in column 4.

FIGURE 6. Example of BDD with complement edges.
Our algorithm is illustrated in Fig. 7.
• Starting with node b-12, it is used 4 times, which is indicated by 4 lines pointing to the node. In this case, node a-52 connects to b-12 in special case number 2, synthesizing node-52 by using the template in column 4 (denote N in Fig 6). The template is added to the quantum circuit (denote N). After that, there are still 2 lines pointing to b-12, one is node a-13 and the other is a-28. Synthesize node a-28 is prioritized because positive edge points to b-12. It is matching by using the template in column 3 (denote C). In three nodes connecting to node b-12, one node is matched using the template in column 4. The last node a-13 is matched using the template in column 3 (denote 3). • Continue to check node a-13. There are two lines pointing to this node. Node c2-59 with a solid line pointing to a-13 is synthesized by using the template in column 3 (denote C). Node c2-14 is matched by using the template in column 4 (denote N). Similar to nodes a-52 and a-28. • At node c2-59, only one line points to from node c1-95. It is matched by using the template in column 4. Similar to node c2-94, only one line points to from node c1-95. Because we synthesized at node c1-95, ignore this time. • Continue to synthesize the rest of the diagram. The result for this example is shown in Fig. 8.

C. EVALUATE THE COMPLEXITY AND GATE COST
The complexity of the proposed algorithm is calculated based on the worst case of the size of BDD. Assume that a single output function has n variables. The largest size of BDD is 2 n nodes [22].
Thus, the total complexity of the proposed method is Similarly, a reversible function with n variables has 2 n n in the worst case. It leads to complexity in this case is ( ) The results of synthesis circuits are bounded by the size of the BDD. Since many research studied the bounds of gate cost and adding lines in theory [22], [24], [27]. By using the proposed theoretical results combining with our algorithm, the upper bounds of gate cost and adding lines when implementing by our algorithm can be proved: • A BDD representing a single-output function with n variables has 2 n nodes in the worst case [22]. Using ROCBDD, our algorithm can, at best, reduce total nodes number in half. Thus, the worst number of nodes never reaches 2 n . In the worst case, all nodes are matched to number 1 or 4 of table 1. So our algorithm has upper bound 2x2 n gates. • A BDD representing a reversible function with n variables has n.2 n nodes in the worst case when each BDD of single-output function is built individually. Thus, with our algorithm the number of nodes never reaches n.2 n . In the worst case, each reversible function can be realized in a reversible logic function with less than n.2 n+1 gates. • The number of lines adding to the circuit has maximum depends on the number of nodes. Using our algorithm, the numbers of lines adding to the circuit are always less than 2 n with a single-output case and n.2 n+1 with a reversible function.

IV. THE RESULTS AND DISSCUSION
This section shows our evaluation of the experimental results of our algorithm. Our proposed algorithm with new templates is implemented using Python on top of the BDD package CUDD [28]. Our benchmarks functions are provided by RevLib [29]. In this test, we only proposed the results of functions used in the previous study [22], [24]. The parameters for these tests are the number of lines in the synthesis circuit, gate cost (GC) and quantum cost (QC). The numbers of input and output are denoted PI and PO, respectively. All experiments have been carried out on a personal laptop with an Intel Core i7 processor, 1.8GHz and 8GB RAM.
First, we compare the results of our algorithm with the results of each diagram (which are shared node BDD, complement edges BDD and variable ordering BDD) in [24], as shown in Table 5. Comparing each parameter of the results by using our method and the previous methods, the minimum value of each one is made bold. The results show that our algorithm is better in most cases (except 4mod5_8, alu_9, ex-1_82). In the diagrams, the nodes are separated and shared nodes are less, which leads to bad results. When the numbers of input increase, the improvements of our algorithm can be observed clearly (for instance, in hwb function and rd function).
Second, the results in [22] and our results are compared. In general, our algorithm brings better results than the results using BDD-Based Synthesis. Especially at rd and hwb functions, the GC and QC reduce significantly. However, the lines reduce slightly and in hwb8_64 case, the line is higher than previous results. In two cases 4mod5_8 and alu_9, it does not reach the expected results, the same as in Table 5.

V. CONCLUSION
This paper introduces an algorithm to synthesize reversible quantum circuits using ROCBDD and mixedpolarity Toffoli gate. Our algorithm is expected to reduce all parameters: lines, GC and QC. The experimental results in Section 4 show that our algorithm has better results in reducing GC and QC comparing with previous algorithms. However, our algorithm is limited when facing total lines numbers, which rely on the total shared nodes in the diagram.
Our algorithm has a trade-off between lines and GC of result circuits. In future work, we intend to develop another algorithm aiming to reduce all synthesizing costs of the reversible circuit. For instance, we can apply mix-polarity Toffoli gates in another method like ESOP-based method, which has the best results in lines but limits in GC.