Resonance Suppression Method for Grid-Connected Converter With LCL Filter Under Discontinuous PWM

This paper presents a resonance suppression method that reduces current oscillation incurred by the LCL-filtered grid-connected converter’s discontinuous PWM (DPWM). First, the cause of LCL resonance is analyzed with an aspect of frequency and time domain for DPWM scheme. Then, voltage references are manipulated to decrease the resonance problem. In the proposed method, pole voltage references at the edge of offset voltage are slightly adjusted to reduce the current oscillation. In addition, a perturb and observe (P&O) technique is adopted to search the magnitude of an edge voltage. Through the simulation and experimental tests, the current oscillation is dramatically reduced while keeping the advantages of DPWM scheme. The proposed method can minimize the switching frequency under the grid harmonics regulation.


I. INTRODUCTION
Voltage source converters (VSCs) have largely penetrated electric power grids to interface renewable energy sources (RES), distributed generations (DG), and energy storage systems (ESS). A passive filter is installed for grid-connected converter systems to minimize high-frequency harmonics incurred by a pulse-width modulation (PWM) of the converter. Compared to the simple inductive (L) filter, the inductive-capacitive-inductive (LCL) filter has better harmonic attenuation performance, which not only minimizes the size, weight, and cost of the filter inductor but also improves the dynamics of the system [1], [2]. However, the resonance of LCL filter could cause unexpected current harmonics to the grid and even instability of the converter itself.
Various damping algorithms have been proposed to suppress LCL resonance. In general, existing literature can be classified into two groups: passive damping [3]- [5] and active damping methods [6]- [15]. Passive damping methods are quite simple and robust; however, they result in additional The associate editor coordinating the review of this manuscript and approving it for publication was Yonghao Gui . losses at a damping resistor. In addition, they reduce the filter attenuation ratio at PWM switching frequency. As an alternative, active damping methods have been proposed to simulate virtual damping resistors. They pass resonant frequency by adding an additional feedback loop to the current controller, which minimizes the losses on the filter. In [10]- [12], a digital delay due to sampling and computation was modeled to ensure the robustness of active damping methods. In [13]- [15], a resonance interaction between paralleled converters was analyzed to maintain system stability. These researches alleviate inherent resonant characteristics of LCL filters where the harmonic source exists. However, they were only focused on a current controller's stability analysis coupled with a damping algorithm, where the converter is assumed as an ideal voltage source. Thus, they did not consider a resonance problem provoked by PWM schemes of the converter and harmonic source itself.
In respect to the PWM scheme, it is essential to minimize power losses under the stringent regulation of grid standards. Current harmonics incurred by the PWM switching are subject to harmonic regulations such as IEEE 519 or BDEW [16], [17]. They describe maximum allowable harmonic currents at each harmonic number. In the worst case, the maximum harmonic current is 0.3 % of the rated current for harmonic numbers higher than 35 [16]. Therefore, LCL filter should be designed and damped to satisfy the harmonic regulation where harmonic spectra of PWM methods are carefully considered.
In [18], the impacts of PWM methods were analyzed based on power loss and power density for two-level three-phase converter with LCL filter. 60 • discontinuous PWM (DPWM) has better performance compared with continuous PWM (CPWM) in most aspects, i.e., lower total power losses while keeping the harmonic standard. Not only semiconductor losses but also core loss of the filter inductor and cooling conditions are analyzed to optimize the weight of LCL filter. However, it did not consider a current oscillation provoked by abrupt changes of an offset voltage.
In [19] and [20], the resonance problem from DPWM was discussed through a frequency domain analysis. The loworder harmonics under a half of the switching frequency were triggered when the offset voltage is abruptly changed. These moments are generated every 60 • in the conventional DPWM. As an alternative, a hybrid PWM method mixed with DPWM and CPWM was proposed to alleviate the cause of the resonance problem. In [21], an adaptive DPWM method was proposed to increase the ratio of CPWM to DPWM when the modulation index (MI) is low. It could be regarded as one of the hybrid PWM methods. However, the hybrid PWM methods in [19]- [21] increases switching losses compared to DPWM method because the region of CPWM is inserted to minimize the harmonics.
In this paper, the resonance problem incurred by DPWM is analyzed through LCL filter modeling in the frequency domain and harmonic spectra analysis according to the modulation schemes. Then, voltage references are modified to suppress the current oscillation while maintaining the merits of DPWM scheme. In the proposed method, the voltage references at the edges of offset voltage are moved closer to the optimal point by applying a perturb and observe (P&O) algorithm. Moreover, practical implementations and gain settings are analyzed to improve the performance of the proposed algorithms. The effectiveness of the proposed method is verified with the simulation and experimental results. Compared to the previous research work [22], the implementation and gain setting processes are clearly described. Besides, more simulation and experimental results are added to clarify the effectiveness of the proposed method.

II. ANALYSIS OF RESONANCE PROBLEM
A. LCL FILTER MODELING Fig. 1 shows the circuit topology of a grid-connected converter with LCL filter. L fc , L g ≡ L fg + L grid , and C f represent a converter-side inductance, a grid-side inductance, and a filter capacitance, respectively. The filter admittances from converter voltage, v conv , to converter current, i conv , and to grid current, i grid , are defined by   the following equations, respectively: where ω res = 2πf res = L fc +L g L fc L g C f , and ω LC = 2πf LC = 1 L g C f . Here, f res is the resonant frequency of LCL filter and f LC is the LC resonant frequency of grid-side. Fig. 2 depicts the frequency response of the filter admittances where LCL filter parameters are given in Table 1. Y gc has 20 dB/dec of attenuation rate in a low frequency range, i.e., −20 dB/dec for f < f res , and 60 dB/dec attenuation rate in a high frequency range, i.e., −60 dB/dec for f > f res . The magnitude of Y gc , |Y gc (s)|, becomes very large at the resonant frequency, f res . This result means that voltage harmonics around f res can provoke large current oscillation and violate the harmonic regulation. Thus, f res should be far away from the switching frequency, f sw , and its sideband frequencies.

B. HARMONIC SPECTRA ANALYSIS
Harmonic characteristics are changed based on the PWM schemes, which induce different voltage harmonics, v har . Thus, harmonic spectra analysis for different PWM schemes is required to improve a system efficiency under given constraints, e.g., the harmonic regulation. The harmonic spectra of PWM can be derived by an analytical method such as the double Fourier integral method. It is widely applied to calculate the magnitude of each v har as where m and n are carrier and baseband integer indices, respectively [23]. Fig. 3 shows the pole voltage references, PWM waveforms and harmonic spectra of a-phase phase voltage, defined as v as , when MI and f sw are set to 0.9 and 7.2 kHz, respectively. Here, MI is defined as the ratio between a fundamental component of the phase voltage, v s1 , and a half of dc-link voltage as follows: As shown in Fig. 3(a), the offset voltage of CPWM, v * sn (CPWM), which is equivalent to SVPWM [24], is defined as where v * max , v * min represent the maximum and minimum pole voltage reference, respectively.
The offset voltage of DPWM, v * sn (DPWM), is defined as follows as shown in Fig. 3 Harmonic spectra of v an in Fig. 3 show that DPWM has larger and widespread sideband harmonics near f sw compared with CPWM. In this case, the sideband harmonics of f sw and resonant frequency band near f res can be overlapped, which would provoke severe harmonic oscillation [20].
An effective f sw of DPWM is two-thirds of that of CPWM, and the switching loss of DPWM is almost half of that of CPWM owing to no switching at near maximum current. Thus, f sw of DPWM can increase up to twice that of CPWM under the given limitation of the switching loss depending on a power factor angle [25], [26]. However, in spite of increasing f sw , sideband harmonics around f sw conspicuously increase when DPWM is applied. Therefore, v har components near f res should be avoided by changing PWM schemes or revising control algorithms.
When DPWM is applied, v * sn abruptly changes from v *

sn,pos
to v * sn,neg or vice versa, 6 times per an electrical period. Fig. 3(b) shows that a pulse width of v an abruptly varies at rising and falling edge of v * an contrary to the case of SVPWM in Fig. 3(a), which induces more sideband harmonics around f res . In the aspect of time domain, it could be comprehended that the harmonic oscillation occurs at each v * sn edge, triggering the oscillation not only in converter currents but also in grid currents. Consequently, the grid currents start to oscillate at an interval of 60 • for DPWM and that cannot be easily suppressed with the conventional methods for the grid-connected converter with LCL filter.

III. PROPOSED RESONANCE SUPPRESSION METHOD A. CONCEPT OF PROPOSED METHOD
To suppress the harmonic oscillation incurred by DPWM, v har components near f res should be avoided. v har spectra are VOLUME 9, 2021 determined by pole voltage references, v * abcn , which means that v * abcn can be modified to change v har near f res . The pole voltage references, v * abcn , is the sum of phase voltage references, v * abcs , and offset voltage reference, v * sn . Here, v * abcs is set up by d-q voltage references, v * dq , which is the output of the current controller. On the other hand, v * sn is determined by the PWM method. The PWM method can be changed to suppress sideband harmonics near f res as mentioned previously [19]- [21]. However, the modification of v * sn is not desirable because a transition from DPWM to other PWMs would degrade the system's efficiency due to increased switching loss. Thus, the focus is on modifying v * dq to suppress the harmonic oscillation while the current controller operates without interruption. Fig. 4(a) shows the traces of d-q voltage references in a stationary reference frame, v s * dq , at a steady-state under the conventional current controller. The magnitude of v s * dq remains constant at the instant of v * sn edge because the bandwidth of the current controller is too low to catch up with the current harmonics near f res . f res is about one-third of f sw , i.e., a few kHz, in the case of the LCL-filtered converter to satisfy the harmonic regulation. It is far from the current controller bandwidth, usually set to a few hundred Hz, e.g., 200 Hz. To damp the LCL resonance, a feedforward voltage, α peak ·v s * dq , can be added or subtracted at the output of the current controller as shown in Fig. 4(b). Since the dominant voltage harmonics, i.e., v har near f res , are induced at v * sn edge, the feedforward voltage is applied at the edge of v * sn in the direction of damping the resonance. The feedforward voltage before the edge of v * sn is compensated after the edge of v * sn to maintain v s * dq on the average.    5 shows the conceptual relationship between the ratio of the feedforward voltage, α peak , and the magnitude of harmonic currents represented by THD i . Here, THD i is the total harmonic distortion of i grid , and α opt represents the optimal α peak to minimize the harmonic distortion at v * sn edge. The correlation between THD i and α peak varies depending on the operating conditions such as the filter admittance and the harmonic spectra of PWM. Thus, it is difficult to find an analytical solution for α opt in real-time due to heavy computational burden.
The harmonic spectra of PWM are the function of MI and f sw , which are influenced by disturbances such as a converter nonlinearity [27], [28], and a sensor accu- racy [29]. In addition, the filter characteristics are affected by the manufacturing tolerance and grid impedance variation. Thus, a searching algorithm would be a practical solution to find α opt in real-time. As a result, the proposed method combines the searching algorithm instead of the premade LUT. Fig. 6 shows the harmonic spectra of v as when MI and f sw are set to 0.9 and 7.2 kHz, respectively. The low-order harmonics up to 50-th are zoomed in to distinguish v har components near f res . There are v har components near f res owing to the widespread sideband harmonics of DPWM as shown in Fig. 6(a). It can be suppressed by changing α peak while maintaining DPWM. Fig. 6(b) reveals that low-order harmonics are minimized by setting α peak to −0.04, close to α opt . In this case, low-order harmonics owing to DPWM are reduced by almost one-third by adding the feedforward voltage at the edge of v * sn . Active damping algorithms, e.g., filter capacitor currentor voltage-feedback-based algorithms [6]- [8], are insufficient to suppress the resonance incurred by DPWM because the damping performance is limited by a sampling noise and digital delay. These algorithms reduce the current harmonics after v * sn edge have passed by adding the virtual damping resistors. It cannot eliminate a root cause of the LCL resonance, i.e., v har near f res , which triggers the harmonic oscillation at each v * sn edge. However, it can suppress the harmonics provoked by other causes such as grid harmonics and other converters. Thus, the active damping algorithms can be utilized in conjunction with the proposed method to enhance the system stability under a weak grid condition.

B. IMPLEMENTATION OF PROPOSED METHOD
To realize the proposed method, the edge of offset voltage, v * sn edge, should be detected in advance and the feedforward voltage, α peak ·v s * dq , added at each edge of the offset voltage. Moreover, the optimal α peak , defined as α opt , is searched in real-time to minimize the resonance incurred by DPWM. Thus, v * sn edge detection and α opt searching algorithms should be processed at each calculation point. Fig. 7 shows the flowchart of the proposed v * sn edge detection algorithm. First, the voltage reference angles at present and the next operating point, θ v and θ v_pre , are calculated by an arctangent function as shown below, respectively.
where atan2(v s * qs , v s * qs ) returns the four-quadrant arctangent of v s * dq in the range of [−π, π].
Here, θ v_pre is predicted under the assumption of steadystate condition. On the basis of θ v and θ v_pre , each status of v * sn [n] and v * sn [n + 1], equivalent to k 0 and k 0_pre , is decided. When k 0 = 0; v * sn = v * sn,pos , and when k 0 = 1; v * sn = v * sn,neg as defined in (6). Then, positive and negative edges of v * sn are distinguished by the difference of k 0_pre and k 0 , k edge , as follows: Consequently, k edge is utilized to detect the edge of v * sn . k edge = +1 means a positive v * sn edge, whereas k edge = −1 means a negative v * sn edge. α opt searching algorithm is based on the P&O algorithm, also referred to as a hill-climbing method [30], [31]. It is VOLUME 9, 2021 widely utilized for a maximum power point tracking (MPPT) algorithm in photovoltaic applications due to ease of implementation. The basic principle is to perturb α peak and observe a current error, i err , where i err is measured twice and compared to track down α opt . Fig. 8 shows the flowchart of the proposed α peak P&O algorithm. First, i err was extracted until the number of v * sn edge is sufficient to minimize the effects of other disturbances in i err observation part. i err is simply extracted from the current error terms in the current controller at the steadystate condition, i.e., the error between current references and sensed currents. Otherwise, a current observer could predict the converter current without the effects of PWM harmonics [8]. i err is calculated from the sum of the squared current error, where the current error is the difference between actual and predicted currents. i err is accumulated until the number of k edge , defined as k edge_cnt , is equal to k max . The duration of i err (i) calculation is 120 • · k max . The direction of α peak is then determined by comparing a measured i err in α peak perturbation part. The principle of α peak perturbation part is as follows: If measured i err , i err (i), is less than i err measured at one sample before, i err (i − 1), α peak keeps the present moving direction, i.e., the direction of α peak ≡ α peak (i) -α peak (i − 1). Otherwise, α peak is changed to the opposite direction of α peak . It can be shortly implemented by comparing α peak with i err as follows: where ε peak is a perturbation step size of α peak . As a result, α peak is updated and directly applied at the next v * sn edge. Fig. 9 shows the overall control block diagram of the proposed method. First, k edge is extracted by the v * sn edge detection algorithm. Then, α peak is calculated based on the P&O algorithm. k edge and α peak are utilized to modify the output voltages of the current controller, v s * dq_CC . Finally, d-q voltage references, v s * dq , are revised as follows after the proposed algorithms are applied.
v s * dq is limited within a voltage hexagon at a stationary reference frame, which is a physical limit of PWM. If v s * dq is out of the hexagon boundary, then the voltage should be adjusted at the boundary of the hexagon. This means that the range of α peak is naturally set within the dc-link voltage.

C. GAIN SETTING IN PROPOSED METHOD
The tuning factors of the proposed method are k max and ε peak . Disturbances such as converter nonlinearity and grid harmonics influence the current error, i err . They provoke undesirable fluctuations of α peak . Thus, k max can be increased to make the P&O algorithm more robust to the disturbances. However, the dynamic response gets sluggish as k max becomes larger. To minimize the effects of a current unbalance in the three-phase system, k max is set in multiples of three, i.e., k max = 3n. In this case, α peak is updated at an interval of 360 • · n. Likewise, small ε peak minimizes the oscillation of α peak , enhancing the steady-state performance owing to its small perturbation. However, small ε peak slows down the transient response under abrupt changes of the operating condition such as current reference and grid voltage variations. Thus, k max and ε peak should be adjusted considering both dynamic responses in the transients and oscillatory responses in the steady states. Otherwise, a dynamic step size can be applied to improve the performances of the proposed method further.
The proposed method can be applied for whole MI ranges where the range of α peak is limited owing to its voltage margin as aforementioned. However, this is not a concern because the oscillation caused by DPWM decreases as MI increases. In other words, the effects of v * sn jumps are reduced under high MI operation, which lessens the LCL resonance. In any case, α peak is converged to α opt by the proposed P&O algorithm within the physical voltage limit.

IV. SIMULATION RESULTS
In the simulation, the performances can be evaluated under ideal conditions without the effects of noise and disturbance. The grid-connected converter with LCL filter in Fig. 1 was simulated in MATLAB/Simulink with PLECS. System parameters were set as Table. I, and a grid inductance, defined as L grid , was 0.05 pu (=0.8 mH). In this case, f res was located at 2.03 kHz, near 34 th harmonics. The gains of the proposed method, k max and ε peak , were set to 3 and 0.0005, respectively. Fig. 10 shows the waveforms and harmonic spectra of a-phase grid current, i grid,a , at the rated current and unity power factor conditions, i.e., P * = 5 kW and Q * = 0 kW, 124524 VOLUME 9, 2021  where the dc-link voltage, V dc , was set to 400 V. Fig 9(a) shows that the resonance occurs when DPWM is applied. Current oscillations are provoked when v * abcn is abruptly changed, i.e., at v * sn edges. The current harmonics exceeds the grid regulation near f res band, i.e., 0.3 % of the rated current in the case of IEEE 519. After applying the proposed method, harmonics near f res are remarkably decreased as shown in Fig. 10(b), satisfying the regulation while still maintaining DPWM. It means that the effective f sw can be reduced by adopting DPWM with the proposed method. Fig. 11 shows the simulation results when P * , Q * and V dc were set to 5 kW, 0 kW, and 360 V, respectively. The dc-link voltage decreased by 10 % when compared to the case of Fig. 10, reducing the effects of v * sn jumps at v * sn edges. As shown in Fig. 11(a), the current harmonics near f res exceed the grid regulation when DPWM is applied even under the reduced dc-link voltage, i.e., high MI operation. However, the current oscillations are decreased and satisfy the regulation by applying the proposed method as shown in Fig. 11(b). Fig. 12 shows the current and voltage waveforms under P * transients from +5 kW to −5 kW when the proposed method was applied. The proposed method can rapidly suppress the current oscillations during P * variations where the resonance effects are remarkably reduced within a half cycle. It means that α peak set by the P&O algorithm is quite effective even under transient conditions because MI is not significantly changed in the grid-connected converter. Moreover,  the current reference varies within a slew rate limit in the actual system. Thus, the proposed method could be a practical solution when DPWM is applied.

V. EXPERIMENTAL RESULTS
The proposed and conventional methods were conducted in a 5-kW converter system with LCL filter as shown in Fig. 13, where the system configurations are identical with the circuit diagram in Fig. 1. All control algorithms were implemented in a digital signal processor (DSP), TMS320F28335. System parameters and controller gains of the experiment were identical to those of the simulation. The dead time was set to 2 µs, and V dc was changed by a dc power supply. In addition, the three-phase grid was emulated by a programmable ac power source. Fig. 14 shows the experimental results during the steadystate operation, the same condition as those in Fig. 10. In contrast to the simulation results, low-order harmonics such as 5 th and 7 th are provoked by the converter nonlinearity. In Fig. 14(a), where DPWM is applied, there are harmonics near f res due to the transition of v * sn . Without the proposed method, the harmonic distortion occurs at the edge of v * sn . It shows that the harmonic regulation cannot be achieved under v * sn jumps as shown in the harmonic spectra of i grid,a . Thanks to the proposed method, the harmonic oscillations are significantly suppressed by shifting v * abcn at the edge of v * sn as shown in Fig. 14(b). Fig. 15 shows the experimental results under the same condition as those in Fig. 11. Similar to the case of Fig. 14(a), the harmonic distortion occurs at each v * sn edge by DPWM as shown in Fig. 15(a). The current harmonics near f res are slightly decreased by internal resistances of the LCL filter compared with those in the simulation. However, the internal resistances are not sufficient to satisfy the harmonic regulation. After applying the proposed method, harmonic oscillation incurred by DPWM is significantly reduced as shown in Fig. 15(b). It satisfies the harmonic regulation by applying VOLUME 9, 2021 the proposed method without adding the damping resistor or increasing the switching frequency. Fig. 16 shows the performance under V dc transients from 400 V to 350 V. It shows that the proposed method can suppress LCL resonance even under rapid V dc variations, i.e., MI variations. α peak is slowly converged to α opt under MI variations by applying the P&O algorithm. However, the variation of MI is restricted within certain ranges for the grid-connected converter. In addition, V dc is slowly changed in practical applications. Thus, the P&O algorithm can be an effective solution to search α opt in real-time where α opt varies slightly depending on the operating conditions.

VI. CONCLUSION
This paper analyzes the resonance problem incurred by DPWM for the grid-connected converter with LCL filter. In this paper, the resonance problem is dealt with the frequency and time domain analysis. The root cause of LCL resonance is interpreted as abrupt changes of the offset voltage. Thus, the voltage references near the edge of offset voltage is modified to minimize the current oscillation while preserving the merits of DPWM scheme. In the proposed method, the pole voltage references at the v * sn edge are moved closer to the optimal point. It becomes possible to implement the v * sn edge detection and α opt searching algorithms. The performance of the proposed method has been verified with various simulation and experimental results. The current oscillation at v * sn edges is conspicuously reduced through the proposed method, minimizing the effective switching frequency of PWM converter under the satisfaction of the grid harmonics regulation.