Wideband OFDM-based Communications in Bus Topology as a Key Enabler for Industry 4.0 Networks

The Industry 4.0 paradigm conceives a cyber-physical supporting framework for the manufacturing processes in smart factories. In this context, solutions concerning the wired communications at the field-level have been reported which utilize either fieldbuses, which exhibit a huge distance range but a reduced data rate in a bus topology, or Ethernet-based technologies, which provide an increased data rate but reduced distance in a ring topology. To overcome this shortage, we propose the use of orthogonal frequency division multiplexing (OFDM) to significantly increase the achievable data rates over large distances in industrial bus systems. Also, we establish a novel methodology to compute the signal-to-noise ratio between arbitrary pairs of nodes, which in turn allows to compute the communication capacity. Our wideband system was validated by connecting up to 32 nodes in the distance range 100 m–1 km. Compared to fieldbuses, the results of the proposal exhibit an amazing improvement in data rate of about fifty times for 100 m distance and more than ten times for 0.5 km. Moreover, with respect to Ethernet-based solutions, the results show a relevant improvement in the data rate of around five times for 100 m distance, but Ethernet-based systems cannot go beyond this distance, to which our proposal is not limited.


I. INTRODUCTION
T HE new Industry 4.0 paradigm aims to implement intelligent networks to integrate the human workers and machines supporting the future smart factories [1], [2].The development of the underlying network technologies has been a main focus of attention since the early days of Industry 4.0, when the German government defined a high-tech strategy [3].In this direction, the implementation of production systems for the integration of computing, communication, and control -thus, resulting in so-called Cyber-Physical Production Systems -plays a major role to support the integration of machines, sensors, and manage-ment systems in smart factories [4].We concentrate on the digital communication infrastructure, which is supposed to provide wideband network connection as a key enabler for this process.
Typically, three types of communication systems are deployed for industrial applications [5]: fieldbuses, industrial Ethernet, and industrial wireless networks.On one hand, the Fieldbuses and Ethernet-based networks connect field nodes such as sensors, actuators, and controllers through a wired bus, as depicted in Fig. 1 for the one-level architecture [6].On the other hand, wireless solutions have also been deployed provided their flexibility and low costs [7] (even with the 5th generation wireless communication systems (5G) technology [8]), however, wired networks are still preferred for industrial applications due to their higher reliability [9].
Nowadays, the deployed techonolgies relying on the fieldbus protocols (e.g., PROFIBUS, FIP, WorldFIP) guarantee the timing constraints of industrial applications in order to support strict determinism and fast reaction times [10].Classical fieldbus solutions reach long distances of connections (up to 1 km) but are known for low bandwidth transmissions and can not generally support the transmission of high data rates of 100 Mbit/s and beyond [11].Thus, fieldbuses are mainly deployed for low-speed communication (human control) and programmable logic controller functions (process control).
To support higher data rates, Ethernet is considered as an alternative solution [12].It is easy to deploy, adapters are cheap, it is widely accepted, and the offered high data rates (>100 Mbit/s) are strongly demanded.However, these solutions are limited by the maximum distance of connections between nodes of 100 m [13].Besides, costs are still high in comparison to fieldbuses (mainly due to the need of Ethernet switches on each fieldbus component).
To overcome these limitations on the industrial communications' scenario, novel solutions that attain both, long distance of connections and high data rates, should be explored.It is envisaged that higher data-rate communications can be achieved on fieldbuses by addressing wideband multicarrier waveforms in contrast to the narrowband signals used in classical fieldbuses.In specifics, multicarrier waveforms, like orthogonal frequency division multiplexing (OFDM), can be transmitted over the large distances covered by fieldbuses.This becomes rather useful to interconnect assembly lines along several facilities, then to avoid the limited range of Ethernet-based solutions.
OFDM waveforms on fieldbuses will introduce several advantages.For instance, the use of bit-loading algorithms will avoid those frequency bands where strong interference is observed [14].Access mechanisms (by means of orthogonal frequency division multiple access (OFDMA) [15]) will not only avoid the user's collisions on the bus, but will allocate available resources (in time and frequency) in accordance with required node's quality of service (QoS) metrics.Also, multicarrier communication is a mature technology to deploy wideband communication services over cable.This is, for example, the case of digital subscriber lines (DSL) [16], home networking (G.hn) [17], and power line communications (PLC) [18] -all these technologies make use of OFDM transceivers.However, the extension to wired fieldbus systems has not yet been addressed in spite of its potential to provide higher datarates for long distances.
Since the use of OFDM in the fieldbus has not been reported yet, its achievable bit rate is still unknown in this communication scenario.Its obtaining is a challenge considering the impact of the corresponding hardware impairments and noises, produced by the variety of connected nodes.Its derivation, in terms of the signal-to-noise ratio (SNR) metric, can be further elaborated to overcome the limitation of well-established techniques for the analysis of cascaded stages [19], and the complexity of methods reported for multiport networks [20]- [23].
In this paper, we design and analyze the physical layer to implement an OFDM-based fieldbus.We specifically consider the capabilities of the use of OFDM waveforms to transmit higher data rates over high distances.We develop an analytical methodology in order to compute the channel capacity, and we illustrate its application considering real circuit devices and transmission medium characteristics.
Our main contributions can be summarized as follows: • A fieldbus communication system is designed (from the physical layer perspective) to support the transmission of OFDM waveforms in a bus topology.• A methodology to compute the perceived SNR between nodes is elaborated to account for the achievable bit rate, which overcomes the distributed nature of multiple noisy transmitting devices in the bus.• Metrics for the network dimensioning are provided regarding the total number of nodes and the bus length.The rest of the paper is organized as follows.Relevant technologies for fieldbuses and industrial Ethernet are summarized and discussed in Section II.Then, Section III introduces the proposed design for the OFDM-based fieldbus system with enhanced transmission rate capabilities.Section IV presents a methodology to compute the perceived SNR between nodes' pairs, that will allow the calculation of the achievable bit rate.This proposed methodology is validated in Section V, by comparing the results with those obtained through a circuit simulator and considering commercially available devices.Finally, we present and discuss performance results regarding the evaluation of the channel capacity in Section VI followed by some concluding remarks in Section VII.

II. REVIEW OF FIELD-LEVEL COMMUNICATION TECHNOLOGIES
Fieldbuses and Ethernet-based solutions are currently specified by the IEC 61158 standard [24] with 26 different communications profiles defined in the IEC 61784 parts 1 and 2 [25], [26].In this section, we provide a comparative   The quantities in this table are given without the use of repeaters.a Referred to point-to-point link regarding the ring topology; b Referred to the thick cable, distances regarding the thin and flat cables are provided in [10]; c Reported by the HSE Foundation Fieldbus; d Reported for one segment in P-NET on IP, also reported achieving a cycle time of 0.1 ms in EtherCAT [27]; f Referred to 10BASE2 IEEE standard; g Referred to 100BASET IEEE standard.* Shielded twisted-pair is specified to be used by PROFIBUS, P-NET, and WorldFIP.
summary regarding the specifications on the PHY layer considering the transmission technologies, wired medium, topologies, achievable speed, and the total number of connected nodes.
Table 1 summarizes the main parameters for the existing fieldbus and Ethernet networks.Several reported connector interfaces and cable types are employed to interconnect nodes for a variety of topologies.Regarding the bus topology, and outperforming Ethernet, the PROFIBUS fieldbus, exhibits the best balance between the transmission speed, achievable distance, and total number of nodes without the use of repeaters.In the case of a ring topology, the Ethernetbased solutions provide the best balance to interconnect the nodes.
To fulfill the real-time guarantees of the field-level, the Ethernet-based solutions address strategies to suppress collisions or solve them in a deterministic manner [27].Some solutions are compatible with pure Ethernet nodes.This is the case for protocols running on top of TCP/UDP/IP, often following the published-subscribe model on the application layer (Ethernet/IP, Modbus/TCP, Modbus RTPS, PROFINET CBA, PROFINET IO).Other Ethernet-compatible solutions implement traffic smoothing and shaping, or resource reservation on switches (PROFINET SRT, EtheReal).Finally, modified-Ethernet solutions can only be deployed when all the nodes have been adapted accordingly.This is the case of P-NET on IP, TCnet, and EtherCAT -which deploy toking passing mechanisms -, or EPA and VNET/IP -which implement polling cycles by a master node or using time division multiplex access (TDMA) schemes with distributed medium access-, or PROFINET IRT, time-triggered ethernet (TTE) and time sensitive networks (TSN) -which implement synchronization protocols on switches to guarantee end-to-end restriction delays over switched topologies [1], [28].
In general, fieldbuses are supposed to provide efficient transmissions by using short data messages and reduced computational capabilities on nodes.This conception is today a major impediment for industrial applications where multimedia information processing is incorporated.On the other hand, although Ethernet-based solutions support data streaming transmissions, their adaptation to the field-level of industrial environments can be further improved with new physical layer designs.Specifically, when implementing OFDM transceivers, in contrast to binary signaling (Ethernet and fieldbuses), their benefits regarding the flexible waveform, numerology, and frame parameters design [29] may account for optimized resource allocation schedulers adjusted to the channel condition.

III. PROPOSED FIELDBUS COMMUNICATION NETWORK
The aim of this proposed design is to devise a fieldbus solution of high transmission capacity (>100 Mbit/s) and high distance (up to 1 km) to interconnect sensors and actuators with higher flexibility than the counterpart Ethernet-based solutions.Flexibility is referred to avoid the upper limit distance to interconnect a pair of nodes (100 m) imposed by the ring topology according to Ethernet-based solutions.In our proposal, the bus will be comprised of a twisted-pair cable, where nodes (controller, sensors, and actuators) will be connected through a bus topology as depicted in Fig. 2.This is a simple electrical bus where all nodes are able to transmit and receive simultaneously as long as collisions are avoided.
Here, we focus on the physical layer of the connected node.It will be comprised of the communication module (OFDM transceiver) and the analog-front-end (AFE) circuit.The higher layers, i.e., link layer and above, will be connected through the media-independent interface (MII) port in Fig. 2. The OFDM transceiver will embody the digital circuit to synchronize and implement the direct and inverse fast-Fourier-transform (FFT) to properly transmit and receive the OFDM waveform through the mediumdependent interface (MDI).The AFE will be comprised of an analog-to-digital converter (ADC), a digital-to-analog converter (DAC), and amplifiers to interface the bus.
The system under consideration is comprised of M nodes.Each node is able to transmit and receive OFDM waveforms of given parameters (FFT/IFFT-size denoted by NFFT and subcarrier spacing denoted by ∆f ).Multiple access to the channel will be supported by OFDMA, where a scheduler mechanism will allocate users per available orthogonal resources (resource blocks) to avoid collisions.All introduced delays have a deterministic nature.
The scheme in Fig. 3 depicts the equivalent circuit repre-sentation of the connection between nodes.The twisted-pair cable is analyzed in terms of its characteristic impedance, Z 0 , and the propagation factor, γ.Nodes are equally spaced between each other by a cable length of L meters, and they are represented by the impedance Z nod .Load terminators are connected to each end of the bus line, given by Z Term .
Ideally, with Z Term = Z 0 and Z nod ≫ Z 0 the bus will exhibit the same impedance to every node, according to the transmission line theory [30].
For the ease of representation, only one signal source is represented, as shown in Fig. 3, to illustrate the communication link between an arbitrary pair of transmitterreceiver (Tx-Rx) p-th and q-th nodes, respectively.However, all the nodes have the capability of transmitting and receiving simultaneously through the circuit diagram depicted in Fig. 4. In this diagram, each node is conceived by the connections of the following basic elements: DAC, ADC, a transconductance amplifier as the transmitter, and a voltage amplifier as the receiver.These classes of amplifier were selected as they offer a high impedance to the bus (i.e. the output impedance of the transmitter and the input of the receiver).The objective of this decision is to avoid loading effects, with respect to each other and to the bus.The generated OFDM waveform will be provided by the DAC circuit (modeled here by the source V oDAC and the impedance Z DAC ), and the received OFDM waveform will be transformed to the digital domain by the ADC circuit (modeled here by the impedance Z ADC ).

IV. METHODOLOGY TO EVALUATE THE SNR
In the following, we illustrate the methodology to compute the perceived SNR on a link between an arbitrary pair of transmitter-receiver nodes, denoted by p and q, respectively, as depicted in Fig. 3. Considering the transmission of conventional OFDM waveforms (without pre-filtering techniques) [31], the perceived SNR per m-th subcarrier will be given by the ratio computed in the frequency domain through the Rayleigh's theorem [32].The numerator and denominator account for the received power for signal and noise, respectively.In the case of the numerator, the received power is represented through the bus transfer function H(f ) times the signal power density -represented by the sinc(•) function after using the Fourier transform pair for a time-limited sine wave of amplitude A c and duration 2  ∆f .The bus transfer function, from the DAC output (in the transmitter at p-th node) to the ADC input (in the receiver at q-th node), is given by where, L pq (f ) = V bus,p V bus,q (f ) denotes the voltage attenuation from the output of the transmitting amplifier (p-th node) to the input of the receiving amplifier (q-th node), Vo DAC , and G Rx = Vin ADC V bus,q denote the voltage gain of the transmitter and receiver amplifying stages, respectively.Besides, m is the subcarrier index, A c is the subcarrier amplitude at the DAC output, f is the frequency, and ∆f is the bandwidth of the given subcarrier (given by the OFDMwaveform subcarrier spacing).
In the case of the denominator in (1), the total noise will account for the superposition of the variety of sources: N om is the noise spectral density (mean-square voltage) introduced by the amplifiers and the passive elements (thermal noise), N e will account for the quantization noise errors introduced by the ADC circuit, and the term |H(f )| 2 • N e will account for the perceived noise at the receiver side regarding the DAC transmitter circuit.Here we consider with n as the total number of bits [33].For simplicity, we assume that same total number of bits are used by the DAC and ADC circuits.
Based on the relations in (1), the communication performance will be mainly governed by three main factors: the bus transfer function between nodes (given by H(f ) in ( 2)), the effect of the thermal noise (considered by N om (f )), and the quantization noise errors (considered by N e ).The impact of the quantization noise error is directly computed by the relation with the total number of bits (as presented on the previous paragraph).However, L pq (f ) in ( 2) and N om (f ) in (1) must be computed considering the location of the p-th and q-th nodes.The proper analytical expressions regarding these terms will be derived in the next subsections.

A. OBTAINING THE BUS TRANSFER FUNCTION BETWEEN ARBITRARY PAIRS OF NODES
The bus transfer function (given by H(f ) in ( 2)) takes into account all the elements between the DAC output (in the transmitter at p-th node) and the ADC input (in the receiver at q-th node): the amplifiers (transmitter and receiver), the twisted pair cable segment between p and q, as well as the loading effects of the bus tails (Z Tp and Z Tq' ), as represented in Fig. 3.For brevity, here we omit the dependence of the obtained quantities from the variable f .

1) Computing the numerator of the bus transfer function
The numerator of the bus transfer function in (2) comprises the gains of the amplifiers at the transmitter and receiver nodes.Considering the connections in Fig. 4, these two voltage gains can be computed as and respectively, where G m is the transconductance of the transmitter amplifier with shorted output and Z i,Tx is its input impedance, Z DAC is the output impedance of the DAC circuit, Z nod is the impedance seen into the node from the bus, given by Z nod = Z o,Tx ||Z i,Rx (considering the connections in Fig. 4), Z bus,p is the impedance seen into the bus from p-th node, A v is the voltage gain of the unloaded receiver amplifier, Z o,Rx is its output impedance and Z ADC is the input impedance of the ADC circuit.The operator || is used to denote the calculation of the equivalent impedance of parallel connected elements.
Based on the relations in ( 3) and ( 4), only the term Z bus,p will be dependent on the position of the node in the bus, while the remaining terms will be directly defined by the specific circuit parameters (ADC, DAC, and the amplifiers).(M-q) sections (T sec ) (M-q) (q-p-1) sections (T sec ) (q-p-1) Figure 5: System model of the transmitting and receiving structure on each node.
To compute the bus impedance Z bus,p , we model the system as the cascade connection of identical two-ports networks, the elements of which are represented inside the dottedline box in Fig. 3. Considering the connection of the node impedance Z nod and a cable segment of L meters, the corresponding T -matrix will be given by where Y nod = Z −1 nod is the node's output admittance, and the T -parameters of the cable are [34] T cable = cosh (γL) Z 0 sinh (γL) Then, the T -matrix for any arbitrary number of consecutive n sections can be found as the n-th power of T sec , and the system can be modeled as depicted in Fig. 5. Next, from the T -matrix equations [35], we obtain the equivalent impedance to the left side of p, denoted by Z Tp , as by considering Z Tp as the output impedance of the network and Z Term the load connected in the input, where t ij are the T -parameters regarding the matrix T (p−1) sec .Due to the symmetry of the network, the equivalent impedance to the right side of the p-th node, denoted by Z Tp' in Figures 3 and 5, is the same as the equivalent to the left of a node located at the position p' = M − p + 1. Accordingly, Z Tp' can also be found by using (7), but considering the parameters from the matrix T (M −p) sec .After obtaining Z Tp and Z Tp' , the impedance seen into the bus from p-th node will be Z bus,p = Z Tp ||Z Tp' .By a similar procedure, the impedance terms related to any node can be calculated.
For the particular case of Y nod = 0 (i.e.Z nod → ∞) and Z Term = Z 0 , it can be shown that the calculations from ( 5) to (7) results in Z Tp = Z Tp' = Z 0 , which agrees with the application of the transmission line theory.Consequently, the impedance seen into the bus from the p-th node will be the same for any value of p (i.e.independent of the total number of nodes) and equals to Z bus,p = Z0 2 .

2) Computing the voltage attenuation to account for the denominator of the bus transfer function
To compute the attenuation from p-th to q-th node, given by L pq in (2), we define the total T -matrix for the network in between as in direct correspondence with the elements between p-th and q-th nodes as depicted in Fig. 5. Being V bus,p and V bus,q the input and output voltages of this network, respectively, the attenuation can be derived from the T -matrix equations as taking into account that the output load admittance of the T tot network is the parallel of Y nod with Y Tq' = Z −1 Tq' or Y Tq = Z −1 Tq when p < q or p > q, respectively.Finally, the bus transfer function is obtained after replacing (3), ( 4) and ( 9) into (2).

B. OBTAINING THE RECEIVED NOISE POWER AT AN ARBITRARY NODE POSITION
Concerning the calculation of the received noise power at an arbitrary node, we have to consider the multiple noisy transmitting devices in the system.Hence, we developed the analysis based on the voltage and current noise sources representation in two port networks.
The noise spectral density received by the ADC circuit on each node (cf.Fig. 4) can be computed by considering the total input-referred noise spectral density of the given node (V 2 n RTI ) and its voltage gain (G Rx ) as This total input-referred noise is conformed by the contribution of the following three sources: (i) the noise produced by the receiving amplifier, modeled by its inputreferred voltage and current noise sources, V 2 niRx and I 2 niRx , respectively [19]; (ii) the output noise current generated by the transmitter amplifier located in the same node, denoted by I 2 noTx ; and (iii) the noise voltage received from the bus, denoted by V 2 n bus,q .Analytically, these sources can be combined as to describe the total noise perceived at the ADC input (cf.Appendix A for derivation).
In the following, we explain the computation of the two noise terms I 2 noTx and V 2 n bus,q , based on the system topology (as shown in Figures 3 and 4) and the circuit element parameters (impedances, admittances and gains).The terms I 2 niRx and V 2 niRx must be obtained from the datasheet of the amplifier in used.To compute the noise current spectral density at the output of the transmitter amplifier (on each node), we consider its input-referred voltage and current noise sources, V 2 niTx and I 2 niTx , respectively [19].Thus, the short-circuit output noise current delivered by the transconductance amplifier yields where V 2 n DAC = 4kT Re{Z DAC } is the noise spectral density generated by the DAC circuit, T is the temperature of the system in kelvins, k is the Boltzmann's constant and Re{.} denotes the real part of the impedance [19] (cf.Appendix A for derivation).
For a constant DAC impedance, the addition of the terms containing V 2 niTx and I 2 niTx can be expressed as a single equivalent noise voltage source, denoted here as V 2 neTx , leading to 2) Computing the noise voltage received from the bus (V 2 n bus,q ) The noise voltage received from the bus is produced by all the transmitter amplifiers (excepting for the one located at the given receiving node) and the passive elements in the bus (twisted-pair cable and terminating resistors), affected by the voltage attenuation.The short-circuit output noise current delivered by each transmitter amplifier (I 2 noTx ) will be analyzed as the meansquare superposition of two different sources.The first source is the thermal noise current that would be generated by the node's output admittance "alone" at the system temperature, computed as 4kT Re{Y nod }.Secondly, we define an excess noise current, denoted by I 2 nadd , as the difference between the real output noise current and the first equivalent source defined above, given by Following this approach, the noise voltage from the bus is split into two contributions: (i) the thermal noise produced by the passive elements, including the equivalent thermal noise from nodes' output admittances, denoted by V 2 n (pass) bus,q ; and (ii) the total contribution from the excess noise current (I 2 nadd ) delivered by each transmitter amplifier, denoted by V 2 n (add) bus,q .This can be expressed as The equivalent voltage noise produced by the passive elements (first term in (15)) can be directly obtained as where Y bus,q represents the equivalent admittance seen into the bus from q-th node.
Regarding the excess noise, we superpose the contribution of all the sources from the left and right side of the q-th node as follows where L kq is the voltage attenuation computed as in ( 9), and is the noise voltage produced, on a remote k-th node, by the excess noise current located in that same node, and given by Finally, by replacing ( 14) in (18), and the resulting operation into (17), we obtain the second term in V 2 n bus,q .

V. CASE STUDY
In this section, we validate the proposed SNR computation methodology by comparing its results with those obtained by the circuit simulator PathWave RF Synthesis (Genesys) 1 .
As a case of study, different numbers of nodes (up to five) are connected through a bus topology, as illustrated in the circuit schematic in Fig. 6 a) for the three-nodes case.
We have considered the characteristics of commercially available integrated circuits for the implementation of the system: AD9234 for the ADC, AD9735 for the DAC, AD8375 for the transmitter amplifier, and AD8351 for the receiver amplifier.The main criteria to select these amplifier circuits were their differential output (for the transmitter) or input (for the receiver) interfaces and their respective high impedance values.The cable is the typically reported Cat5 unshielded twisted-pair (UTP).
A. MODELING

1) Circuit Simulator Model
To illustrate the agreement of the derived formulations, the circuit schematic depicted in Fig. 6a simulates the pointto-point communication from the first to the third node, in a three-nodes bus.The i-th node includes the subcircuits Gmi and Avi, which model the transmitter and receiver amplifiers, respectively.These subcircuit models are shown in Fig. 6 b) and c), and later discussed in this section.
The transmitted signal is generated by a source (PORT=1) with the same output impedance as the DAC, which is connected to the transmitter amplifier.The received signal is measured by a load (PORT=2) with the same impedance as the ADC, which is connected to the receiver amplifier.
Resistors are used to model the load effect of DAC and ADC devices, in the idle amplifiers, as well as the terminators on the line.Ports and resistors models include noise generation.
The twisted-pair cable connecting each node is modeled by introducing its impedance matrix in the simulator, using a software's built-in function for 2-port network analysis.The Z-parameters are obtained by the transformation of the T -matrix calculated as indicated in (6).The characteristic impedance and the propagation factor of the twisted-pair cable are computed by the so-called KHM model [9], as where h 1 , h 2 , k 1 , k 2 , and k 3 are cable parameters, given in [9].The transmitter and receiver amplifiers are modeled as depicted in Fig. 6 b) and c), respectively, according to the specifications obtained from their datasheets.Both schematics consist of the devices' internal models (elements inside the dashed-line boxes), and external passive elements recommended by the manufacturer.
The transmitter amplifier (cf.Fig. 6 b), is modelled by a voltage-controlled current source (VCCS), defined in the software by the following parameters: the transconductance T, the input resistance RI, and the output resistance RO.The output impedance of the amplifying device is completed by the capacitor C1.The noise source (VNOISE) models the equivalent input noise voltage, V 2 neTx , for a 150 Ω source, which is the same impedance presented by the DAC circuit.L1 and L2 simulate radiofrequency inductors, required to bias the transmitter amplifier's output.They use the simulation model of the hardware device Coilcraft 0805LS-332, provided by its manufacturer, which includes frequency-dependent parasitic effects and noise.
The receiver amplifier model (cf.Fig. 6 c) consists of a voltage-controlled voltage source (VCVS) with voltage gain MU, input resistance RIN, and the output resistance ROUT.Capacitors C1 and C2 account for the reactive part of the input and output impedances, respectively.Sources VNOISE and INOISE will model the input-referred voltage and current noises, respectively.The noise of the matching resistor R1 is included in the simulation.
Regarding the AD8351 noise model, only the combined effect of the input-referred voltage and current noises, accounting for a connected 50 Ω source, is given by the manufacturer, denoted here as V 2 neRx .To overcome this limitation, we simulated the two extreme cases, namely: (i) all the noise is produced by the voltage source (i.e., V 2 niRx = V 2 neRx ; I 2 niRx = 0), which yields the worst case scenario when the source impedances are lower than 50 Ω; and (ii) all the noise is produced by the current source (i.e.V 2 niRx = 0; , which yields the worst case scenario when the source impedances are higher than 50 Ω.After running both simulations, the highest value of the output noise is the one used in the analysis.

2) Analytical model parameters
The above models were translated to the terms required for the analytical calculations (equations derived in Section IV), by means of circuit analysis techniques (namely Thevenin and Norton Theorems).Particularly, to account for the worst-case analysis, concerning the input-referred noise in the receiver amplifier, the expression (11) was rewritten as Finally, the parameters employed to model the system (including the transmitted OFDM waveform) are summarized in Table 2.

B. VALIDATION OF THE CALCULATION METHODOLOGY
Three different experiments were conducted to validate the calculation methodology, regarding the cable length, the total number of connected nodes, and the location of the transmitter-receiver nodes pair in the bus.Firstly, the cable length was varied in a two-node bus.Secondly, for a fixed distance between the two ends of the bus (500 m), the transmission from the first to the last node was evaluated with a different number of nodes in between.Finally, in a five-node bus with a total length of 500 m, the first node was set as the transmitter and the location of the receiver was shifted.The analyzed frequency range corresponds to the OFDM parameters in Table 2, where the subcarrier index is related to the linear frequency as f m = m • ∆f + f o , and f o represents the offset frequency to transmit a band-pass signal through the channel.Following this relation, the frequency range will be given by f o ; NFFT • ∆f + ∆f 2 + f o , where we have considered f o =1 MHz and the largest OFDM symbol as NFFT = 2048.
The system performance was evaluated through the noise figure, denoted as N F .According to its definition [19], the noise figure includes both the voltage transfer function and the output noise spectral density as where T 0 = 290 K, and the dependency of the terms with f was omitted for brevity.
The comparison between the proposed theoretical formulation and the circuit simulation is depicted in Fig. 7 accounting for different cable lengths in a), the total of nodes in b), and the location of the receiver node in c).The results regarding these three different sets of curves exhibit absolute agreement between the proposed analytical methodology and the circuit simulation, including the oscillatory behavior observed for low frequencies (caused by loading effects due to undesirable impedance mismatching).

VI. RESULTS AND DISCUSSION
Results and discussion are presented regarding the impact of the cable length and the total number of nodes on the achievable channel capacity.We evaluate the channel capacity per subcarrier considering the use of G.hn OFDM waveform parameters, as indicated in Table 2, with nodes equidistantly located on the bus.
For a more realistic scenario when analyzing the channel Varying total number of nodes (500 m)  capacity, we consider the SNR gap approximation to account for a predefined symbol error rate (SER) in additive white Gaussian noise (AWGN) channels [36].We compute this metric per subcarrier as C m = log 2 1 + 1 Γ SNR m by considering the impact of errors on the Γ factor, where SNR m is computed based on the proposed methodology in Section IV, and the circuit and OFDM parameters as presented in Section V (cf.Table 2).The Γ factor will be given by Γ = 1 3 Q −1 SER 4 according to the conforming of M-QAM waveforms per subcarrier index [37], where we assume a predefined SER = 10 −5 for the QAM transmitted modulation.
To illustrate the behavior of the achieved capacity per subcarrier versus the cable length only, Fig. 8 a) depicts the case for a varying distance between two nodes, while Fig. 8 b) depicts the case for a varying total number of connected nodes on a cable of 500 m total length.Based on the results in Fig. 8 a), the capacity per subcarrier (C m ) will be highly reduced with the increasing of the cable length.For instance, this will imply that up to 250 meters a 2048-FFT symbol size can be used to transmit information, and after 500 m the FFT size can not be larger than 1024.Considering the results in Fig. 8 b), the impact of the total number of nodes is not so significant, consistent with the model validation results (cf.Fig. 7 b)).Regarding the 500 m cable, increasing the total number of nodes does not cause a reduction in the FFT size (1024 in this case).This behaviour has been observed for several cable lengths.
The periodic local minima perceived in the channel capacity at lower subcarrier-indexes (cf.Fig. 8 b) are caused by the low-frequency oscillatory behaviour of the voltage transfer function and the noise, presented in Fig. 7.It arises at lower frequencies where the effects of the output inductors' impedance are noticeable.This phenomenon coincide with local extrema occurring in the imaginary part of the equivalent impedance of the bus, when the length of the cable between nodes is a multiple of half of the transmitted carrier wavelength [30].However, even when actions to reduce low-frequency mismatches could be considered in the circuit implementation in a future work, bit loading functionalities implemented over the OFDM waveforms may be used to avoid the impact of this oscillatory frequency band.
Finally, Fig. 9 depicts the total channel capacity, considering all the OFDM subcarriers, by varying the cable length and the total number of nodes.Results exhibit that the channel capacity ranges from a maximum of 512 Mbit/s (100 m cable, 2 nodes) and a minimum of 11 Mbit/s (1 km cable, 32 nodes).As depicted in Fig. 9, in contrast to the Ethernet-based solutions (∼100 Mbit/s) and fieldbuses (∼12 Mbit/s), our proposal overcomes both systems, exhibiting an increased bandwidth for extended distances between nodes.That is, when compared to Ethernet at 100 m distance, the achievable capacity is five times larger, but moreover, our proposal can go beyond this distance in contrast to Ethernet solution.Then, when compared to the fieldbuses, the presented solution achieves a much larger capacity, in the order of fifty times for 100 m distance and more than ten times for 0.5 km.We also remark the similar performance to fieldbuses in the worst condition scenario, i.e., along 1 km cable length with 32 connected nodes.This result demonstrates the realistic behavior of the presented proposal.

VII. CONCLUSIONS
Although the variety of reported solutions exhibit acceptable performance, further improvements can be achieved with the transmission of multicarrier waveforms in wired industrial networks.In this direction, the current proposal has addressed the use of OFDM waveforms to implement the fieldbuses topologies.By means of the discussed circuit bus-topology, the achievable capacity exhibits higher values over larger distances when compared to similarly reported fieldbuses and Ethernet-based networks.Besides, considering the flexible numerology of OFDM waveforms, further counteracting mechanisms to the ruggedness of industrial environments can be implemented.In this regard, future work will be conducted to analyze and conceive resource allocation mechanisms to account for the particularities of industrial applications, where deterministic behaviors and higher transmission speeds are demanded features in high interference environments.We also aim to further analyze OFDM transmission on fieldbuses by conceiving its implementation in hardware. .

APPENDIX A EQUIVALENT CIRCUITS FOR THE NOISE CALCULATION IN THE AMPLIFIERS
The expression for the total input-referred noise spectral density (V 2 n RTI ), regarding the receiving amplifier in the q-th node, is obtained from the equivalent circuit depicted in Fig. 10.The input-referred voltage and current noise sources, denoted by V 2 niRx and I 2 niRx , respectively, model the noise produced internally by the receiving amplifier [19].The current source I 2 noTx accounts for the output noise generated by the transmitter amplifier located in the same node.Finally, the current source I 2 nbus,q models the total noise generated in the bus, as perceived in the q-th node.From this circuit, we find the value of V 2 n RTI as the superposition of the effect of each noise source separately.Particularly, we refer to the contribution from the source I 2 nbus,q as the noise voltage received from the bus and denoted as V 2 n bus,q .The contributions from other sources are found by applying basic circuit analysis techniques.The result is given in (11), provided in Section IV-B.
The short-circuit output noise current (I 2 noTx ), regarding the transmitter amplifier is given by where V 2 n RTI,Tx is the total input-referred noise spectral density, produced by the noise sources in the equivalent circuit represented in Fig. 11.The input-referred voltage and current noise sources, denoted by V 2 niTx and I 2 niTx , respectively, model the noise produced by the transmitter amplifier itself [19].The source V 2 n DAC is the noise spectral density generated by the DAC circuit.
The value for V 2 n RTI,Tx is obtained by the superposition of the noise sources as (23) Finally, replacing (23) in ( 22) yields (12), provided in Section IV-B.

Figure 1 :
Figure 1: Fieldbus network for industrial applications.

Figure 2 :
Figure 2: Simplified diagram of the circuit interface in the bus topology.

Figure 4 :
Figure 4: System model of the transmitting and receiving structure on each node.

1 )
Computing the output noise current produced by the transmitter amplifier (I 2 noTx )

Figure 6 :
Figure 6: Simulation schematics: a) three-nodes bus, first node transmitting and third node receiving; b) transmitter and c) receiver amplifier.

10 50Figure 7 :
Figure 7: Validation of the proposed SNR computation methodology: a) varying the cable length in a two-nodes bus; b) end-to-end communication varying the total number of nodes with fixed total bus length of 500 m; and c) varying the receiving-node location in a five-nodes bus with a fixed total length of 500 m.

Figure 8 :
Figure 8: Achievable channel capacity.a) Impact of the length of the cable for the connection in between two nodes.b) Impact of the total number of nodes for the cable length of 500 m.

2 Figure 10 :
Figure 10: Noise sources at the input of the receiving amplifier.

Figure 11 :
Figure 11: Noise sources at the input of the transmitter amplifier.

Table
[10]mmary of transmission technologies for the fieldbus and Ethernet-based solutions (derived from[10]).