Simplified Space-Vector Modulation Strategy for Indirect Matrix Converter With Common-Mode Voltage and Harmonic Distortion Reduction

This paper presents a simple space vector modulation (SVM) strategy for a three-phase indirect matrix converter (IMC) to reduce common-mode voltage (CMV) and output harmonic distortion. To suppress the CMV peak value to 57.7% of the input phase voltage, three active voltage vectors are used to generate the desired output voltage with arbitrary amplitude and frequency. However, the output waveform quality of the IMC deteriorates due to the absence of zero voltage vectors. To overcome this problem, this paper proposes to redesign control of the rectifier stage by utilizing three active current vectors instead of two, as is common. Consequently, a constant average DC-link voltage is achieved, which can improve the output performance in terms of output voltage and current harmonic distortion. Compared to the existing strategies, the proposed strategy can reduce the CMV and maintain output harmonic distortion without increasing the computation burden. Implementation of the proposed strategy is also straightforward and simple. Simulated and experimental results are provided to verify the effectiveness of the proposed strategy.


I. INTRODUCTION
In general, matrix converter (MC) technology has been discussed as an all-silicon approach for motor drive applications because it lacks a large energy storage system [1]- [3]. After nearly four decades of research efforts, MC technology has received considerable attention as a viable alternative to traditional voltage source inverter (VSI) technology [4]. MC technology provides many advantages, including sinusoidal input/output current waveforms, bidirectional power flow, a controllable input power factor, and a simple and compact power design. MC topology is often classified into direct matrix converters (DMC) and indirect matrix converters (IMC), which correspond to its one-stage and two-stage characteristics, respectively. IMC and DMC have similar input and output performances. However, IMC can offer additional benefits that are not available in DMC, such as simpler clamp circuits for over-voltage protection, zero-current The associate editor coordinating the review of this manuscript and approving it for publication was Snehal Gawande . commutation, and flexible structures. Recently, the IMC, as shown in Fig. 1, has received more attention than the DMC [5]- [8].
Despite the advantages of MC technology, its industrial application has not met its potential due to several technical issues. MC technology has suffered from problems associated with common-mode voltage (CMV), like other pulse width modulation (PWM) converters. As reported in VOLUME 8, 2020 This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/ the literature, CMV with a high frequency and a high dv/dt will be produced when the PWM technique is used to control the MC. The CMV is the main source of early motor winding failures, motor bearing degradation, and electromagnetic interference [9], [10]. Thus, it is necessary to suppress the CMV in the MC topologies to prevent these problems. Several modulation methods have been introduced to reduce the CMV for the three-phase IMC drive system. The majority of the methods are based on a near-state PWM technique that can effectively mitigate the peak value of the CMV by 42% of its original value [11]. Nguyen and Lee found that CMV reduction methods are based on replacing the zero voltage vectors with two opposite active voltage vectors and one nearest active voltage vector, respectively [12], [13]. Rahman et al. presented a space-vector modulation (SVM) method to reduce the CMV peak value by properly placing the zero vectors in the rectifier modulation, instead of placing the zero voltage vectors in the inverter modulation [14]. Wang et al. suggested a combination of model predictive control and SVM to decrease the CMV for the three-phase IMC topology [15]. Unfortunately, the quality of the output waveforms also deteriorated due to the absence of zero voltage vectors, which is a common trade-off between CMV reduction and output performance.
More recently, CMV reduction methods have been proposed to address the issues discussed above and to maintain the IMC output performance [16]- [19]. Padhee et al. proposed a modulation technique for CMV reduction and enhanced output voltage distortion by dividing the IMC operation into low and high voltage transfer ratio (VTR) ranges [16]. An additional algorithm is needed to combine the two modulation schemes. To avoid the need to separate the two operation ranges, Tsoupos and Khadkikar suggested adding a weighing factor to create a seamless transition between the low and high VTR operation ranges [17]. Tran and Lee proposed a modulation method to reduce the CMV, the output voltage, and current harmonics distortions for a five-leg IMC fed open-end winding load [18]. Li et al. presented a new SVM method based on the concept of an open-current vector to suppress the CMV peak value without degrading the output performance [19]. Although these recent CMV reduction methods preserve the quality of the output voltage and current waveforms, they are also more complex. As a result of these complexities, MC development has been difficult.
To address these issues, this paper proposes a simplified SVM strategy to reduce the CMV and output harmonic distortion without increasing the complexity. In the proposed strategy, a unique three-vector switching technique successfully modulated the rectifier and inverter stages of the three-phase IMC. Three active voltage vectors are used for the inverter modulation to reduce the CMV. Three active current vectors are also used for the rectifier modulation to obtain a constant average DC-link voltage, which can improve the output performance. Consequently, the proposed SVM strategy can not only reduce the CMV but also maintain the output waveform quality and decrease the computational burden compared to existing methods. Simulation and experimental results are provided to evaluate the effectiveness of the proposed SVM strategy.

II. CONVENTIONAL SVM STRATEGY
The SVM strategy widely used to control the IMC was established by Wei and Lipo [20]. Assume that the rectifier stage is connected to a sinusoidal and balanced three-phase voltage source as follows: where V i and ω i are the amplitude and angular frequency of the input phase voltage, respectively. The modulation of the rectifier stage is based on the space vector analysis of the input voltage and input current under the constraint of the unity input power factor. The space vectors of the input voltage and input current are described as follows: where I i and β i are the amplitude and phase angle of the input phase current, respectively. Fig. 2 shows the space vector diagram, sector identification, and DC-link voltage waveform of the rectifier modulation. As shown in Fig.2(a), the reference input current vector is composed of six active current vectors and three zero current vectors. Each vector represents the switching states of the upper and lower switches to the voltage source. For example, when the current vector i ac is used to synthesize the reference input current vector, the upper switch of phase a, S ap , and the lower switch of phase c, S cn , are connected to the positive pole and negative pole of the DC-link bus voltage, respectively.
To obtain the highest value of the DC-link voltage, the maximum and medium input line voltages are used to generate the DC-link voltage. Accordingly, the two nearest active current vectors are selected to produce the reference input current vector. For clarity, assume that the reference input current vector is in sector 1 −π 6 ≤ β i ≤ π 6 as shown in Fig. 2(a). Two vectors, i ab and i ac , are then selected to synthesize the reference input current vector i * i as follows: The duty ratios of two active vectors are calculated as: where m i = I * i Ī dc is the rectifier modulation index, andĪ dc is the average value of DC-link current.  The rectifier modulation index m i is typically kept at unity, and the zero current vectors are not used for the rectifier modulation to obtain the maximum DC-link voltage. Therefore, the duty ratios are recalculated to complete a switching period as follows: The average value of the DC-link voltageV dc is calculated as follows: As demonstrated by equation (6) and Fig. 2(b), the average value of the DC-link voltageV dc varies according to the maximum input line voltage, and its maximum and minimum values are given by: Meanwhile, the traditional SVM of a three-phase VSI while compensating the effect of the DC-link voltage variation can be applied to control the inverter stage. The SVM of the inverter stage is based on the space vector analysis of the output voltage. The space vector of the output voltage is described as follows: The space vector diagram of the inverter stage is composed of six active vectors ( v 1 ∼ v 6 ) and two zero vectors , as shown in Fig. 3. Each voltage vector refers to the connection state of the output phase voltage to the DC-link. For clarity, assume that the reference output voltage vector is in sector 1 0 ≤ α o ≤ π 3 . In this sector, the two active vectors, v 1 , v 2 , and two zero vectors, v 0 , v 7 , are used to generate the desired output voltage: The corresponding duty ratios are given as follows: where In a three-phase IMC topology, the voltage transfer ratio (VTR) is defined as the ratio between the amplitude of the output voltage and the amplitude of the input voltage. As a result, the maximum value of the VTR is given as: The IMC switching pattern should satisfy the constraints that minimize the number of commutations in each switching period as well as a symmetrical arrangement to achieve low output harmonic distortion. Furthermore, to obtain a balanced input current and output voltage, the rectifier switching event should be synchronized with that of the inverter. To put these in perspective, the IMC switching pattern is organized as shown in Fig. 4 when the reference input current and output voltage vectors are in sector 1. In Fig. 4, the corresponding  dwell-times are calculated by:

III. PROPOSED SVM STRATEGY A. CMV IN A THREE-PHASE IMC DRIVE
The CMV in a three-phase system is defined as the voltage difference between the motor neutral point (N ) and the ground point of the power supply (O), as shown in Fig. 5. The leakage impedance, Z L , represents the leakage current path in the AC drive system. The CMV, v cm , is expressed as follows: Then, CMV is derived from the output load as where v A , v B , and v C are the IMC output phase voltages to the ground, and R and L are the load resistance and inductance, respectively. Under the balanced three-phase load, the sum of all three output currents becomes zero: i A + i B + i C = 0. Therefore, the CMV is given as follows: From equation (15), the CMV magnitude depends on the applied voltage vectors of the inverter modulation, and the CMV peak value is calculated as:

B. PROPOSED SVM FOR INVERTER STAGE TO REDUCE CMV
From equation (16), the CMV of the three-phase IMC is minimized when the group of six active vectors is applied to the inverter modulation. Therefore, if the output voltage is composed by using only active voltage vectors, the CMV will be reduced to its minimum value, or 57.7% of the input phase voltage amplitude. Because two active vectors and two zero vectors are selected in the conventional SVM strategy, it cannot reduce the CMV.
To reduce the CMV of the IMC, non-zero vector approaches are introduced to control the inverter stage. In other words, only active vectors are used to generate the desired output voltage [12], [13], [16], [18]. Among non-zero vector approaches, the near-state PWM technique is preferable over others due to its advantages, such as smaller total harmonic distortion (THD) of the line-to-line output voltage and low switching losses [11]. The near-state PWM technique uses the three nearest active vectors to the reference vector to synthesize the desired output voltage. Thus, the space vector diagram of the proposed strategy for the inverter modulation is redefined as shown in Fig. 6.
Without losing the generality of the analysis, assume that the desired output voltage is located in sector 1 −π 6 ≤ α o ≤ π 6 , three active vectors, v 1 , v 2 and v 6 , are selected to compose the reference output voltage vector: The corresponding duty ratios, d I1 , d I2 and d I6 , are calculated as follows:

C. PROPOSED SVM FOR RECTIFIER STAGE TO IMPROVE HARMONIC DISTORTION
In the conventional SVM of the rectifier stage, the two nearest active current vectors are chosen to synthesize the reference input current vector. Although this method can provide the maximum DC-link voltage, the average value of the DC-link voltageV dc changes six times within one input frequency cycle, as shown in Fig. 2. Therefore, if this value is used for the inverter modulation, the conventional strategy cannot provide excellent output performance due to the variability of the average value of the DC-link voltage. Moreover, the proposed SVM for the inverter stage can reduce the CMV effectively, but the output performance of the three-phase IMC declines due to the absence of zero voltage vectors.
To compensate for the degraded output performance, the rectifier stage SVM is redesigned by using three active current vectors to synthesize the reference input current, instead of two used in the conventional strategy. In other words, the average value of the DC-link voltage in the proposed strategy is maintained as a constant by using the three maximum, medium, and minimum input line voltages. Fig. 7 shows the space vector diagram, sector identification, and the DC-link voltage waveform for the proposed SVM of the rectifier stage. In each sector, the reference current vector is composed of three active current vectors. For clarity, it is assumed that the reference input current vector locates in sector 1 0 ≤ β i ≤ π 3 , the three active vectors, i ab , i ac , and i bc , are selected to synthesize the reference input current vector: The duty ratios of the three active vectors are determined as follows: The average value of the DC-link voltage is calculated by:    8 shows the switching pattern of the proposed SVM strategy for the three-phase IMC drive system to reduce the CMV and improve the harmonic distortion. The switching pattern is arranged symmetrically to achieve low voltage and current distortion. The switching events of the rectifier and inverter stages are also synchronized to obtain the balanced input current and output voltage. The duty ratios in Fig. 8 are given by:

D. VOLTAGE TRANSFER RATIO
In the proposed SVM strategy, the VTR is given as follows: From equations (18) and (20), the duty ratios of the rectifier and inverter stages must be non-negative and lower than or equal to unity. This constraint leads to the restrictions of the modulation indexes and the VTR of the IMC: (24) VOLUME 8, 2020 Based on equation (24), the proposed strategy is suitable to drive the IMC operation at a high VTR range.

E. SIMPLIFICATION IN THE PROPOSED SVM STRATEGY
In the previous approached to reduce CMV while considering the output quality, the rectifier modulation is modified where the formation of the DC-link voltage is combined with the two switching schemes according to the VTR range [16], [17]. Padhee et al. presented a solution separating the operation of the IMC into two ranges of operation: low and high VTR ranges [16]. In the low VTR range, the two active and one zero current vectors are used for the rectifier modulation, while the active current vectors are used in the high VTR range. The flowchart in Figure 9 combines the two modulation schemes. To avoid the rectifier modulation separation according to the operation range, the approach by Tsoupos and Khadkikar proposed a weighting factor to formulate the DC-link voltage [17]. Whereby the two modulation schemes are merged to form a new SVM that can generate a variable DC-link voltage as follows: whereV dc(Ref ) ,V dc(Low) , andV dc(High) are the average DC-link voltage of the modulation [17] and the low and high VTR schemes [16], respectively; and d Low and d High are the weighting factors of the low and high VTR schemes, respectively. As a result, the modulation becomes more complicated in that the approaches described above require more computational burden and a lookup table to synthesize switching patterns. To simplify the modulation strategy with reduced CMV and improve the output harmonic distortion, the proposed SVM strategy uses a unique set of three active vectors for the rectifier and inverter modulations. Accordingly, three active current vectors are used to keep the average DC-link voltage at a constant value, and three active voltage vectors are selected to reduce the CMV of the IMC topology. Therefore,   the proposed switching scheme is identical despite the operation range, and no additional manipulation is needed.

IV. SIMULATION RESULTS
Simulations are completed using PSIM 9.0 software with a three-phase R-L load to evaluate the effectiveness of the proposed SVM strategy. The simulated parameters are shown in Table 1. Fig. 10 shows the CMV waveforms and the Fast Fourier Transform (FFT) analyses of the conventional SVM without CMV reduction and the proposed SVM strategy. The conventional strategy cannot reduce the CMV peak value due to the existence of the zero voltage vectors in the switching pattern. By only using the three active voltage vectors to generate the reference output voltage, the proposed SVM strategy reduces the peak value of the CMV from 100 to 57.7 V, which corresponds to 1 √ 3 the input phase voltage magnitude. Moreover, the Root Mean Square (RMS) value of the CMV with the proposed SVM strategy is always lower than that with the conventional strategy, as demonstrated in Fig. 11. The reduced CMV leads to a reduction in the leakage current and bearing current. Figs. 12 and 13 show the simulation results of the input/output waveforms of the conventional and the proposed SVM strategies at the VTR q = 0.7. As can be seen, the quality of the input and output waveforms does not suffer from the proposed SVM strategy. Additionally, the input voltage is in phase with the input current; the proposed SVM strategy can drive the IMC at the unity input power factor. The filtered input current is sinusoidal and leads the input voltage with a little phase angle due to the characteristics of the input filter.
To evaluate the output performance improvement of the proposed SVM strategy compared to the previous reduced CMV-SVM strategies, the total harmonic distortion (THD) of the output current and output line voltage is shown in Fig. 14.
The THD values acquired with the proposed SVM strategy are smaller than those achieved with other reduced CMV-SVM strategies. This signifies that the IMC output performance improves significantly as a result of the constant value of the average DC-link voltage, which is achieved by the redesigned rectifier modulation in the proposed SVM strategy. Fig. 15(a) shows the dynamic responses of the output voltage and current waveforms of the proposed strategy with a load input voltage step change from q = 0.6, fo = 60 Hz to q = 0.8, fo = 30 Hz, and back. Fig. 15(b) shows the performance of the proposed strategy for the case of a load  condition step change from R = 20 , L = 5 mH to R = 10 , L = 5 mH, and back. The proposed SVM strategy can maintain sinusoidal output currents and a good dynamic performance even when the load condition changes suddenly.

V. EXPERIMENTAL RESULTS
To verify the effectiveness of the proposed SVM strategy, a prototype of the three-phase IMC is implemented in the laboratory as shown in Fig. 16. The control board is designed with a 32-bit floating-point DSP TMS320F28335 and a CPLD Altera EPM7128SLC84-15 to perform the PWM technique and four-step commutation, respectively. The bidirectional power switches are executed by two discrete IGBT modules IRG4PF50WD. The unidirectional power switches  in the inverter stage are performed by the IGBT module FMG2G150US60. The parameters used in the experiment are the same as those in the simulation shown in Table 1.  Fig. 17 shows the experimental results of the input phase voltage, the CMV waveform, and its FFT analysis using the conventional SVM without CMV reduction and the proposed SVM strategies. The proposed SVM strategy reduced the CMV peak value by 42.3% compared with the conventional strategy. It should be noted that the CMV suppression of the proposed SVM strategy is the same as that of the existing CVM reduction methods. Thus, the problems commonly associated with CMV are significantly decreased with the proposed SVM strategy.
Figs. 18 and 19 show the experimental results of the input and output waveforms of the conventional and proposed SVM strategies at the VTR q = 0.7, respectively. The input and output currents are good sinusoidal waveforms. The filtered input current leads the input phase voltage slightly due to the input low-pass filter. These results exactly match the simulation results.

VI. CONCLUSION
This paper presents a simple SVM strategy that can reduce the CMV as well as improve the output performance for a threephase IMC. Using three active current vectors for the rectifier modulation, a constant average DC-link voltage is achieved, which can improve the output performance in terms of the output voltage and current harmonic distortion. To suppress the CMV value to 57.7% of the input phase voltage, the three active voltage vectors are used for the inverter modulation. Due to the unique set of three active vectors for both rectifier and inverter modulations, the proposed SVM strategy can avoid the increase in computational burden and use of a lookup table for switching patterns synthesis associated with the existing approaches. Simulated and experimental results demonstrate the effectiveness of the proposed SVM strategy.