Non-Isolated High Step-Up DC/DC Converter With Coupled Inductor and Switched Capacitor

In this paper, a high-efficiency DC/DC converter with low voltage stress is designed for green power applications. The proposed non-isolated high step-up DC/DC converter combines the advantages of switched capacitors, coupling inductors, and voltage multiplier techniques. Adding the cells of the switched capacitor not only increases the voltage gain but reduces the voltage stress of the semiconductor devices. High voltage gain can be achieved by adding a coupled inductor method to adjust the turns ratio. When these are combined with a voltage multiplier circuit, the leakage energy of the coupled inductor is recirculated to the output terminal with lossless passive clamping performance. The leakage inductance of the coupled inductor controls the current dropping rate of the output diode turn OFF so that the reverse-recovery problem is mitigated. The proposed converter integrates these three techniques to achieve high voltage gain without operating at maximum duty cycle. In addition, switching loss reduction is realized through zero current switching turn ON soft switching performance with low voltage stress of semiconductor devices. Finally, this paper verifies the performance of the proposed converter for theoretical analysis by using a $35\sim 45\text{V}$ input, 380V output, and 1kW power prototype circuit.


I. INTRODUCTION
Recently, renewable energy sources are increasing in value worldwide due to energy shortage, environmental pollution, and climate change. High step-up converters are essential because renewable energy sources are photovoltaics, wind power, and fuel cell systems, which have low-voltage output characteristics [1]- [4]. Among renewable energy systems, photovoltaic systems are expected to play an important role in future energy production [5], [2]. The output voltage of most PV panels is lower than 50V, and a full-bridge inverter requires about 380V DC bus voltage to deliver energy to a single-phase 220V utility grid for grid-connected generation systems. High step-up DC/DC converters with voltage gains of more than ten times in the front-end stage are essential [6]. When multiple PV panels have a parallel connection configuration, these high step-up converters are expected to have The associate editor coordinating the review of this manuscript and approving it for publication was Cihun-Siyong Gong . a significant benefit in reducing system cost and increasing power density, along with greater voltage conversion rates and higher efficiencies. Fig. 1 shows a typical green power conversion system block diagram using renewable and alternative power sources. It consists of a green power supply with a 380∼400V DC bus application for high step-up DC/DC conversion of low-voltage level renewable energy sources to a Load/DC-Microgrid or Load/Utility using a DC/AC inverter [7].
For DC/DC converters, high step-up is classified into two types: isolated and non-isolated. Isolated converters such as flyback, forward, push pull, half bridge, and full bridge can achieve high voltage gain by adjusting the transformer turns ratio [8], [9]. However, in addition to price increases, transformers also cause high switching voltages and significant losses due to transformer leakage inductance. For example, a flyback converter achieves high step-up voltage gain by adjusting the transformer turns ratio, but the primary side active switch and secondary side diode suffer from high voltage stress due to the leakage inductance of the transformer. This limits the use of flyback converters in high power applications. To solve this problem, an RCD snubber is used for reduction of the voltage stress on the switch. However, this method reduces efficiency [10], [11].
Non-isolated converters include buck, boost, and buck boost converters, which offer low cost, small size, low switching losses, and high efficiency [12]. Theoretically, a conventional boost converter can achieve a gain as high as ten times when the duty cycle is 0.9. However, in practice, the parasitic resistance of the inductor and the loss of the switch and the diode have the problem of reducing the output voltage as well as the efficiency [13]. Conventional boost converters operate under hard switching conditions of the switch and output diode. In particular, the output diode cannot achieve high efficiency because it causes serious reverse recovery problems. In order to solve the above-mentioned problems, various studies have been conducted in the literature [14]- [17].
Typically, a boost converter with a coupled inductor is divided into a cascaded boost converter in which the primary and secondary windings are connected in series and a stacked boost converter in which the secondary windings are stacked on the output side. These boost converters are similar to the principle of operation of flyback converters, the structure of the system is thin and the cost is low. They have high voltage gain and low voltage stress on the switch, and the leakage inductance of the coupled inductor helps to improve efficiency by mitigating the reverse recovery problem of the rectifier diode. However, the leakage inductance of a coupled inductor can cause severe resonances and high voltage spikes across switches and diodes. The higher the turns ratio, the larger the input current ripple. These high input current ripples not only increase conduction losses and lifetime, but can also have a detrimental effect on renewable energy devices. [18], [19].
The high step-up conversion problem can be solved by combining switched capacitors, switched inductors, coupled inductors, switched coupled inductors, and switched diode capacitors with conventional boost converters [20]- [23]. The voltage multiplier circuit (VMC) combines a set of inductors, diodes, and capacitors to achieve the low voltage stress and zero current switching (ZCS) conditions of the main switch and diode, greatly reducing power loss and increasing efficiency [24]. Fig. 2 (a) is a high step-up converter of a VMC with coupled inductor and switched capacitor [25]. By using a clamp circuit, the voltage stress of the switch S can be reduced and the energy stored in the leakage inductance of the coupled inductor can be recycled. Fig. 2 (b) can increase the power level and voltage gain by combining a switched capacitor with an interleaved structure [26]. However, high efficiency cannot be obtained because the voltage stress of the switch is equal to the output voltage and operates in a hard-switching condition. Also, the power density cannot be improved due to the size of the capacitor bank. Recently, it has attracted attention in various applications through hybrid switched capacitor converters, which use both capacitors and inductors in voltage conversion and power transmission processes to improve the energy utilization of capacitors [27]- [29].
In this paper, a high step-up DC/DC converter is proposed by integrating coupled inductors, switched capacitor cells, and voltage multiplier circuits into a conventional interleaved boost converter. Coupled inductors increase the voltage gain by adjusting the turns ratio of the primary and secondary, and switched capacitor cells provide additional voltage gain. Switched capacitor cells and voltage multiplier circuits of the proposed converter can achieve low voltage stress on switches and diodes. These can increase the efficiency by using a semiconductor element with low conductivity. The lossless clamp performance of the VMC will not only allow the switch to operate as ZCS soft switching through the leakage inductance of the coupled inductor, but also alleviate the reverse recovery problem of the output diode.   Fig. 3 shows a proposed high step-up converter circuit that combines switched capacitors, coupled inductors, and VMC technologies. The inductances L a1 and L a2 of the primary winding of the coupled inductors L 1 and L 2 are connected in parallel, and the inductances L b1 and L b2 of the secondary winding are connected in series. Fig. 4 depicts the equivalent circuit of the proposed converter. It is possible to adjust the high step-up gain by the turns ratio (N ) of the primary side winding and the secondary side winding, and the two winding direction is divided into "•" and " * ".

A. CIRCUIT DESCRIPTION IN CCM OPERATION
The steady state operation of the proposed converter [CCM] consists of eight modes and Fig. 5 illustrates the theoretical key waveforms. Fig. 6 shows the operating modes for the steady state. At t = t 0 , Mode 1 starts and it is shown in Fig. 6 (a). The switches S 1 and S 2 are ON and the diodes D 1 , D 2 , D 3 , D 4 , D r , and D o are reverse biased. The diodes D 1 and D 2 are reverse biased due to the voltage difference between the capacitors C 1 and C 2 . The diodes D 3 and D 4 are reverse biased due to the voltage difference between the capacitor C 3 and C 1 or C 2 . Further, the diode D r is reverse biased by the voltage of the capacitor C m and the diode D o is reverse biased by the voltages of the capacitors C o , C m , and C 3 . In this mode, the magnetizing inductances L m1 and L m2 as well as the leakage inductances L k1 and L k2 are charged by the input voltage V in , which can be written as At t = t 1 , the switch S 1 is ON and the switch S 2 is turned OFF. The diodes D 1 , D 3 , and D o maintain a reverse bias state as shown in Fig. 6 (b). The energy stored in the magnetizing inductance L m2 is transferred to the primary and secondary sides by coupled inductors. The energy stored in the magnetizing inductance is transferred to the primary and secondary sides by coupled inductors. The primary side of the coupled inductor transfers energy to capacitors C 1 and C 3 by forming N p2 -D 2 -C 1 and N p2 -C 2 -D 4 -C 3 loops. In addition, the secondary side of the coupled inductor transfers energy to the capacitor C m by forming N s2 -N s1 -D r -C m loop. The diode D 1 is reverse biased with the voltage of capacitor C 3 , and diode D 3 and switch S 2 are applied with the voltage difference between capacitors C 3 and C 2 . In this state, mode operation can use the following equations i

3) Mode 3 [t 2 -t 3 ]
At t = t 2 , the current (i D4 ) of the diode D 4 is linearly reduced to zero by the leakage inductance L k2 and the diode D 4 is turned OFF. Therefore, there is no reverse recovery problem of the diode D 4 . The operating mode in this mode is shown in Fig. 6 (c). In this mode, all switches and diodes except diode D 4 retain their previous state and the current flow can be written by

4) Mode 4 [t 3 -t 4 ]
At t = t 3 , the switch S 1 remains ON and switch S 2 starts to turn ON. The diode D 2 is also reverse biased as shown VOLUME 8, 2020 in Fig. 6 (d). The current (i Lk2 ) flowing through the primary side leakage inductance L k2 linearly increases, but the current (i Lk1 ) flowing through the primary side leakage inductance L k1 linearly decreases. Therefore, the current (i S2 ) of the switch S 2 is linearly increased through the leakage inductance energy to the primary side of the coupled inductor. The diode D r is ZCS turned OFF and which can mitigate the reverse recovery problem of the diode. In this state, mode operation can use the following equations At t = t 4 , the switches S 1 and S 2 are ON and all diodes are reverse biased. This mode is shown in Fig. 6(e) and the operation of Mode 1 is repeated.
At t = t 5 , the switch S 1 is ON and the switch S 2 is turned OFF. The diodes D 1 , D 3 , and D o maintain a reverse bias state as shown in Fig. 6 (f). The energy stored in the magnetizing inductance L m1 is transferred to the primary and secondary sides by coupled inductors. The primary side of the coupled inductor transfers energy to capacitors C 2 and C 3 by form- The diode D 2 is reverse biased with the voltage of capacitor C 3 and the diode D 4 and switch S 1 are applied with the voltage difference between capacitors C 3 and C 1 . The diode D r is reverse biased due to the voltage difference between the capacitors C o and C 3 . The equation in this mode can be obtained as In the case of t = t 6 , the current (i D3 ) of the diode D 3 decreases linearly to zero by the leakage inductance L k1 . Therefore, the diode D 3 is turned OFF to ZCS, so there is no reverse recovery problem. The energy stored in the magnetizing inductance L m1 is transferred to the output side by forming a C 3 -N s1 -N s2 -C m -C o loop through the secondary side of the coupled inductor. The operating mode of this mode is shown in Fig. 6 (g) and the current flow can be written as At t = t 7 , the switch S 1 is turned ON and the mode operation is shown in Fig. 6 (h). In the previous mode, the current of diode D 1 is ZCS turned OFF by linearly decreasing the leakage inductance current (i Lk1 ) of the couple inductor. In this mode, the current of the switch S 1 increases linearly by the primary leakage inductance (i Lk1 ) of the coupled inductor. Also, the diode current (i Do ) through the linear reduction of the leakage inductance current (i Ls ) is limited and the ZCS is turned OFF. Therefore, the problem of reverse-recovery of the diode can be alleviated. The proposed converter can reduce the problem of switch loss and diode reverse recovery, and this mode is given as The steady state operation of the proposed converter [DCM] consists of eight modes and Fig. 7 illustrates the theoretical key wave forms. Fig. 8 At t = t 2 , the leakage inductance current (i Lk1 ) of the coupled inductor decreases to zero, and the diodes D 1 and D 2 turn OFF naturally. The operating mode is shown in Fig. 8 (a). The current of the magnetizing inductance (i Lm2 ) decreases linearly and the secondary side of the coupled inductor maintains the N s2 -N s1 -D r -C m loop. Also, the current of the switch S 1 and the leakage inductance L k1 is equal to the summation of the currents of the magnetizing inductances L m1 and L m2 . This mode is similar to Mode 7 [t 6 − t 7 ] in Fig. 8 (c) and the equation can be written as At t = t 3 , the mode starts when the magnetizing inductance current (i Lm1 ) of coupled inductor is zero, as shown in Fig. 8 217112 VOLUME 8, 2020

III. STEADY-STATE ANALYSIS OF PROPOSED CONVERTER
To simplify the circuit performance analysis of the proposed converter, the transient characteristics of the circuit are ignored. The turns ratio (N ) of the coupled inductor is given by Also, the coupling coefficient (k) of the coupled inductor is defined A. HIGH STEP-UP GAIN ANALYSIS In the proposed converter [CCM] operation, two sections of ON (Mode 2 = II ) and OFF (Mode 6 = VI ) of the switch S 1 in Fig. 6 were selected to simplify the steady-state analysis.
When switch S 1 is ON, Mode 2 can be written as Applying a voltage-second balance to the primary and secondary sides of a coupled inductor can be written as Substituting (27)- (29) into (30)-(32) can be written as VOLUME 8, 2020 The voltage of the clamp capacitor C 1 is equal to the voltage gain of the conventional boost converter given by The clamp capacitor C m is given by The power is delivered only when the switch S 2 is ON and the switch S 1 is OFF. The voltage gain (M CCM ) of the proposed converter can be derived as follows: If the coupling coefficient (k) is equal to 1, it is given as Fig. 9 illustrates the result of comparing the voltage gains according to the coupling coefficient (k = 1, 0.9, 0.8) and the duty cycle (D) of the proposed converter. The proposed method can give a high voltage gain (M CCM ) by adjusting turns ratio (N ). It should be noted that the proposed method gives a voltage gain (M CCM ) of ten times when the application ratio D = (is equal to) 0.6 and the turns ratio N = (is equal to) 1.
The DCM operation is similar to the CCM operation, and two sections of ON (Mode 2 = II ) and OFF (Mode 6 = VI ) of switch S 1 in Fig. 7 are selected. The coupling coefficient (k) is assumed to be 1 and applying the voltage-second balance principle, it can be written as In the DCM mode, the voltages of the clamp capacitors C 1 , C m , and C 3 are given as The output voltage V o and the duty cycle D 0 can be expressed as Also, the time constant and maximum current value of the magnetizing inductance (L m = L m1 = L m2 ) are given as In the steady state, the average current value of the capacitor is zero, which can be written as As a result, from (40) and (47)

B. VOLTAGE STRESS ANALYSIS OF POWER DEVICES [CCM]
The voltage stress applied to the switching devices of the proposed converter has to be minimized because it greatly affects the performance, price, and lifetime of the converter as a whole. According to the proposed converter Modes 2, 3, 6 and 7, the voltage stress of the switches S 1 and S 2 is equal to the voltages of the clamp capacitors C 1 and C 2 , and it is given by From (40) and (53), the relationship between the output voltage and the switch voltage can be obtained a which means that the voltage stress can be reduced by increasing the turns ratio (N ).
Since the switch voltage is inversely proportional to (2N + 2) in (54), the rated value of the switch voltage can be lowered by increasing the turns ratio (N ). Therefore, it becomes possible for the proposed method to use a switching device with a low conduction resistance, which is advantageous in conduction loss and price reduction. Since the voltages of the diodes D 1 and D 2 are equal to the voltage of the capacitor C 3 , the followings can be obtained The voltages of the diodes D 3 and D 4 are the same as the voltages of the clamp capacitors C 1 and C 2 and the switch voltages V S1 and V S2 . Therefore, the voltages of the diodes D 1 , D 2 , D 3 , and D 4 are given by From (56) and (57), it can be seen that the voltage of the diode D 1 or D 2 is half of the output voltage V o and the voltage of the diode D 3 or D 4 is a quarter of V o when the turns ratio (N ) is 1, i.e. N = 1. Therefore, by increasing the turns ratio (N ), the diode voltage can be reduced and the voltage gain (M CCM ) can be increased. The voltage stresses of the diodes D r and D o are given by The above equation (58) implies that the voltage of the diodes D r and D o becomes lower than the output voltage when the turns ratio (N ) is increased. Fig. 10 depicts the relationship between the voltage applied to all semiconductor devices of the proposed converter and the turns ratio (N ).

C. CURRENT STRESS ANALYSIS OF POWER DEVICES
Summarizing the amp-second balance based on Modes 2 and in Fig. 6, it is possible to indicate the current magnitude of the semiconductor device (switch S 1 is ON and OFF). The diodes D 2 , D 4 , and D r operate during the period in which the switch S 1 is ON, and the average current is expressed as follows During the period in which the switch S 1 is turned OFF, the diodes D 1 , D 3 , and D o operate and the average current is given by The average current of switches S 1 and S 2 is expressed by Also, the peak currents of switches S 1 and S 2 can be written by I S1 = I S2 = I Lm1 + I D2 + NI Dr = I Lm2 + NI Do + I D1

D. COUPLED INDUCTOR ANALYSIS
The proposed coupled inductor method was applied to increase the voltage gain (M CCM ). For normal energy transfer, the turns ratio (N ) of the coupled inductor is limited as follows The turns ratio (N ) design of the coupled inductor through voltage gain (M CCM ) and duty cycle (D) is given by Also, the conditions for operating with the BCM can be written as As a result, the minimum magnetization inductance (L min ) is given by      Table 1 shows the switch voltage, current, and output voltage according to the leakage inductance (L k1 = L k2 = L k ) change using PSIM simulation software. When the leakage inductance is increased, the ZCS condition is improved due to the falling rate of the switch current, but the voltage gain (M CCM ) is lowered. Therefore, an appropriate design according to the tendency to trade off is required. Fig. 12 shows the switch (S 1 = S 2 = S) voltage, current, and diode current based on Table 1. The leakage inductance can reduce the reverse recovery problem by determining the ZCS condition of the switches and limiting the falling slope of the diodes. It is as follows

E. CAPACITOR ANALYSIS
The capacitors of the VMC and the switched capacitor are responsible for clamping the switch voltage to the capacitor voltage, storing and recycling the leakage inductance energy. The values of these capacitors (C x = q/V Cx ) must be chosen large enough to prevent the formation of a resonant tank circuit due to leakage inductance during one switching period (T s ). It is also possible to reduce the power loss (ESR) by connecting the capacitors in parallel, but an appropriate design is required due to the increase in size, volume and cost [31], [36]. Considering the output power, switching frequency (fs), and maximum voltage ripple ( V Cx ) of the capacitors, the capacitance should satisfy the following conditions

F. CIRCUIT PERFORMANCE COMPARISON
To clearly illustrate the advantages of the proposed converter circuit, the conventional high step-up converters [30]- [34] and the proposed converter are compared through Table 2. The proposed method requires two power switches, six diodes, and two cores as the same as [30] and [31]. Howerver, the conventional converters require additional coils [30], [31], [34] or cores [32], [33]. As a result, if the coil and the core are added, there is a problem that not only complicated wiring but also loss, volume and cost increase. It should be noted that the converter of [34] uses eight diodes whereas the proposed method and the methods of [30], [31], and [33] imploy six or less diodes. If an additional active clamp switch is used then the corresponding gate driver circuit is required to control the switch, so the high step-up converter [32] is the most complex. Based on Table 2, the proposed converter can be considered to be the most advantageous in terms of design cost. From Table 2 it can be seen that for the usual case of N = 1 the maximum voltage stress of output diodes of the proposed method is 0.5V o as the same as those of [33], [34] whereas those of [30]- [32] are lager than or equal to 0.75V o . The maximum voltage stress of swiches of the proposed method is 0.25V o as the same as the conventional methods [30]- [34] for the usual case of N = 1. Generally, the low voltage stress of the output diode has a great advantage in improving efficiency in high power applications.

G. LOSS ANALYSIS
The total loss of the proposed converter can be written as P Total_Loss = P D_Loss + P S_Loss + P L_Loss .
The core loss can be expressed as (P c (f ( B)) = 0.136W/cm 3 ; V L = 21.3cm 3 ) The copper losses are divided into the primary and the secondary sides of the coupled inductor, which are expressed as (I L1_pri._rms = I L2_pri._rms = 8.76A; I L1_sec._rms = I L2_sec._rms = 6.45A; R dc = 32 m ) P L_copper = 2 · P L1_pri._copper + 2 · P L1_ sec ._copper The total losses of the coupled inductor can be written as  The loss analysis diagram of the proposed converter can be given as Fig. 13 based on the theoretical analysis and the parameters in Table 3 VOLUME 8, 2020

IV. EXPERIMENTAL VERIFICATION
The proposed topology is composed of front-end applications through V in and V o prototypes as shown in Table 3.
Two coupled inductors of the proposed prototype circuit use a toroidal core (OD508), and the primary and secondary windings are 22:22; N = 1. Fig. 14(a) depicts the system schematic diagram for the hardware and controller of the proposed converter. The experiment was conducted by connecting a power supply (100V/15Ax2set) on the input side and a resistor (1k x8set) on the output side through a switch in parallel. Also, the PI controller (closed loop control) for the PWM gate signal was implemented on the DSP TMS320F28335 chip. Fig. 14(b) depicts a block diagram of the control algorithm for the PI controller. The PI controller used a general voltage control algorithm to stabilize the output voltage (V o = 380V). Fig. 15 shows the input voltage V in and leakage inductance current according to the magnetizing inductance value of the proposed converter. The current change rate of the magnetizing inductance is similar to that given in Fig. 12, and the ZCS condition is formed through the falling rate of the current. Fig. 16 (a) shows the voltage and current waveforms of the switch S in a conventional boost converter. In the case of input voltage 160V and duty cycle (D = 0.6) it achieves 380V equal to the output voltage of the proposed converter. Also, it shows the switching loss through hard switching. Fig. 16 (b) shows the voltage and current waveforms of the switches S 1 and S 2 in the proposed converter. The switch voltage exhibits about 95V at one quarter of the output voltage during the steady state period and the switches are ZCS turned ON under soft switching conditions. Therefore, high efficiency can be achieved by selecting an active switch having a low voltage rating and a low ON-state resistance level. Fig. 17 (a) illustrates the voltage and current waveforms of diodes D 1 , D 2 under a voltage stress of 190V. Fig. 17 (b) shows the voltage and current waveforms for diodes D 3 and D 4 with a voltage stress of 95V. Therefore, the diodes D 1 , D 2 , D 3 , and D 4 can be applied to the proposed converters with low-voltage rated diodes. Also, when the switch is turned OFF, the current passing through the diode automatically turns OFF according to the mode and becomes ZCS turn OFF. Fig. 17 (c) portrays the voltage and current waveforms for the diodes D o and D r . The maximum voltage stress is 190V and it is half of the output voltage. Because the current falling slew rate is controlled by the leakage inductance of the coupled inductor, the diodes D o and D r turn ON and OFF. Therefore, all diodes in the proposed converter implement soft switching to minimize reverse recovery losses and suppress EMI noise. Also, the voltage stress of all diodes is clamped below the output voltage V o , which is in good agreement with the analysis given in the previous section III. Fig. 17 (d) depicts the experimental waveforms of the voltage and current of the capacitors C m and C 3 . During the OFF period of the switch S 2 , the voltage of C m charged by the secondary side of the coupled inductor is equal to the output voltage of the conventional boost converter, and a higher charged voltage can be obtained when the turns ratio (N ) is increased. Fig. 18 (a) illuminates the transient response waveform of the proposed converter under step load variation. The output voltage 380V is maintained while the load changes VOLUME 8, 2020  abruptly from 1kW→400W→1kW. Fig. 18 (b) and (c) show the transient response waveform of the proposed converter under step input voltage variation. The output voltage 380V is maintained while the input voltage changes abruptly from 40V→35V→40V or 40V→45V→40V. Fig. 19 is the hardware picture of the proposed converter. Fig. 20 (a) illustrates the efficiency of the proposed converter at different input and load conditions. The voltage and current of the input and output are measured and calculated using the power analyzer PM3000A. When the input voltage is 35V, the maximum efficiency is 97.28 % and the average efficiency is 95.82%. When the input voltage is 40V, the maximum efficiency is 97.46% and the average efficiency is 96.35%. When the input voltage is 45V, the maximum efficiency is 97.61% and the average efficiency is 96.55%. Therefore, the proposed converter achieves high efficiency within a wide input range and a wide load range including light load. Fig. 20 (b) depicts the difference between the theoretical duty cycle value and the duty cycle value applied in the experiment based on the voltage gain. At light loads, the duty cycle increases by 2.3% and increases with  increasing power. At the maximum power, the duty cycle increases by about 6%. Fig. 21 depicts the switch (V S1 , V S2 , i S1 , i S2 ) and the leakage inductance (i Lk1 , i Lk2 ) waveforms of the proposed converter under light load. Due to the high output voltage, the diodes (CSD10060) in Table 3 prototype circuit specifications were replaced and tested. The switches are automatically ZCS turned ON because the BCM and DCM naturally increase the current of the switches from zero due to the magnetizing inductance. DCM is affected by duty cycle (D), inductor and load resistance (R o ), but CCM has the advantage of being able to control a wide range with only duty cycle (D). In addition, since the inductor and the output side capacitor tend to vibrate during the switch OFF period in DCM, a large ripple current due to the inductor current and parasitic ringing of the semiconductor devices have a problem.  and D = 0.6; R o = 3k ; V o = 516V, a rapid drop in voltage characteristics is observed as the load resistance increases with high output voltage. Table 4 compares the devices of the proposed converter and high step-up converter [30]- [34]. The proposed converter implements high step-up voltage gain with the lowest magnetizing inductance through a high switching frequency. The interleaved coupled inductor boost converters help to reduce inductor and capacitor size by effectively doubling the switching frequency through parallel connection [19]. Therefore, by increasing the switching frequency, the inductor and capacitor can be selected with a small number of products and the size is reduced. This contributes to space saving because the mounting area and height are reduced. Switching losses increase due to the high switching frequency, but the proposed converter can be an effective choice because the switches are ZCS turned ON under soft switching conditions as shown in the experimental results. The voltage stress of the switches is proportional to the output voltage, and switches with lower breakdown voltage are used compared to [30] and [34]. Compared to [32], the number of switches is small. This means that the corresponding gate driver, PCB area, and cost are small. The proposed converter is designed with a margin of 150% because it is driven with a maximum of 500V or more in the DCM. Compared with [30]- [34], diodes with 100%∼200% lower breakdown voltage were used. The proposed converter fully implements the theory and validity of the design values experimentally.

V. CONCLUSION
In this paper, a non-isolated high step-up DC/DC converter suitable for green power system applications was proposed. The proposed converter was designed by combining a coupled inductor method and a switched-capacitor method. This paper analyzed the steady-state performance of the proposed converter and this paper compared the proposed method with conventional methods. Experimental verification was carried out with a 35∼40V input, 380V output, 1kW power prototype circuit. The analysis and experimental results imply that the proposed converter achieves high efficiency within a wide input range and a wide load range including light load.
The characteristics of the proposed converter can be summarized as follows.
1) The voltage gain is high enough for application in green power systems.
2) The voltage stress of the switches and diodes is reduced by the voltage clamped on the switched capacitor.
3) The proposed method requires fewer components than most conventional methods and thus the proposed method is cost effective. 4) The ZCS performance of semiconductor devices is realized by using leakage inductance energy. The proposed method gives performance and efficiency comparable to conventional methods.