Ga-Sn-O Thin-Film Memristor and Analog Plasticity Characteristic

A Ga-Sn-O (GTO) thin-film memristor has been developed, and an analog plasticity characteristic has been observed. First, GTO thin-film memristors are fabricated by depositing three GTO layers in a stacked structure using sputtering. Next, the current-voltage characteristics are measured by varying the maximum applied voltage after a certain negative voltage, the hysteresis is observed, and the switching characteristics are evaluated, which is regarded as that an analog plasticity characteristic is observed. The parametric study is done for the stacked structure and deposition process, and the proposed operating mechanism is that oxygen vacancies reciprocate by applying negative and positive voltages. Finally, the pulse application characteristic shows the long-term potentiation and depression, which presents a practical possibility to utilize the GTO thin-film memristor for neuromorphic systems.

In this study, a GTO thin-film memristor has been developed, and an analog plasticity characteristic has been observed. First, GTO thin-film memristors will be fabricated by depositing three GTO layers in a stacked structure using sputtering. Next, the current-voltage (I-V) characteristics will be measured by varying the maximum applied voltage (Vset) after a certain negative voltage (Vreset), the hysteresis will be observed, and the switching characteristics will be evaluated, which is regarded as that an analog plasticity characteristic is observed. The parametric study will be done for the stacked structure and deposition process, and an operating mechanism will be proposed. Finally, the pulse application characteristic will show the long-term potentiation (LTP) and long-term depression (LTD), which presents a practical possibility to utilize the GTO thin-film memristor for neuro-morphic systems. In comparison with the previous developments, the outstanding advantages of this study are: the device structure is extremely simple where the GTO layers are deposited using one series of sputtering; the constituent materials do not include rare and toxic metals; nevertheless an analog plasticity characteristic appears; and there is a future potential that three-dimensionally stacked structure can be realized by such AOS devices. Particularly, in comparison with our prior work [8], [9], [10], [11], [12], [13], [14], the novel performance achieved in this study is the analog plasticity characteristic, namely, the conductance is dependent on Vset, which is qualitatively different from our prior ones and remarkably suitable for neuromorphic systems.

II. GTO THIN-FILM MEMRISTOR
The GTO thin-film memristor is shown in Fig. 1. First, an Al thin film is deposited on a quartz substrate using vapor evaporation as a bottom electrode. Next, three GTO layers are deposited in a stacked structure using radio-frequency (RF) magnetron sputtering, where the sputtering target is a GTO ceramic whose composition is Ga:Sn = 1:3, the deposition pressure is 1 Pa, and the plasma power is 60 W. The lower, middle, and upper layers are deposited sequentially in the same chamber without breaking the vacuum, the Ar:O 2 flow rates are 20:0, 20:X(variable parameter), and 20:0 sccm, respectively, and the deposition time is 3 min, Y min (variable parameter), and 3 min, respectively, where the deposition speed is roughly 10 nm/min. The lower, middle, and upper layers serve as a protection layer for the bottom electrode, conductance change layer, and protection layer for the top electrode, respectively. Finally, an Al thin film is deposited again using vapor evaporation as a top electrode. The device size is 150 × 150 µm. It should be noted that the GTO thin-film memristor is not subject to thermal treatment.

III. ANALOG PLASTICITY CHARACTERISTIC
The I-V characteristic is shown in Fig. 2. The GTO thin-film memristor has the middle layer deposited with the Ar:O 2 flow rate of 20:10 sccm and deposition time of 10 min. Here, after the voltage applied to the bottom electrode is scanned to Vreset of −4.5 V, the voltage is scanned to Vset and returned to 0 V, and Vset is varied from 2 V to 4 V. The scan rate is sufficiently slow, namely, one scan takes several seconds, and the I-V characteristic is quasi-static. The state during the forward scanning after applying Vreset is defined as low  conductance state (LCS), whereas that during the reverse scanning after applying Vset is defined as high conductance state (HCS). It is found that the hysteresis is observed, namely, I for HCS is larger than that for LCS, and dependent on Vset, namely, I for HCS is larger as Vset is larger.
The switching characteristic is shown in Fig. 3. Here, the conductance (G) is determined by I at V of 0.1 V, and the normalized G, namely, G/initial conductance for LCS (G 0 ), is calculated and plotted as a function of Vset. It is found that G/G 0 for HCS is proportional to Vset, whereas that for LCS is constant. This is regarded as that an ideal property of an analog plasticity characteristic is observed.
The retention characteristic is shown in Fig. 4. Here, after the voltage is scanned to Vreset of −4.5 V, which is indicated by LCS, or after the voltage is scanned to Vset from 2 V to 4 V, which is indicated by HCS, the voltage is held at 0.1 V, and G is measured for 10,000 s. It is found that G is stable for at least several thousand seconds. Although it changes after that, it is because the systematic evaluation is  difficult in the university laboratory, but it can be improved by sophisticated fabrication.
The endurance characteristic is shown in Fig. 5. Here, the voltage is scanned from Vreset to Vset and vice versa, and G is measured 1,000 times. It is found that G is reproduced relatively well at least a hundred times. Although it is not reproduced well after that, it is also because the systematic evaluation is difficult here, and it can be improved.

IV. PARAMETRIC STUDY
The parametric study is shown in Fig. 6. Here, the slope of the switching characteristic, namely, d(G/G 0 )/dVset, is calculated and plotted for each parameter for the stacked structure and deposition process. It is preferable that d(G/G 0 )/dVset for HCS is high, and that for LCS is low and constant. Based on these quantitative standards, the layer number of three layer, Ar:O 2 flow rate of 20:10 sccm, and deposition time of 10 min are selected, whose characteristics have been already shown above.

V. PROPOSED OPERATING MECHANISM
The proposed operating mechanism is shown in Fig. 7. It should be noted that it is still speculative, but we believe the following operating mechanism. The lower and upper protection layers include little extra oxygen and much oxygen vacancies, act as stable conductors, and prevent unwanted interactions from the bottom and top electrodes, which often causes radical problems. Moreover, because the three layers are deposited sequentially in the same chamber without breaking the vacuum, their interfaces are expected to be excellently clean, which guarantees uniform qualities. These are also confirmed by the fact that the layer number of three layer is desired, which is clarified by the parametric study. First, by applying negative Vreset to the bottom electrode, because oxygen vacancies are positively charged, they concentrate to the bottom interface in the conductance change layer. Because oxygen vacancies decrease near the top interface, the conductance change layer becomes insulative there, and G is small. Next, by applying positive Vset, oxygen vacancies are distributed all around the conductance change layer, and the conductance change layer becomes conductive, and G is large. As Vset is larger, G is larger. |Vset| is smaller than |Vreset| and insufficient for oxygen vacancies to concentrate to the top interface. This operation mechanism occurs only when the density of the oxygen vacancies and thickness of the conductance change layer are appropriate, which is clarified by the parametric study. The quantitative appropriate density of the oxygen vacancies is unknown but is that in the middle layer deposited with the Ar:O 2 flow rate of 20:10 sccm, as shown in Fig. 6(b). The quantitative appropriate thickness of the conductance change is that of the middle layer deposited with the deposition time of 10 min, as shown in Fig. 6(c), and roughly 100 nm. As written above, the proposed operating mechanism is still speculative, and there may be others, which will need to be clarified in further analysis. In order to prove that the oxygen vacancies reciprocate, the depth profile must be examined and compared between LCS and HCS, for example, by high-resolution cross-sectional X-ray photoelectron spectroscopy (XPS), that with focused ion beam or cross-section polisher, etc. Although these examinations are not easy because the electrical characteristic changes significantly even if the material structure change slightly, they will be useful to advance this study.

VI. PULSE APPLICATION CHARACTERISTIC
The pulse application characteristic is shown in Fig. 8. Here, a positive pulse of 2.5 V with the width of 0.1 s and period of 1 s is applied 50 times, a negative pulse of −2.7 V with the width of 0.1 s and period of 1 s is applied 50 times, and this routine is repeated. It is found that G gradually increases by continuously applying the positive pulses, which corresponds to LTP, and G gradually decreases by continuously applying the negative pulses, which corresponds to LTD. Moreover, except for the first few routines, the trend of change is almost the same. These results present a practical possibility to utilize the GTO thin-film memristor for neuromorphic systems. The linearity of the conductance change does not seem to be good and should be improved.

VII. CONCLUSION
A GTO thin-film memristor has been developed, and an analog plasticity characteristic has been observed. First, GTO thin-film memristors were fabricated by depositing three GTO layers in a stacked structure using sputtering. Next, the I-V characteristics were measured by varying Vset after Vreset, the hysteresis was observed, and the switching characteristics were obtained, with the retention and endurance characteristics, which is regarded as that an analog plasticity characteristic is observed. The parametric study was done for the stacked structure and deposition process, and the layer number of three layer and appropriate device and process parameters were selected. Next, an operating mechanism was proposed, and it was suggested that oxygen vacancies reciprocate by applying the positive Vset and negative Vreset. Finally, the pulse application characteristic showed LTP and LTD, which presents a practical possibility to utilize the GTO thin-film memristor for neuromorphic systems in the future. We currently have no data on the device-to-device variation, because the systematic evaluation is difficult in the university laboratory, but it should be evaluated to make the parametric study more convincing and to utilize the GTO thin-film memristor for actual use.