A High-Performance 220–290 GHz Micromachined Waveguide Switch Based on Interference Between MEMS Reconfigurable Surfaces

This article presents a highly integrated novel silicon micromachined single-pole-single-throw waveguide switch based on two microelectromechanically reconfigurable switching surfaces (MEMS-RSs), which allows optimizing the switching performance by tuning the interference between the two such MEMS-RSs utilizing integrated electrostatic comb-drive actuators. The switch prototype is implemented with axially aligned standard WR-3.4 waveguide ports with a total footprint of 3 mm×3.5 mm×1.2 mm. The measured blocking (off) state insertion loss (isolation) and return loss, measured between two standard WR-3.4 waveguide flanges, are 28.5–32.5 dB and better than 0.7 dB, and the propagating (on) state insertion and return losses are 0.7–1.2 dB and better than 17 dB in the 220–290 GHz frequency band, respectively. The measured results were in excellent agreement with the simulation data, implying 27.5% fractional bandwidth, which is very close to a full waveguide band performance. For further investigations, two variants of the switching circuit with only a single MEMS-RS and without any MEMS-RSs have also been fabricated. The single MEMS-RS switch achieved the off-state isolation, on-state insertion loss, and return loss of only 11.5–12.5 dB, 0.8–1.3 dB, and better than 12 dB from 220 to 274 GHz, respectively, which clearly indicates the drastic performance improvement of the interference-based double MEMS-RS switch design. Moreover, measurement of the waveguide-only reference structure showed that the waveguide section alone attributed to 0.2–0.5 dB of the measured on-state insertion loss of the double MEMS-RS switch, and the rest is due to the introduction of the MEMS-RSs inside the waveguides.


I. INTRODUCTION
T HERE has been a growing interest in the millimeter-wave (mm-wave) and subterahertz (sub-THz) spectrum in recent years due to emerging applications in short-range radars, high data-rate communication systems, and sensors, as higher resolutions and broader bandwidths can be achieved at higher frequency bands.Moreover, the space industry has increasingly focused on mm-wave and sub-THz frequency ranges to develop lightweight and compact systems for environmental sensing applications.
Silicon micromachining is a compelling fabrication technology that facilitates integrating waveguide circuits at mm-wave and sub-THz frequencies.It is very well suited for implementing highly accurate, micrometer-size lithographically-defined features and allows integrating active and passive components onto a single chip, resulting in very compact systems [1].Siliconmicromachined devices are volume manufacturable with high product uniformity and very low loss due to surface roughness down to a few nanometers.Deep reactive ion etching (DRIE) and sidewall metallization are commonly used in silicon micromachining to realize hollow waveguides, which are preferred over planar transmission lines at sub-THz frequencies due to low insertion loss (IL) and high power handling capability.The lowest IL for hollow rectangular waveguides is reported to be 0.02-0.07and 0.05-0.1 dB/mm for WR-3.4 [2] and WR-1.5 silicon micromachined waveguides [3], [4], respectively, and micromachined waveguides operating up to 2.7 THz have also been demonstrated in [5].
Switches are essential components for reconfigurable circuits.The most basic switching elements are single-pole-single-throw (SPST) switches, which can be utilized as building blocks to implement more complex switching circuits, such as multipolemultithrow and crossover switches.Conventional mechanical waveguide switches, though achieving excellent RF performance, are based on macro-scale mechanics requiring a waveguide section to be moved or rotated by a motor [6], [7], [8], [9], [10], and thus are bulky, heavy, slow, have high power consumption, and cannot achieve a high integration density in waveguide circuits.For instance, despite the single-poledouble-throw (SPDT) waveguide switch recently presented by jet propulsion laboratory (JPL) in [10] has achieved exceptional isolation of better than 75 dB, excellent IL and return loss (RL) of better than 0.6 and 20 dB in the 250-310 GHz frequency band, it has a very slow switching speed and a very high power consumption.
The authors have previously demonstrated an SPST switch, operating based on a single microelectromechanically reconfigurable switching surface (MEMS-RS), implemented for the 60-70 and the 500-750 GHz frequency bands [14], [24].Isolation, IL, and RL of 19-24 dB, 2.5-3 dB, and 6-8 dB, respectively, were reported for the SPST switch operating at 500-750 GHz [14].However, many applications, particularly radiometers, require significantly better RF performance.Although cascading multiple instances of such SPST switches in series improves the isolation of the resulting SPST switch, the performance of the cascaded device may not satisfy the performance requirements needed for designing more complex switching circuits, as cascading does not necessarily improve the IL and RL.Instead, using two sets of MEMS-RSs and tuning the interference between them, utilizing integrated MEMS actuators, results in an excellent improvement in the RF performance, which is experimentally verified and presented for the first time in this article.
The proposed SPST switch in this article utilizes two sets of MEMS-RSs, resulting in a drastic improvement in all three SPST switch's performance criteria (isolation, IL, and RL) by interference effect while maintaining almost full waveguide bandwidth.The implemented switch prototype features axial standard WR-3.4 waveguide interfaces for easy integration in conventional rectangular waveguide-based systems without requiring additional transition to maintain a compact footprint.The performance improvement of the proposed double MEMS-RSs SPST switch is demonstrated by comparing it to a single MEMS-RS SPST switch and a waveguide-only reference structure, which are also fabricated with the proposed switch design on the same mask set.Moreover, the tunable nature of the MEMS-RSs enables the mitigation of fabrication tolerances, leading to the development of a robust SPST switch design.

II. CONCEPT AND DESIGN
Fig. 1(a) shows an overview of the proposed SPST switch, which consists of two MEMS-RSs, two single-stepped Eplane bends at the switching junction, and two E-plane transitions at the input/output ports [25], all integrated on a single silicon-micromachined chip, resulting in a very compact, 3 mm×3.5 mm×1.2 mm large, device.The switch operates based on short-circuiting the dominant mode of rectangular waveguide (TE 10 ) in the blocking (OFF) state while minimally interfering with the wave propagation in the propagating (ON) state [14].The ON-OFF switching mechanism is implemented by the MEMS-RSs, which are controlled by electrostatic combdrive MEMS actuators.Fig. 1(b) shows the configuration of the MEMS-RSs in the propagating and blocking states.A large number of E-plane cantilevers increases the OFF-state isolation (ISO) and negatively influences the ON-state RL and IL.However, a large number of H-plane cantilevers leads to better ON-state RL and IL and deteriorates the OFF-state ISO [14].Considering this tradeoff and the comprehensive parameter study performed in [14], the MEMS-RSs include five H-plane and ten E-plane cantilever rows, resulting in 60 contact points with 10 µm of overlap (l ov ) between the switching cantilevers at the contact area.The MEMS-RSs consist of two sets of switching cantilevers; the first set is fixed, and the second set is suspended and moves in the lateral direction.When the switch is in the propagating state, there is a 20-µm gap between the fixed and suspended cantilevers, which allows the wave to propagate through the MEMS-RSs.However, when the switch is in the blocking state, the suspended cantilevers move toward the fixed ones and block the wave propagation.
The proposed SPST switch geometry is implemented by two sequential MEMS-RSs, which are controlled by comb-drive MEMS actuators.There are the following two reasons for having two sequential MEMS-RSs in each SPST switch.
1) Any reflected power from the MEMS-RSs in the ON state is problematic and degrades the RL of the switch.Thus, the RL of the switch (|S 11 | in the ON state) is minimized by two sequential MEMS-RSs in the waveguide path, which are designed for destructive interference at the input port in the frequency band of interest.2) Utilizing two sequential MEMS-RSs instead of only one MEMS-RS, as presented in [14], in the signal path doubles the isolation of the switch (|S 21 | in the OFF state).However, as the distance between the MEMS-RSs is fixed and imposed by the thickness of the utilized silicon-on-insulator (SOI) wafer, the width of the out-of-plane waveguide section (329.6 µm) and the offset of the out-of-plane waveguide from the end-wall (109.2 µm) are optimized to tune this interference [shown in Fig. 1(c)].The MEMS-RSs are designed to interfere minimally with the wave propagation in the ON state, with the contact gap (g) of 20 µm, to enhance the RL and IL.On the other hand, the switching cantilevers are designed not to rely on electrical contact between the many contact points in the OFF state and are optimized to achieve its OFF state performance even in capacitive contact mode with a contact gap (g) of up to 300 nm.
The switch is designed to be fabricated by siliconmicromachining on four layers of SOI chips, consisting of a handle layer (275 µm), which defines the micromachined waveguide height, a device layer (30 µm), and a buried oxide layer (3 µm).Fig. 1(c) shows a cross-section view of the switching circuit with detailed dimensions of the designed switch.The waveguides are etched on the handle layer, and the MEMS-RSs with their electrostatic actuators are etched on the device layer.The MEMS-RSs, implemented in the device layer, are in-plane (parallel) with the wafer surface.However, they must be oriented perpendicular to the wave propagation direction, which is also in-plane with the wafer surface in a typical micromachined waveguide system.Therefore, the two MEMS-RSs are positioned at the vertical (out-of-plane) waveguide section and sandwiched between two in-plane micromachined waveguides, which necessitates utilizing two stepped E-plane bends at the switching junction for coupling the waves from/to the in-plane waveguides to/from the out-of-plane waveguides [as shown in Fig. 1(c)].Furthermore, to be able to characterize the designed switch, the test ports have to be routed to the device surface, which requires two further Eplane transitions from the reduced-height in-plane waveguides to standard WR-3.4 waveguide ports.These transitions, utilized for the device interface, are designed without any E-plane step in the waveguide's longitudinal cross-section [25], as the fabrication process only permits stepped geometries with steps towards the device layer of the SOI wafer.
In addition to the double MEMS-RSs SPST switch, the fabricated prototype consists of a single MEMS-RS SPST switch and a waveguide-only reference structure on the same chips so that all the variants are fabricated simultaneously and undergo the same fabrication conditions, leading to a more credible comparison between the S-parameters of different variants.Fig. 2 shows an overview of the vertically stacked chips.While the two middle chips (chips #2 and #3) contain the MEMS-RSs and electrostatic MEMS actuators, the topmost (chip #1) and bottommost (chip #4) chips contain the in-plane waveguides (referring to the wafer surface), stepped E-plane bends at the switching junctions, and stepless E-plane input/output port transitions.The fabricated devices have axially aligned standard WR-3.4 waveguide interfaces (864 µm × 432 µm) so that the stacked chips can be mounted directly and aligned to standard WR-3.4 flanges with inner alignment holes without needing intermediate transitions.The inner alignment holes, instead of outer ones, are utilized for chip-to-flange alignment due to the significantly smaller size of each device compared to the outer dimension of a standard flange.One alignment hole is tightly fitted with a circular hole, and the other is elliptically fitted to ensure precise and repeatable alignment with the accuracy of ±5 µm in the x and y directions [23], [26].
Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.For electrostatic robustness, the MEMS actuators are designed in a push-pull configuration, i.e., dual-actuator, to reduce the required travel distance of the MEMS-RSs compared to a single actuator system.Therefore, the switching cantilevers are fabricated at a midstate position (g = 10 µm) in the nonactuated state.This leads to the necessary displacement of 10 µm in each direction, instead of 20 µm, which is designed to occur at the actuation voltage of 40 V.However, the actuators are designed to handle up to 15 µm of displacement to enhance the actuator's robustness against fabrication tolerances.Fig. 3 shows a scanning electron microscope (SEM) image of a MEMS-RS controlled by the push-pull MEMS actuators.The actuating mechanism consists of 4 comb drive sections on each side, in which every section consists of 50 interdigitated comb fingers, and the restoring/suspension mechanism includes 8 parallel 1.5-folded cantilever-beam springs [20], [27], [28].Besides, the natural resonance frequency of the mass-spring system is calculated numerically, and it is around 3 kHz, which is an upper bound for the switching speed.Thus, the switching speed is expected to be in the order of a few hundred microseconds.variations and, as expected, a larger contact gap deteriorates the ISO.The switch operates even in capacitive contact mode with isolation of better than 32 dB and 29 dB if the contact gap remains below 250 nm and 300 nm, respectively.Furthermore, the simulated performance of the single MEMS-RS switch (dashed lines) in the ON and OFF states is also depicted in Figs. 4 and 5, respectively.As can be observed, the ON-state S-parameters are stable (both |S11| and |S21|) against the gap variation, whereas the OFF-state S-parameters depend strongly on the contact gap.According to Fig. 5, the ISO of the double MEMS-RS switch is more than doubled compared to the single MEMS-RS switch at the same contact gap.
Fig. 6 shows the influence of the switching cantilever's width on the ON-state IL and RL (when g = 20 µm) and OFF-state ISO (when g = 300 nm).A thinner cantilever slightly improves the ON-state RL at the cost of decreasing the operation bandwidth and has a negligible effect on the ON-state IL and OFF-state ISO.Therefore, the cantilever's width is chosen to be 5 µm as a compromise between performance, mechanical reliability, and fabrication robustness.
As stated before, the fabrication process only allows the implementation of stepped geometries with the step toward the device layer of the SOI wafer.Therefore, to facilitate characterization, the reduced-height in-plane waveguides (275 µm-height), which are defined by the handle layer, are routed to the top and the bottom surface of the device with stepless E-plane transitions Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.

III. FABRICATION AND ASSEMBLY
All the chips are processed simultaneously on the same 4-in SOI wafer, and all the features are etched in the silicon substrate by the DRIE process.Fig. 8(a)-(j) outlines the fabrication process flow in detail.Three silicon dioxide (SiO 2 ) hard masks for the handle layer and one for the device layer are utilized for the silicon etching.Starting from an SOI wafer, first, the device and handle layers hard-masks are processed and patterned by photolithography and oxide dry etching.Front-to-back and front-to-front mask alignment is checked under a microscope and is better than ±1 µm in both x and y directions.
After processing all the oxide masks, the handle layer is etched all the way down (275 µm) to the buried oxide layer using the third handle layer hard mask.Next, the E-plane steps inside the waveguides are etched, utilizing the second handle layer hard mask.The etching of the steps has been optimized experimentally to achieve the desired etch depth of 106 µm.Then, using the first handle layer hard mask, a shallow clearance area (6 µm) is etched above the dc voltage lines and suspended structures to avoid short-circuiting the voltage lines and stiction of the moving parts.Once the handle layer is processed completely, the MEMS-RSs and electrostatic actuators are etched in the device layer and released by removing the buried oxide layer using vapor hydrofluoric acid (HF).Besides, the vapor HF etches the buried oxide layer isotopically and isolates the voltage pads from the rest of the chip's area, which is the switch's ground pad, by etching the oxide underneath them.Afterward, a thin layer of gold, 200 nm on the device and 1500 nm on the handle layer, is sputtered on the chips, ensuring that the deposited gold is more than the penetration depth at the designed frequency range of 220-290 GHz, to avoid increasing the IL.In fact, the gold thickness is optimized experimentally not to cover the surfaces underneath the dc pads that are not directly exposed; thus, the voltage pads remain isolated to avoid high leakage current or even short-circuiting the electrostatic MEMS actuators.
Finally, the chips are aligned by a vernier scale [shown in Fig. 9(b)] patterned on four corners of the chips [21], [29] and bonded by thermocompression bonding at 200 °C.
Fig. 9(a) shows an optical microscope picture of the fabricated metalized chips before and after bonding.As can be seen, the top and bottom chips (chips #1 and #4) are intentionally smaller, facilitating easy access to the dc voltage pads on chips #2 and #3.Furthermore, Fig. 9(b) shows a zoomed-in picture of only chip #2, along with two SEM images, depicting the electrostatic MEMS actuator and the vernier scale utilized for chip-to-chip alignment.Moreover, Fig. 10(a)-(c) shows three SEM images from the reduced-height in-plane waveguide etched in the handle layer, the stepped E-plane bend at the switching junction with a cross-section view of the step, and the MEMS-RS with zoomed-in views of the switching cantilevers, respectively.The patterns visible at the bottom of the waveguide in Fig. 10(a) and (b) are 6 µm×6 µm etch holes used to release a dummy fall-out structure placed inside the waveguides to protect the profile of the sidewalls.These etch holes, which are demonstrated in detail in [30], have no considerable effect on the RF performance of the switch.The shallow clearance area above the suspended structures is also visible in Fig. 10(a) and (b) and the debris in the cross-section image in Fig. 10(b) is due to the dicing process.

IV. CHARACTERIZATION AND ANALYSIS
Table I shows the measured displacement of the MEMS-RS versus the applied actuation voltage in both blocking (OFF) and propagating (ON) states.The MEMS-RS reaches 10 µm of displacement at 41 V, at which, in the OFF state, the switching cantilevers are either in contact or nearby (capacitive contact

TABLE I MEMS-RSS DISPLACEMENT VERSUS APPLIED VOLTAGE IN THE BLOCKING
(off) AND PROPAGATING (on) STATES mode).Further increasing applied voltage increases the electrostatic force and reduces the contact gap; therefore, the OFF-state S-parameters are measured up to 50 V.In addition, the displacement of the MEMS-RS is measured and recorded up to 15 µm in the ON state, the point at which the stoppers prevent further displacement of the MEMS-RS.The RF measurements are carried out by a Rohde & Schwarz ZVA-24 VNA with a pair of ZC330 frequency extenders.The input/output ports of the fabricated devices are located axially so that they can be mounted directly between two standard WR-3.4 test port adapters.Fig. 11 shows the configuration of the measurement setup, in which the stacked device is aligned to the standard flanges utilizing the inner alignment pins.The required actuation voltages can be applied to the dc voltage pads with needles mounted on dc probe positioners or with wires connected to the dc pads by wire bonding or soldering.As can be seen in Fig. 11, the actuation voltages are applied with five micro-sized semiconductor probe positioners and probe needles due to their fine tips, allowing for accurate positioning and controlled contact with the measurement pads.Moreover, the reference planes are shifted to the test port adapters, i.e., at the surface of the chips, using a standard calibration kit by the thru-offset-short-match calibration method.
The ISO of the double MEMS-RSs SPST switch is measured at different applied voltages (solid lines) and compared to the simulation data (dashed lines) in Fig. 12(a).As can be observed, the measured ISO is between 28.5-32.5 dB and is relatively uniform in the 200-290 GHz frequency band.Mapping the measured results to the simulation data indicates that the average effective contact gap between the switching cantilevers is between 250-300 nm for the fabricated device.Furthermore, according to Fig. 12 In addition, the ISO of the double MEMS-RS switch is measured in the states where only one of the MEMS-RSs is in the OFF state and the other is in the ON state, as shown in Fig. 13.As can be seen, the ISO is better when only MEMS-RS #1 is closed, compared to only MEMS-RS #2 being closed, which is primarily caused by the fabrication tolerances, which are leading to different effective contact gaps.Fitting the measured results to the simulated data implies that the effective contact gap is 200-250 nm for MEMS-RS #1 and 250-300 nm for MEMS-RS #2, both clearly within the design consideration (300 nm).
Moreover, the measured and simulated OFF-state RL of the single and double MEMS-RS switches are shown in Fig. 14, indicating an excellent agreement between the measured results and simulated data.The measured results are associated with the actuation voltage of 50 V for both switches, and the simulated data are shown for the contact gap of 250 nm and 300 nm for the single and double MEMS-RS switches, respectively.As can be seen, both measured and simulated OFF-state RL of the double MEMS-RS switch is better than the single one, which is mainly because of the superior OFF-state ISO [shown in Fig. 13] of the double MEMS-RSs design.
The improving effect of the interference between the MEMS-RSs is also evident in Fig. 15, which compares the measured and simulated ON-state    In addition, Fig. 15(b) shows the measured and simulated ON-state IL of the single and double MEMS-RS switches and the waveguide-only reference structure.The IL of the double MEMS-RS switch is between 0.7-1.2dB at 220-290 GHz, and the IL of the single MEMS-RS switch and the waveguide-only reference structure is between 0.8-1.3dB at 220-274 GHz and between 0.2-0.5 dB at 200-290 GHz, respectively.As can be observed, the measured and simulated ON-state IL of the double MEMS-RS switch is better than the single one, which is due to the better ON-state RL of this structure.Besides, by comparing the measured IL of the double MEMS-RS switch with the waveguide-only reference structure, it can be concluded that 0.5-0.8dB of the IL is caused by introducing the MEMS-RSs into the waveguide, and the remaining is related to the micromachined waveguides.Although the measured results  and the simulation data both follow the same profile, the slight discrepancy between them can be explained by considering the simulated data shown in Figs.4-6 and comparing them to the measured results shown in Figs. 12, 14, and 15.This discrepancy is mainly due to the fabrication tolerances, such as silicon underetching [21] and mask shrinking [23], which lead to thinner switching cantilevers and errors in the electrical contact between the switching cantilevers.
According to measured results, utilizing two MEMS-RSs instead of one and tuning the interference between them by integrated MEMS actuators enhances the operation bandwidth from 54 to 70 GHz and improves all three essential criteria of SPST switches, i.e., ISO, RL, and IL.Due to its excellent performance, the SPST switch can be used in different signal chains such as radars, imaging, medical devices, and telecommunication systems for signal routing and antenna beam shape switching.It also can be utilized to design more sophisticated switching circuits such as SPDT and crossover switches.Table II compares the performance of the presented double MEMS-RS switch with other waveguide switches operating at the millimeter-wave and sub-THz frequency ranges.According to Table II, the presented SPST switch in this article outperforms other state-of-the-art SPST waveguide switches operating in the same frequency band in terms of isolation, IL, RL, and operation bandwidth.>inad V. CONCLUSION A novel SPST switch based on silicon-micromachined waveguides and MEMS technology is presented in this article.The switching mechanism operates based on short-circuiting the dominant mode of the rectangular waveguide by two MEMS-RSs, in which excellent RF performance has been achieved by tuning the interference between two such MEMS-RSs utilizing integrated electrostatic comb-drive MEMS actuators.The measured blocking (OFF) state isolation of the fabricated SPST switch is between 28.5-32.5 dB and is relatively uniform over the 220-290 GHz frequency band.The propagating (ON) state IL and RL, measured between two standard waveguide flanges and including all internal waveguides and port interfaces, are 0.7-1.2dB and better than 17 dB at the same frequency band, respectively.The measured results were in excellent agreement, with the simulation data with the measured fractional bandwidth of 27.5%, which is almost equal to a full waveguide-band performance.

Fig. 1 .
Fig. 1.(a) Overview of the proposed double microelectromechanically reconfigurable switching surfaces (MEMS-RSs) single-pole-single-throw (SPST) switch.(b) Configuration of the reconfigurable switching surfaces in the propagating and blocking states, consisting of five H-plane and ten E-plane cantilever rows (g: gap between the switching cantilevers, l ov : overlap of the switching cantilevers at the contact area).(c) Cross-sectional view of the designed SPST switch with axial standard WR-3.4 waveguide ports and detailed dimensions.

Fig. 2 .
Fig. 2. Overview of the vertically stacked chips.The reduced-height in-plane waveguides and ports are etched in chips #1 and #4, and the reconfigurable switching surfaces and electrostatic actuators are etched in chips #2 and #3.Each prototype contains three devices, including a single and a double microelectromechanically reconfigurable switching surfaces switches and a waveguideonly reference structure.

Fig. 3 .
Fig. 3. Scanning electron microscope (SEM) image of the microelectromechanically reconfigurable switching surface and the electrostatic MEMS actuator, etched on the device layer of the silicon-on-insulator (SOI) chips #2 and #3, with zoomed-in views on the switching cantilevers, stopping mechanism at the distance of 15µm, and comb fingers.

Figs. 4
and 5 show the simulated performance of the double MEMS-RSs SPST switch (solid lines) with different switching cantilever gaps in the ON and OFF states, respectively.It is evident from Fig. 4 that the ON-state RL (|S 11 |) exhibits a dependence, whereas the IL (|S 21 |) remains relatively constant by varying the gap.Besides, according to Fig. 5, even though the ISO (|S21|) depends strongly on the gap between the switching cantilevers at the contact area, the RL (|S11|) does not exhibit significant

Fig. 4 .
Fig. 4. Simulated (a) S 11 and (b) S 21 of the single (dashed) and double (solid) MEMS-RS switches with different contact gaps in the propagating state.

Fig. 5 .
Fig. 5. Simulated (a) S 11 and (b) S 21 of the single (dashed) and double (solid) MEMS-RS switches with different contact gaps in the blocking state.

Fig. 7 .
Fig. 7. Simulated insertion and return losses of the stepless E-plane transition from reduced-height (275 µm) in-plane waveguides to standard WR-3.4 waveguide, utilized for the input/output interfaces, with detailed dimensions.

Fig. 8 .
Fig. 8. Step-by-step illustration of the fabrication process flow.(a) SOI wafer.(b) Device layer hard-mask lithography.(c) First-handle layer hard-mask lithography.(d) Second-handle layer hard-mask lithography.(e) Third-handle layer hard-mask lithography.(f) Full-height handle layer silicon etching, 275 µm.(g) Etching of the E-plane steps inside the waveguides in the handle layer, 106 µm.(h) Shallow silicon etching (clearance area) on the handle layer to avoid short-circuiting and stiction, 6 µm.(i) Device layer silicon etching, 30 µm, and buried oxide removal to release the MEMS structures.(j) Gold sputtering.

Fig. 9 .
Fig. 9. (a) Optical microscope pictures of the fabricated chips before and after thermocompression bonding.(b) Zoomed-in picture of chip #2 with two SEM images showing the electrostatic actuator and the vernier scale used for chip-to-chip alignment.

Fig. 10 .
Fig. 10.Scanning electron microscope (SEM) images showing.(a) In-plane waveguide etched in the handle layer.(b) Zoomed-in view of the stepped E-plane bends at the switching junction, along with a cross-section view of the metalized step.(c) Nonactuated microelectromechanically reconfigurable switching surface positioned in the midstate with a zoomed-in view on the switching cantilevers.

Fig. 11 .
Fig. 11.Configuration of the measurement setup with the stacked device mounted directly on standard WR-3.4 waveguide flanges and actuated with five needles mounted on dc probe positioners.
(b), the measured OFF-state ISO of the single MEMS-RS SPST switch is between 11.5-17.5 dB in the 200-290 GHz frequency band, corresponding to 200-250 nm of average effective contact gap in the simulations.Comparing the measured data of the single and double MEMS-RS switches shows that the ISO has improved by at least 15.5 dB, which is a direct consequence of introducing an extra MEMS-RS to the single MEMS-RS switch.

Fig. 12 .
Fig. 12. Measured (solid lines) and simulated (dashed lines) OFF-state isolation of (a) double MEMS-RSs and (b) single MEMS-RS SPST switches.The simulated data are shown for different contact gaps between the switching cantilevers, and the measured results are shown for different applied voltages.
performance of the single and double MEMS-RS switches and the waveguide-only reference structure.The measured results are associated with the actuation voltage of 42 V, and the simulated data are shown for the contact gap of 20 µm for both switches.According to Fig. 15(a), the measured RL of the double MEMS-RS switch is better than 17 dB at 220-290 GHz (27.5% fractional bandwidth), and the measured RL of the single MEMS-RS switch is better than 12 dB

Fig. 13 .
Fig. 13.Measured isolation of the double MEMS-RS switch when only one of the MEMS-RSs is in the OFF (closed) state, and the other is in the ON (open) state, compared to the measured OFF-state isolation of the single and double MEMS-RS switches.

Fig. 14 .
Fig. 14.Measured (solid lines) and simulated (dashed lines) OFF-state return loss of the single and double MEMS-RS switches.

Fig. 15 .
Fig. 15.Measured (solid lines) and simulated (dashed lines) ON-state (a) return loss and (b) insertion loss of the double MEMS-RS switch compared to the single MEMS-RS switch and waveguide-only reference structure.The measured results are associated with the actuation voltage of 42 V, and the simulated data are shown for the contact gap of 20 µm for both switches.

TABLE II SUMMARIZED
MEASURED PERFORMANCE OF THE PRESENTED DOUBLE MEMS-RSS SINGLE-POLE-SINGLE-THROW (SPST) WAVEGUIDE SWITCH IN THIS ARTICLE, COMPARED WITH OTHER STATE-OF-THE-ART WAVEGUIDE SWITCHES OPERATING IN THE MILLIMETER-WAVE AND SUB-THZ FREQUENCY RANGES