Pulsed Large Signal RF Performance of Field-Plated Ga2O3 MOSFETs

Comparison between pulsed and CW large signal RF performance of field-plated <inline-formula> <tex-math notation="LaTeX">$\beta $ </tex-math></inline-formula>-Ga<sub>2</sub>O<sub>3</sub> MOSFETs has been reported. Reduced self-heating when pulse resulted in a power added efficiency of 12%, drain efficiency of 22.4%, output power density of 0.13 W/mm, and maximum gain up to 4.8 dB at 1 GHz for a 2-<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> gate length device. Increased power dissipation for higher <inline-formula> <tex-math notation="LaTeX">${V} _{\textsf {DS}}$ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">${I} _{\textsf {DS}}$ </tex-math></inline-formula> resulted in a degradation in performance, which, thermal simulation showed, could be entirely explained by self-heating. Buffer and surface trapping contributions have been evaluated using gate and drain lag measurements, showing minimal impact on device performance. These results suggest that <inline-formula> <tex-math notation="LaTeX">$\beta $ </tex-math></inline-formula>-Ga<sub>2</sub>O<sub>3</sub> is a good candidate for future RF applications.

T HE material of β-Ga 2 O 3 with a bandgap of 4.9 eV and large electric breakdown strength of 8 MVcm −1 has garnered great interest in the power conversion community; however, there are also opportunities for RF applications [1], [2]. Ga 2 O 3 features a Baliga's figure of merit (BFOM), which is based on the mobility and bandgap, more than 10× higher than for SiC and 4× higher than for GaN [3]. High breakdown voltages up to 755 V with a high drain current on/off ratio of 10 9 have been demonstrated for lateral Ga 2 O 3 transistors [4]. Johnson's figure of merit (saturation velocity times critical electric field product, vsat·Ec) for high frequency devices is very much comparable to GaN [1], [5]. Manuscript   Green et al. [6] demonstrated RF performance with an output power density (P out ) of 0.23 W/mm along with a power added efficiency (PAE) of 6.3% at 800 MHz. These initial results show promising future for RF electronics based on Ga 2 O 3 , but they also demonstrate the challenges this material system has in terms of thermal management due to its low thermal conductivity. Here we calculate the thermal resistance of Ga 2 O 3 metal-oxide-semiconductor field-effect transistors (MOSFETs) based on a combination of device and thermal simulations. This work demonstrates a comparison of CW and pulsed large signal RF operation for Ga 2 O 3 MOSFETs and the benefit of pulsed IV for circumventing device heating. We also demonstrate that neither surface nor buffer traps have any sizable impact on device performance.
II. SAMPLE DETAILS Devices used in this study were grown on an Fe-doped semi-insulating β-Ga 2 O 3 (010) substrate by ozone MBE with a 1.2 μm unintentionally-doped (UID) epilayer as the starting material [7], [8]. The MOSFET channel was defined by selective-area Si ion implants at multiple energies to form a 0.3-μm-deep box-like profile with a plateau concentration of 3 × 10 17 cm −3 . Source and drain contacts were also doped This work is licensed under a Creative Commons Attribution 3.0 License. For more information, see http://creativecommons.org/licenses/by/3.0/ by Si ion implantation (5 × 10 19 cm −3 ). Capless implant activation annealing was performed at 950°C for 30 min in N 2 ambient. A metal stack of Ti (20 nm)/Au (230 nm), which was annealed at 470°C for 1 min, was used as the ohmic electrode. A 20 nm Al 2 O 3 gate dielectric was then deposited at 250°C by plasma atomic layer deposition, on top of which a 0.4 μm SiO 2 dielectric was formed by chemical vapor deposition. CF 4 RIE gate recess through the SiO 2 was followed by depositions of Ti (3 nm)/Pt (12 nm)/Au (280 nm) for the gate electrode and Ti/Au for a gate-connected field plate. The device had a gate length of 2 μm, gate width of 500 μm, gate-source spacing of 5 μm, gate-drain spacing of 15 μm, and field plate length of 1 μm [4]. The cross-section of the device is shown in Fig. 1(a).

III. RESULTS AND DISCUSSION
DC output characteristics are shown in Fig. 1(b) with a maximum I DS of 58 mA/mm, a threshold voltage (V TH ) of −28 V, and off-state leakage on the order of 10 −9 A/mm. Pulsed measurements with 1 μs pulse length and 1 ms period from a quiescent point of V GS = 0 V and V DS = 0 V, which corresponds to a stress-free steady state, show excellent performance with the maximum I DS increasing to 150 mA/mm. Pulsed operation allowed DC measurements to be extended from V DS = 40 V up to V DS = 80 V without inducing thermal breakdown.
To evaluate the reduction in channel temperature for pulsed versus steady state operation, the transient thermal response was simulated using a 3-D ANSYS finite element model, with dimensions matching the measured device and channel Joule heating distribution obtained from a drift-diffusion model simulated using Silvaco ATLAS [9]. In the thermal simulation anisotropic thermal conductivities of 23.4×(300/T) 1.27 W/m · K and 13.7×(300/T) 1.12 W/m · K in the out-of-plane [010] direction and in-plane [001] direction, respectively, were used [10]. Thermal conductivity values of 3 W/m · K, 1 W/m · K and 315 W/m · K were applied to the Al 2 O 3 , SiO 2 and gold pad layers respectively; standard bulk specific heat capacity and density values were used for all materials. An isothermal boundary condition was applied to the back of the 600-μm-thick Ga 2 O 3 substrate. Thermal simulation results shown in Fig. 2 illustrate that the peak channel temperature is predicted to reach 39°C after a duration of 1 μs and then rise to 325°C after about 100 ms at a constant power dissipation (P diss ) of 2.4 W/mm, which corresponds to the DC condition of V DS = 40 V and I DS = 0.058 A/mm in Fig. 1. For the pulsed IV measurement, the worst-case temperature rise at V DS = 80 V and I DS = 150 mA/mm was about 200°C. The self-heating induces the severe thermal droop observed in the DC IV curve of Fig.1.
Thermally induced current slump could therefore be mitigated by using short pulse lengths; however, traps in the devices could then potentially result in significant current collapse and knee walkout due to surface or buffer traps, with well-known examples for GaN high electron mobility transistors [11]- [13]. The temporal charging of these traps will be a function of varying gate and drain potentials, with charge trapping under the gate leading to a threshold shift and trapping in the gate-source or gate-drain region a drop in transconductance. Using 1 μs pulse length and 1 ms period for gate lag (V GS = −50 V, V DS = 0 V) and drain lag (V GS = −50 V, V DS = 80 V) quiescent points, almost no drop in  output conductance was observed, as illustrated in Fig. 3(a). This has been further confirmed by using the same quiescent bias conditions and measuring transfer characteristics at V DS = 40 V, under which the device showed almost no shift in V TH and minimal drop in transconductance as shown in Fig. 3(b). Hence there is no significant trapping in the gate dielectric or Ga 2 O 3 bulk and only minimal surface trapping for these devices. Trapping is a major challenge in the device community and these results are encouraging given this is a relatively new technology with process and material still evolving. Large signal CW and pulsed RF measurements have been performed based on the stable pulse performance. A large signal measurement system based on a VTD SWAP-X402 receiver has been used. A high-speed FET switch modulates the drain bias during DC while an external modulator with high-speed RF switches has been used to provide the RF pulse [14]. This provides an ability to independently switch the RF and DC drain bias between CW and pulse without making any changes to the sampling regime. At V DS = 40 V and I DS = 5mA (0.4 W/mm power dissipation) for 10 μs duration pulsed RF, a maximum P out of 0.13 W/mm with a PAE of 12% and a drain efficiency up to 22.4% along with a maximum gain of 4.8 dB were obtained at 1 GHz as shown in Fig. 4. By comparison, CW large signal performance dropped to a peak P out of 0.11 W/mm with 19.5% drain efficiency and 9.1% PAE as is also shown in Fig. 4. The difference in RF performance is due to self-heating: based on the thermal resistance extracted from simulation (Fig. 2), the predicted temperature is 58°C during CW RF and 28°C for pulsed RF. The forward available power (P av ) rather than input power into the device (P in ) is plotted since the high reflection at the input in these long gate length devices makes P in noisy and error prone. Rollover in the PAE and degradation in gain beyond an available power of 22 dBm were the reasons to limit the sweep at 22 dBm. These PAE and drain efficiency values exceed those reported by Green et al. for CW RF measurements at 800 MHz [6].
Measurements of CW and pulsed RF at higher operating power and ambient temperature have been performed as is summarized in Table I, together with the calculated channel temperatures at the RF pulse length of 10 μs and for CW. In all cases CW operation showed a lower gain, PAE, drain efficiency and P out than pulsed operation. Despite the fact that the load-pull was optimized for maximum power, meaning that the load is somewhat different in each case, there is a fairly consistent drop in performance with increasing channel temperature. Comparisons of CW and pulsed measurements at V DS = 40 V and 25°C but different bias currents (resulting in power dissipation increasing from 0.4 W/mm to 0.8 W/mm) showed that the difference in P out increased from 1.01 to 1.89 dBm and the gain difference increased from 0.64 to 1.6 dB, but the change in PAE was similar at 2.92% and 3.62%. RF measurements performed at an elevated temperature of 100°C further degraded the performance for CW and pulsed modes with the device not showing any gain consistent with a thermal origin (not shown here).
These results demonstrate good quality epitaxy and surface treatment/passivation. We note that the RF performance is constrained by the long gate length, and that scaling will result in further improvements in P out and gain. These results show a promising future for RF electronics based on Ga 2 O 3 as well as the need for better heat dissipation during DC or CW operation.

IV. CONCLUSION
β-Ga 2 O 3 MOSFETs have been evaluated with pulsed IV and show minimal dispersion during gate and drain lag measurements. Pulsed large signal RF measurements show record PAE of 12% at 1 GHz for a 2μm gate length and 22 μm source-drain spacing. These values can be further improved by scaling of the devices and improved heat management concepts.