Adiabaticity Engineered Silicon Coupler With Design-Intended Splitting Ratio

We design and experimentally demonstrate compact and robust adiabaticity engineered couplers (AECs) with design intended splitting ratios (SRs) for the silicon-on-insulator platform. Adiabatic couplers (ACs) with variable SRs can be designed by output waveguide width-differences. By analyzing the mode-evolution region of ACs, we redistribute the adiabaticity parameter by engineering the taper function to obtain fast quasiadiabatic evolution, thus reducing the device footprints. AECs with design-intended SRs exhibit broad bandwidth and robustness against fabrication variations. We experimentally demonstrate compact AECs with average SRs of 22%/78% and 15%/85% with mode-evolution lengths of 42 <inline-formula><tex-math notation="LaTeX">$\mu$</tex-math></inline-formula>m and 25 <inline-formula><tex-math notation="LaTeX">$\mu$</tex-math></inline-formula>m over a bandwidth of 70 nm, i.e., from 1500 to 1570 for the fundamental transverse electric (TE) mode.


I. INTRODUCTION
S ILICON photonics has become one of the widely used plat- forms in photonic integrated circuits (PICs).In PICs, 2×2 optical power couplers are one of the essential components to realize more complicated functionalities.For applications such as switching [1], wavelength division multiplexing (WDM) [2], signal monitoring [3], feedback circuits [4], and power equalization [5], couplers with design-intended splitting ratios (SRs) other than 50%/50% are required.Directional couplers (DCs) can achieve various SRs with properly designed coupling length and coupling coefficient [6].Multimode interference (MMI) couplers can also be engineered to realize imbalanced SRs [7], [8].However, these devices require precise control of device dimensions due to the mode coupling/interference nature of their operations.On the other hand, the adiabatic coupler (AC) based on mode evolution is a promising choice because of its large bandwidth and fabrication tolerance [9], [10], [11], [12], [13].
To ensure mode evolution, ACs often have larger footprints than DCs and MMIs.There have been numerous efforts to reduce the footprints of ACs, leading to various optimization schemes for the mode evolution region [11], [14], [15], [16], [17].Evolving from the fast quasiadiabatic (FAQUAD) approach in quantum control [18] which only works for a single wavelength, the adiabaticity engineering (AE) [19] method allows one to redistribute device adiabaticity along the mode evolution region for multiple wavelengths using a single control parameter, thus achieving broadband shortcuts to adiabatic mode evolution at shorter lengths than the conventional designs.So far, efforts on AE have been focused on the optimization of 3-dB ACs [19], [20], [21].
In this paper, we use AE to optimize the mode evolution regions of ACs with design intended SRs.We show that various SRs can be obtained by engineering the output waveguide width-difference of ACs.AE is then used to redistribute the device adiabaticity homogeneously, obtaining nonlinear taper functions for the mode evolution region.Using these optimized nonlinear taper functions, broadband adiabaticity engineered couplers (AECs) with design-intended SRs are design and fabricated.The SRs of the fabricated ACs are 22%/78% (with a standard deviation of ±3%, 1500∼1560 nm) and 15%/85% (with a standard deviation of ±1%, 1500∼1570 nm) with mode evolution region lengths of 42 and 25 μm.

II. OPERATING PRINCIPLE
The schematic of the AEC is shown in Fig. 1.The device is designed for fabrication on 220 nm thick silicon-on-insulator (SOI) strip waveguide platform.The AEC is divided into three regions.In the 30 μm long Region 1, two waveguides with widths w 1 = 300 nm and w 2 = 500 nm are brought together using a pair of S-bends to reduce the gap from G = 1.65 μm to g = 200 nm.Region 2 is the mode evolution region of length L, and we set a constant gap g of 200 nm between the waveguides.The waveguides are tapered from 300 nm and 500 nm at z = 0 to 400 − Δw/2 nm and 400 + Δw/2 nm at z = L with a taper function D(z) [D(0) = 0, D(L) = 100 − Δw/2].The waveguide widths are varied according to w 1 + D(z) and w 2 − D(z).We define the waveguide width-difference at the right-hand side of Region 2 as Δw = w 2 (L) − w 1 (L).In Region 3, two s-bends are used to separate the gap from 200 nm to 1.65 μm.The length of Region 3 is 12 μm, chosen to ensure that the losses from the s-bends are negligible.As shown in Fig. 2, when the fundamental mode of port 1 or port 2 is excited, it couples into one of the supermodes of the two-waveguide system on the left-hand side (z = 0) of Region 2. If the adiabaticity criterion is satisfied [14], the excited supermode will adiabatically evolve through Region 2 without coupling to the other supermode.At the end (z = L) of Region 2, the supermodes can have design-intended SRs between the two waveguides depending on Δw.In conventional designs, long linear taper function are used to ensure adiabatic evolution in Region 2. In this work, we optimize D(z) using AE to shorten L.

III. SPLITTING RATIO
At the end of Region 2, by engineering the waveguidedifference Δw, we can vary the supermode profile at z = L, thus changing the power ratio in the two waveguides and realizing design-intended SRs [10], [11].In Fig. 2, we show the supermodes at the beginning (z = 0) and the end (z = L) of the mode evolution Region 2 for different Δw's.At z = 0, due to a large width difference (w 1 = 300 nm and w 2 = 500 nm), the supermodes are concentrated on the individual waveguides, corresponding to inputs from ports 2 and 1.At z = L, for Δw = 0 nm, we observe symmetric and antisymmetric mode profiles for supermodes 1 and 2, with optical powers equally split between the waveguides (SR=50%).As Δw is increased, the distribution of optical field shifts towards waveguide 2 for supermode 1 and towards waveguide 1 for supermode 2, indicating changes in SRs.
We use the eigenmode expansion method (EME) simulations to determine the relationship between the SR and Δw.Considering linear taper functions at sufficiently long L to ensure adiabatic evolution, we excite the TE mode of port 1 at a wavelengh of 1550 nm.At the output, we calculate the power coupled  into Port 3 and Port 4 and then calculate the corresponding SR.Fig. 3 shows the simulated SR as a function of Δw.It is clear that SR can be varied by properly choosing Δw.

IV. FROM FAQUAD TO AE
For each design intended SR, we then optimize its corresponding taper function D(z) using AE.We first introduce the FAQUAD protocol, which is then extended to AE.An adiabaticity parameter that describes the upper limit on the unwanted Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.coupling between supermodes can be defined as [18], [19], [20] where e ± are the supermodes, β ± are the corresponding propagation constants, the ' †' denotes Hermitian conjugate and '•' is the inner product.The adiabaticity parameter c presents a measure of the degree of coupling between e + and e − .From (1), we can see that the device adiabaticity can be engineered by the taper function D(z) through dD/dz.We then impose the condition that the adiabaticity parameter is a constant , which is the FAQUAD protocol.However, the above FAQUAD protocol only applies to a single wavelength.To optimize the device for broadband operation, we first obtain the adiabaticity parameter c λ (z)'s for different wavelengths λ's within the operating range.In the AE protocol, we minimize Σ λ max z {c(z)} by engineering D(z); the condition establishs a limit on the unwanted coupling between the supermodes for all λ's [21].The AE protocol optimizes the taper design to redistribute c(z) along the device to limit the unwanted coupling between the supermodes below a designed level, therefore, the mode evolution can be more efficient.
As an example, we show the process of using AE to optimize the mode evolution region of a AEC with Δw = 20 nm (SR=12%).The AEC is designed at 1550 nm and for the TE polarization.Using a finite difference mode solver, we calculate the device adiabaticity according to (1).The optimized taper function D(z) is then obtained as described and shown in Fig. 4(a).Using port 1 as the input, we simulate light transmission out of ports 3 and 4 as a function of L as shown in Fig. 4(b).Stable splitting is obtained when L is larger than 25 μm (as compared to 60 μm in the conventional linear design).In Fig. 5(a) and (b), we show simulated light propagation using EME in the L = 25 μm AEC with SR=12% by exciting both input ports.Clearly, the input light evolves through the AEC and is split with the design-intended SR for both cases.

V. DEVICE ROBUSTNESS
We then examine the bandwidth and fabrication tolerance of the AECs by EME simulations.In Fig. 6, we show the simulated transmission spectra of AECs with Δw's of 5, 10, and 20 nm, corresponding to SR's of 35%, 26%, and 12% at 1550 nm, with optimized mode evolution region length L's of 52 μm, 42 μm, and 25 μm.From 1500 nm to 1600 nm, the Δw = 5 nm AEC shows SR within 33% and 39% with an average SR of 36%.For the same bandwidth, the Δw = 10 nm AEC shows SR within 23% and 29% with an average SR of 26%, and the Δw = 20 nm AEC shows SR within 9% and 15% with an average SR of 12%.
We also investigate the fabrication tolerances of the AECs by simulating for process variations at a wavelength of 1550 nm.In Fig. 7, we consider variations in feature sizes by applying δw to the total waveguide width for the two waveguides.As shown in Fig. 7, the simulated splitting ratios are not highly sensitive  to process variations.From δw of −25 to +25 nm, the Δw = 5 nm AEC shows SR within 34% and 44% with an average SR of 39%.For the same process variations, the Δw = 10 nm AEC shows SR within 23% and 29% with an average SR of 26%, and the Δw = 20 nm AEC shows SR within 11% and 17% with an average SR of 14%.The process variation of the AECs is ∼0.2% in SR for 1 nm change in δw, which is more than 3 times smaller than that of conventional DCs, which typically have process variation of ∼0.7%/nm [22].

VI. EXPERIMENTAL RESULT AND DISCUSSION
AECs with Δw = 10 and 20 nm (corresponding to theoretical SR's of 26% and 12%) are designed using the procedures outlined above for fabrication and characterization.The optimized mode evolution region length L's are 42 μm and 25 μm for the Δw = 10 and 20 nm AECs, respectively.Using a multi-projectwafer (MPW) service, the AECs were fabricated on an 8-inch silicon-on-insulator wafer with 220 nm crystalline silicon and 3 μm oxide top and bottom cladding using a CMOS-compatible process with ArF 193-nm deep ultraviolet lithography.Fig. 8(a) and (b) show optical microscope images of the fabricated devices.Additional s-bends and pairs of TE grating couplers are attached to the input and output ports of the AECs for device characterization.A pair of grating couplers with a coupler efficiency of −2 dB for the TE polarization were utilized for optical input/output between single mode fiber and silicon chip.
The spectral responses of all fabricated devices were probed using a custom-built interrogation system and characterized using a tunable laser with a wavelength tuning range of 1500 to 1580 nm and a step resolution of 1 pm.The devices were placed on top of a temperature controlled thermoelectric cooler at a temperature of 20 • C for the characterization of transmission spectra.The entire experiment setup was shielded by a cover to ensure environment stability.Measured transmission spectra at bar and cross ports of the AECs were normalized using the procedures outlined in [23] to eliminate the impact of fiber coupling variation to the extracted power splitting ratio.The spectral range of measurement is limited by the bandwidth of grating couplers.
Fig. 8(c) and (d) shows the measured spectra of the fabricated Δw = 10 and 20 nm AECs.The ripples towards the edges of the transmission spectra are not the intrinsic device performance but from the limited bandwidth of grating coupler we utilized as optical I/Os.The 3-dB bandwidth of a grating coupler is typically 40 nm, so light can barely couple into the chip at limits of the spectral range.Instead, the incident light pass through grating coupler may be reflected back by the bottom Si/SiO2 interface and couple into the output fiber.The ripples are most likely the interference effect among grating couplers and bottom interface.Longer wavelengths tend to favor this effect and ripples are thus more pronounced at long wavelengths.Therefore, we use high-order polynomial fits on the spectral data for bandwidth estimations.At the designed wavelength of 1550 nm, the measured SRs are 24% and 14% for the Δw = 10 and 20 nm AECs, respectively.From 1500 nm to 1560 nm, the Δw = 10 nm coupler shows SR within 19% and 25% with an average SR of 22%.From 1500 nm to 1570 nm, the Δw = 20 nm coupler shows SR within 14% and 16% with an average SR of 15%.To improve the device performance at longer wavelength, we could increase the weighting of the longer wavelengths in the AE protocol [21].
The deviations from the theoretical SRs could be attributed to variations in device geometries of the fabricated devices.Variations in device cross-sections, in particular, affect the supermode profiles, thus leading to changes in the power ratio in the two waveguides.Since the AECs are embedded under the chip surface, exposing the AECs to the air for SEM characterizations is challenging.Also due to the gradient width of the AECs, it is also difficult to accurately access the process induced linewidth variation.Nevertheless, according to the process technology information, the linewidth variation from die to die is usually within 10 nm in a wafer, but the linewidth offset could be 20∼30 nm depending on process parameters.We note that the measured SRs at 1550 nm do fall within the simulated fabrication tolerance for δw of −25 to +25 nm, which is in line with the process tolerance.
A comparison of recent results on imbalanced couplers with the AECs in this work is summarized in Table I.It can be seen that the AEC has balanced characteristics of compact footprint and broad bandwidth.

VII. CONCLUSION
We have designed and experimentally demonstrated AECs with design-intended SRs on SOI operating over broad wavelength range (1500 nm ∼ 1570 nm) for TE polarization.Simulations show that design-intended SRs can be obtained by changing the output waveguide width-difference.AE is used to homogenize the adiabaticity parameter of the devices, thus effectively shorten the mode evolution region length.The AECs have large operating bandwidth and good fabrication tolerance.Using optimized taper functions obtained by AE, AECs with SRs of 22% and 15% with mode evolution region lengths of 42 μm and 25 μm are realized.

Fig. 1 .
Fig. 1.Schematic diagram of the adiabaticity engineered coupler (AEC) with design-intended splitting ratio (SR).The taper function D(z) is used to engineer the device adiabaticity parameter.The width difference Δw determines the SR.

Fig. 2 .
Fig. 2. Supermodes of the AECs at the input and the output of Region 2 for different waveguide width-differences (Δw's).

Fig. 4 .
Fig. 4. (a) Optimized taper function for the Δw =20 nm AC.(b) Transmission of the output ports as a function of the mode evolution region length L.

From ( 1 )
, we can see that when the taper evolution dD/dz is designed to be inversely proportional to |e † + • d dD e − |/|β + − β − |, we can make the device adiabaticity parameter a constant.Once dD/dz is obtained, we can integrate it to obtain the optimized function D(z).

Fig. 5 .
Fig. 5. EME simulation of light transmission by exciting (a) port 1 and (b) port 2 of the AEC with SR=12%.The optimized mode evolution region length L is 25 µm.

TABLE I RECENT
RESULTS OF IMBALANCED COUPLERS ON SOI