A −12.3 dBm UHF Passive RFID Sense Tag for Grid Thermal Monitoring

This paper presents an ultra-high-frequency (UHF) passive sense tag for electrical grid and substation thermal monitoring, with emphasis on the tag system optimization and the design of a low power embedded temperature sensor. The designed tag achieves a sensitivity of <inline-formula><tex-math notation="LaTeX">$-$</tex-math></inline-formula>12.3 dBm under active temperature monitoring operation, which is the state of the art among existing UHF passive temperature sense tag products. The sensing inaccuracy of the tag is <inline-formula><tex-math notation="LaTeX">$\pm$</tex-math></inline-formula>2.5 <inline-formula><tex-math notation="LaTeX">$^{\circ }$</tex-math></inline-formula>C (3<inline-formula><tex-math notation="LaTeX">$\sigma$</tex-math></inline-formula>) from <inline-formula><tex-math notation="LaTeX">$-$</tex-math></inline-formula>25 to 120 <inline-formula><tex-math notation="LaTeX">$^{\circ }$</tex-math></inline-formula>C after a low-cost wireless single-point trim. An antimetal ceramic-packaged tag was tested by attaching to a ring main unit in the substation and complete tag system demonstrated robust wireless operation with a sensing distance of 3.5 m. The combination of batteryless and wireless operation, high sensitivity, wide sensing range, and small incident-power-dependent error (<inline-formula><tex-math notation="LaTeX">$\pm$</tex-math></inline-formula>0.2 <inline-formula><tex-math notation="LaTeX">$^{\circ }$</tex-math></inline-formula>C) makes this tag suitable for the target applications.


I. INTRODUCTION
I N ELECTRICAL grid and substation applications, equipment like switchgear, ring main unit, etc., are often the last line of defense for protecting the end users [1]. Failures of the equipment could cause long outages, huge economic losses, and present threats to public safety. As reported in [2], the major causes of grid equipment failures are loose or corroded metal connections, degraded cable insulation, and external agents (e.g., dust and water). Due to ohmic loss at these weak points, potential failures are always accompanied with in- creased thermal signatures over time, which can be predicted via continuous thermal monitoring solutions [3].
As shown in Fig. 1, several existing systems have been proposed for grid thermal monitoring, including infrared radiation (IR) imaging, surface-acoustic-wave (SAW) sensing, fiber-Bragg-grating (FBG) system, and wireless sensor powered by current transformers (CT) [1], [4]- [7]. However, these solutions are still not widely deployed due to their respective drawbacks. For example, the line-of-sight requirement between the sensor and the target object makes it impossible for IR imaging to access all critical thermal spots. As the signal from SAW sensor is weak and in analog form, the strong electromagnetic (EM) noise environment surrounding the substation would jeopardize its operation [3]. Apart from that, as SAW devices are not individually addressable, only a few sensors can be deployed in a confined space [1]. Even though FBG sensing systems are resistant to EM noise, they are sensitive to mechanical strain, which 0278-0046 © 2019 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
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inevitably leads to high packaging cost to alleviate the strain produced during installations [5]. The fragility of the fiber also makes it an inferior choice [6]. Despite the wireless sensing capability of CT-powered systems through harvesting energy from the grid with small transformers [7], the requirement of grid renovation for CT installations, together with repetitive testing with the active grid, ultimately makes this solution impractical.
Considering the large amount of thermal spots inside the electrical grid and substation, the sensing device should be lowcost and easily retrofitted to the equipment (e.g., with bolted connection) [8]. Meanwhile, to avoid adverse effects such as arcing, the device that has direct contact with energized conductors should be cable-and battery-free [3]. Passive ultra-highfrequency (UHF) radio-frequency identification tag (RFID) is capable of meeting all these requirements. However, embedding a temperature sensor inside the tag while achieving the performance required for the target application is a nontrivial task [9]. First, the sense tag must cover the normal busbar operation temperature range of −5 ∼ 110 • C [10], [11]. In addition, in substations (< 360 kV), the maximum restricted approach distance to energized conductors is 2.8 m [12]. Therefore, the sense tag's minimum reading distance should be greater than 3 m to allow safe operation in practical scenarios. This corresponds to a tag IC sensitivity of about −5 dBm (calculated with a 35% rectifier efficiency, zero path loss, 4 W effective isotropic radiated reading power (EIRP), and 0 dBi tag antenna gain [13]). Consequently, the limited sensing range (−40∼85 • C in [15] and −40∼60 • C in [16]) and/or tag sensitivity (+0.85 dBm in [17] and −2 dBm in [18]) in existing passive sense tag products still fall short of meeting the target grid thermal monitoring requirements [15]- [19].
This paper presents a passive sense tag designed for electrical grid thermal monitoring, with contributions including (a) tag system optimization for high sensitivity; (b) a time-domain embedded sensor for wide range and low power sensing; and (c) a sensor data retrieving scheme to avoid power-hungry multitime programmable (MTP) memory writings. The designed tag achieves a −12.3 dBm sensing sensitivity and exhibits only ±0.2 • C incident-power-dependent sensing error. The ceramic packaged tag also shows a nominal sensing distance of 3.5 m when tested on a ring main unit in the substation. The remainder of this paper is organized as follows. Section II presents the tag optimization and sensor design. The measured sense tag performance and package for grid application are introduced in Section III. Section IV concludes this paper.

II. TAG OPTIMIZATION AND SENSOR DESIGN
The designed passive tag system is shown in Fig. 2. It consists of an RF energy harvester, a baseband clock generator, a temperature sensor, a modulator/demodulator, an MTP memory, and a data storage cell. During operation, the capacitor C R (several nF) at the rectifier output stores the harvested RF energy. If the voltage V CR of this capacitor satisfies V CR ≥ V min (minimum operation voltage of the tag, e.g., 1.6 V) within the 2.5 ms startup time (EPC protocol [20]), the tag can be activated. To sustain the operation of this tag, its harvested RF energy should balance its energy consumption V CR (t) · I CR (t)dt in any short time intervals (e.g., a few µs, I CR (t) is the current flowing out of C R ) to avoid large V CR drop. Therefore, different from active-/battery-assisted-passive (BAP) tags and tags with other energy sources [21], [22], the sensitivity of RF-powered tag, P tag (commonly expressed in dBm), is limited by its power consumption instead of its communication link loss, and can be estimated by where η rec is the average rectifier efficiency within a time interval t 1 ∼t 2 . According to (1), the power and spike current of all sensing circuits should be minimized in order to optimize P tag . However, previous efforts on sense tags mainly focused on the designing of low-power sensors [9], [23]. This paper targets on systematic considerations of the sensing block within the tag system to achieve system level co-optimization (e.g., peripheral circuits, control, data processing, and storage).

A. System Power Optimization
Fig . 3 shows the typical reader commands and tag replies in a complete sensing cycle following the EPC protocol [20]. The reader commands include tag select (select), tag inventory (Query, Ack, QueryRep/Nak), and tag access (Sense, MTP read). The corresponding tag replies include the random number RN16, the EPC, and the sensor data. To minimize P tag , our tag system is first optimized by identifying and powering down noncritical circuit blocks in different command phases. For example, the modulator, demodulator, and most of the baseband are disabled during sensing. The optimized power distributed Fig. 3. Optimized tag power profile in different command phases (MTP write power is shown in gray and is eliminated in this paper). The power consumption data of most blocks are from [9], [23].
to different circuit blocks (baseband, demodulator, modulator, baseband clock, power management unit, sensor, sensor clock, sensor digital, and MTP) in different time intervals are also included in Fig. 3. Particularly, though the tag baseband is always active, its power is dynamically optimized according to the received command. After optimization, a large sensor power of 5.5 µW will only degrade the tag sensitivity by 1 dBm compared with its inventory phase. However, if the sensor data have to be stored in the MTP before being read out as in [15] and [16], the large MTP writing power would significantly degrade the tag sensitivity. For example, a writing power of 15 µW [24] will reduce the tag sensitivity by 4.5 dBm based on the data in Fig. 3. Fortunately, as mature communication infrastructures are available in the grid/substation, the sensor data can be transmitted to the base station for storage. In this paper, a custom data storage cell is designed (see Section II-C) so that the sensor data can be retrieved directly by the reader after sensing to ensure the data integrity while avoiding power-hungry MTP writings.
For normal sensing operation, V CR ≥ V min of the tag should always hold. However, the output power P out of a reader is not always constant due to its frequency hopping property [25]. The fluctuation of P out may cause instantaneous V CR drop and increase the error rate of the sensor output. To address this issue, V CR in this tag is charged to a higher voltage V max = 2 V (limited by the process) before sensing. Therefore, the excess energy C R (V max -V min ) can temporarily balance the energy consumed by the tag to achieve robust sensing even when the incoming RF energy is insufficient or absent. For example, when P out = 0, a C R of 100 nF can solely sustain a tag for 4 ms (assuming a 10 µA load and a voltage drop of 400 mV on C R ). In this design, C R is sized to be 1.85 nF to maintain a reasonable chip size. It allows an RF-off time of about 100 µs during sensing, which is comparable to the reader's switching time (e.g., blanking interval) due to frequency hopping.

1) Sensing Principle:
Besides system optimization, a power-efficient sensor is also essential to minimize P tag .A s shown in Fig. 2, under normal conditions, the sensor is mainly supplied by a 1.45 V regulated output V CS (sensor digital is supplied by the 0.8 V V BB for low power). When the reader issues a sensing command, an EN signal from the baseband will activate the sensor and the sensor clock generator (see Section II-B4). Meanwhile, most functions of the baseband are disabled for power savings. At the end of the sensing conversion, the sensor generates a Done signal to bring the baseband back to its normal operation to reply the reader's sensing request.
As reported, MOSFET-based sensors can achieve ultra-low power operation (e.g., 0.1 µW in [26] and [27]). However, because of the carrier mobility and threshold voltage variation of MOSFET, a two-point trim is required to achieve a ±1% precision, which inevitably increases the tag cost [28]. To trim the tag at a single temperature and achieve a wide sensing range, this design uses the vertical substrate parasitic PNP bipolar junction transistor (BJT) as the sensing device. This BJT is available in the adopted standard CMOS process and does not require extra masks for fabrication [28]. As in Fig. 4(a),fortwo diode-connected BJTs Q 1,2 , their base-emitter voltages are complementary-to-absolute-temperature (CTAT), where V T is the thermal voltage (26 mV at 300 K), I c is their collector bias current, I s1,2 are their saturation currents, respectively [28]. If the emitter area ratio of Q 1,2 is p, I s1 = p·I s2 holds. Therefore, the emitter-base voltage difference of Q 1,2 is which is proportional-to-absolute-temperature (PTAT). As shown in Fig. 4(b), one can digitize α∆V be against another voltage V ref = V be1 + α∆V be to obtain the digital representation of the tag temperature [29], where α is a proportional constant to make V ref temperature-independent.

2) Temperature Sensor Front-End:
The designed sensor front-end is shown in Fig. 5. Q 1,2 with an emitter area ratio of p = 4 are the BJT sensing devices and they have the same collector bias current (from the current mirror M p3,p5 , M p4,p6 ). The switches S 1-4 controlled by φ 1 and φ ′ 1 can swap the currents flow into Q 1,2 . During operation, Q 1,2 , a resistor R pt , an amplifier A 1 (current mirror loaded differential pair), MOSFETs M n1,n3 and M p3-p8 form a negative feedback loop (stabilized by R z and C c ). This loop ensures V x = V be2 . Therefore, the voltage across R pt is V x -V be1 =∆V be and a PTAT current I pt (nominal 77 nA) is generated via R pt . To minimize the finite loop-gain induced error in I pt , the positive feedback formed by M p7-p10 and M n3,n4 boosts the overall loop gain to ∼95 dB. The CTAT current I ct = V be1 /R ct (nominal 100 nA) is generated via the V-I converter formed by the amplifier A 2 (folded-cascode topology), a native transistor M nat , and a resistor R ct .I nFig. 5, M p0-p2 and M s0-s2 form a start-up circuit. After power-up, V st = 0 and V bp = V CS , current in M p0 , then gradually discharges V bp , which would finally enable the operation of feedback loop to generate the desired I pt . Once I pt is large enough, V st developed by M s0-s2 turns M p0 OFF and the front-end enters into its normal operation mode. The total current consumption of this front-end is 0.9 µA.
Similar to [31], the systematic nonlinearities of I pt,ct due to the BJT current gain (nominal 2.6) is canceled in the digital back-end using a nonlinear digital to temperature transfer curve (third-order curve fitting). In Fig. 5, mismatches of M p3-p6 , Q 1-2 and offsets in A 1,2 would also degrade the precision of I pt,ct . Typically, dynamic element matching (DEM) and chopping were used to suppress these errors [31]. In this design, instead of performing DEM, four temperature samples with different φ 1 ,φ 2 (from the reader command and decoded by the tag baseband) will be collected, as shown in Fig. 2. In this way, the static device offset errors can be averaged out at the reader side. Moreover, one complete temperature reading is divided into four samples and the charge stored in C R can be refilled before each sampling. As a result, the tag becomes more resistant to random P out drop during frequency hopping [25].

3) Time-Domain Sensor Readout:
The designed sensor readout and its timing diagram are shown in Figs. 6 and 7, which is an improved dual-slope A/D. Before each conversion, the integration capacitor C pos is reset by RST p . Then, the current I pt sen -I ct sen controlled by INTE is used to charge up C pos . Once the voltage V pos exceeds a reference voltage V ov (∼250 mV in this design), the output T pos of the continuous-time comparator A 3 , will be activated (rising-edge), indicating that V pos is high enough to maintain the operation of the current sink I ct sen .After this rising-edge, C pos will be charged for another N clock cycles before being discharged by a reference current I ref sen controlled by DIS p . During discharge, once V pos <V ov , T pos Fig. 6. Dual-slope A/D with ping-pong-like operation. Refer to Fig. 5, I pt sen = I pt and I ct sen = 0.4I ct to utilize the A/D's dynamic range [28]. C pos, neg = 12.5 pF.
where V posm is the voltage on C pos after integration, f sen is the sensor clock frequency, and t dis is the time required to discharge C pos until the falling-edge of T pos is triggered. Therefore If t dis is quantized by f sen , the digital sensor output is D o = t dis · f sen = N · I pt sen − I ct sen I ref sen (6) which is a linear function of temperature. To achieve a sensing resolution of ∼0.1 • Cf r o m−25 to 120 • C, N is designed to be 1600. I pt sen , I ct sen , and I ref sen are 77, 39.75, and 83.9 nA, respectively, at 25 • C. In this readout, another circuit branch consisting of S 1-3 , C neg and A 4 is added. When C pos is being discharged (charged up), I pt sen -I ct sen (I ref sen ) is diverted to charge up (discharge) C neg , and vice versa, which forms a ping-pong like operation. In this way, the conversion speed can be maximally increased by 2× compared to conventional dual-slope A/Ds [30], [31]. Meanwhile, as I pt sen , I ct sen are always conducting; I ref sen is starved by S 4 and M p0 during its idle state; there are no large internal voltage swings. Spike current in the readout circuit is thus minimized. Note that the control signals φ 2 and φ ′ 2 in Fig. 6 is the same as that in Fig. 5 to cancel the comparator offset induced sensing error. The total current consumption of this readout is 0.25 µA.

4) Process-Compensated Clock:
To ensure the validity of (4), V posm must be below 1.25 V in order not to drive the current source I pt sen into its linear region. At 120 • C, I pt sen = 108.5 nA and I ct sen = 27.75 nA, for a nominal V posm of 1.1 V, the required sensor clock frequency f sen is 12 MHz. In the worst case, f sen should be > 10.3 MHz in order to keep V posm < 1.25 V. To meet the requirement of f sen , a low power process-compensated relaxation clock shown in Fig. 8 is proposed. This clock consists of a pseudo-supply generator, a current source I ref clk ,a n integration capacitor C I , and a Schmitt trigger (ST). Under the control of the ST, C I is repetitively charged by I ref clk for a period of T 1 and discharged by R d for a period of T 2 . The ST's effective trip threshold is where V clk is the supply voltage of the ST, V thn4, thp4 are the threshold voltage of M n4, p4 , respectively, and η is the effective tranconductance parameter ratio of M n4, p4 [32]. As shown in Fig. 8, the ST involves a positive feedback that controls the effective length of M n4, p4 . When the ST's output V 1 is logic LOW, M p4.1 is bypassed by M p5 and η is small, the ST's upper trip threshold is V H ≈ V clk -|V thp4 |. When V 1 is logic HIGH, M n4.1 is bypassed by M n5 and η is large, the ST's lower trip threshold is V L ≈ V thn4 . For a small discharge resistor R d = 33 kΩ, T 1 ≫ T 2 holds. Therefore, the output frequency of the ST is If V clk is constant, f sen varies significantly due to the spreads and temperature dependencies of V thn4, thp4 . In this paper, a pseudo-supply generator for the ST is proposed to minimize the variation of f sen .I nFig. 8, with a reference current I b and voltage V b , the pseudo-supply is where V thn1, thp1 and K n1, p1 are the threshold voltage and tranconductance parameter of M n1, p1 , respectively. By designing M n1, p1 and M n4, p4 with the same size, V thn1, thp1 = V thn4, thp4 can hold after dedicated device matching. By replacing V clk in (8) with (9), f sen becomes temperature-, device threshold-, and supply-insensitive (to the first order). In Fig. 8, a negative feedback consisting of M n1,2 is added to stabilize V clk (simulated to be 37 dB dc regulation). Meanwhile, to avoid spike currents during switching, when C I is being discharged, I ref clk is starved via M p2 and R s with I ref clk R s ≈ V L . After compensation, with a nominal output frequency of f sen = 12 MHz, its variation at different corners is reduced from ±49.7 to ±8.5% for a V CS range of 1.2∼2 V and a temperature range of −25∼120 • C, which meets the target requirement. The total current consumption of this clock generator is 1.35 µA (including bias, bias replica, buffer, etc.).

C. Custom Sensing Command and Data Storage
After embedding this sensor into the tag, custom commands are required to trigger the sensor and read the sensor data, which are nonstandard functions in the EPC protocol [20]. For most EPC G2 commands, the maximum link time (e.g., time interval between the end of the command and the beginning of the tag reply) is only 0.262 ms, which is not long enough for one precision temperature conversion. In [15], the select command is utilized to trigger the sensor while it requires 2.5 ms to finish one conversion. Therefore, the sensor enters a "free-running" mode during the command timeout period, which degrades the credibility of the received data as no sensor status information (e.g., insufficient supply, conversion timeout, etc.) can be backscattered. In this paper, a custom scheme using write 0x0F to mimic a sensor trigger command is employed, whose timeout duration is 20 ms [20]. For a conversion time of 3.5 ms of our sensor, all tag status during sensing can be collected to identify malfunctions.
After conversion, the sensor data in [15] and [16] are written into the MTPs, which limits their effective sensing sensitivity to be −9.9 and −4.5 dBm, respectively. As explained in Section II-A, our sensor data will be stored in digital registers instead of MTP before being read out. However, due to the RF field discontinuity between the write and read commands, V CR (see Fig. 2) will drop and the sensor data may lose if not being read within a few milliseconds. To resolve this problem, a custom data storage cell is designed to maximize the data retention time. As shown in Fig. 9, after the digital data D MEMi is shifted into the registers, extra circuits that load C s2 (see Fig. 2) will be cutoff by the signal P LK (logic HIGH, the first bit of D MEMi ) or P ′ LK . To ensure the validation of the last data bit D o 11 , P LK is delayed by t d (21 ns) compared to the last cycle of the shifting clock S CLK [see Fig. 9(b)]. Moreover, a cyclic redundancy check data CRC 2:0 is added in D MEMi for data verification when it is read by the reader. In a new sensing cycle, this storage cell will be reset by M RST from the baseband. After optimization, the maximum leakage current loading C s2 is 93 pA at 120 • C in the worst case. Since the minimum voltage of C s2 is 1.45 V after sensing, the storage cell is designed to operate at a 0.8 V supply. Consequently, a C s2 of 200 pF can retain the sensor data for 1.4 s, which is long enough when compared to the ms-level delays of the reader commands. With this scheme, the designed custom read 0x0F command can acquire the sensor data D MEMo (see Fig. 2) from this cell instead of the MTP.

A. Tag Measurement
The sense tag IC was fabricated in an 8-in engineering wafer in a standard 0.18 µm 1P6M CMOS process. Fig. 10 shows the chip micrograph. The tag input impedance model is shown in Fig. 11, where C B is the bump parasitic capacitance, C C and R C are the measured equivalent tag input capacitance and resistance, respectively. After a conjugate matching of the IC with the antenna at 920 MHz, it is tested with a Voyantic equipment in the EPC Gen2 band (860 to 960 MHz) of the spectrum. As shown in Fig. 12, the achieved tag sensitivity is −12.3 dBm (with a 1.5 dBi antenna gain) at 25 • C to obtain a sensor reading, which corresponds to a chip sensitivity of −10.8 dBm.
To characterize the sensing performance, 54 tags together with a Pt-100 platinum resistor (calibrated to ±0.08 • C precision) were measured in a thermal chamber. The precision of the sense tag is ±2.5 • C( 3 σ)f r o m−25 to 120 • Ca f t e raP T A T trim at 20 • C. In contrast to general purpose sensors, the designed sense tag is calibrated wirelessly by using a reader to read and calibrate multiple tags at the same time. This is more cost-effective than that of [15] with 2-point calibration or [16]    that calibrates the sensor at 5 • C. The trim coefficients are stored in the user bank of the MTP before deployment. After trimming, 260 sense tags are measured at 65.3 • C for verification and all the tags' errors (see Fig. 14) are within the 3σ bounds as observed in Fig. 13.
The tag's dynamic performance is tested with a ∼15 • C thermal ramp. Fig. 15(a) shows the fast-tracking property of the tag to the environment temperature changes. The response discrepancy of the sense tag and the Pt-100 during the transition is mainly due to their different thermal time constants. The sensor noise was characterized by 1000 readings at 25 • C. As shown in Fig. 15(b), the thermal noise limited sensing resolution is about 0.17 • C (rms) without averaging, which is enough for the target applications [3].   For this design, the precharge scheme to mitigate the influences of RF fluctuation and the design of a process-compensated sensor can ensure the robust operation of the tag at different incident power levels. As shown in Fig. 16, only ±0.2 • Ce rror is introduced over a wide 15 dBm incident power range at 30 • C. At higher temperatures, the increased tag power consumption reduces the allowed incident power range, while the power-dependent sensing error is still well-within ±0.2 • C during normal operation. As a result, our proposed solution requires   minimal efforts to calibrate the sense tag during field application. Note that all the wireless measurements performed are sampled intermittently (>10 s interval) to avoid the effect of tag self-heating after a prolonged exposure to strong RF field.

B. Tag Deployment in the Grid
Grid equipment mostly has conductive metal surface that can cause strong EM antenna-matter interaction [33]. Typical tags cannot receive power and/or transmit information after being deployed in the grid. In this paper, an antimetal side-fed microstrip patch antenna on a ceramic substrate (sintered from a mixture of ZrO 2 , MgO, MnO 2 , and Sm 2 O 3 ) is designed. Fig. 17 shows the detailed antenna layout and its critical dimensions, in which the length of the silver plate is fine-grained to achieve a conjugate impedance matching with the designed IC. The relative permittivity ε r of the ceramic is 68 and the thickness of the silver metallic plate is 35 µm (slight variation of the metal thickness does not affect the antenna performance [34]). Fig. 18(a) and (b) is the simulated (in HFSS) three-dimensional (3-D) and  two-dimensional (2-D) (at Phi = 0 • and 90 • ) antenna radiation pattern at 920 MHz, respectively, where an antenna gain of 1.5 dBi is achieved. The designed chip is flip-chip bonded to this antenna [35]. Fig. 19 shows the packaged sense tag with a feature size of 2.5 × 0.9 × 0.3 cm, which can be installed in grid equipment with bolted connection or thermal adhesives. When tested in the ambient environment, the nominal free space sensing distance of this tag is 5.2 m at room temperature with 4 Watts EIRP from a commercial reader (the reader's sensitivity is −85 dBm). With the same reading power, the sensing distance of the tag slightly reduces to 3.5 m when deployed on the Tulip contact of a ring main unit in the substation. Fig. 20(a) shows the measured tag reading distance at different reading angles on a metal surface, where 80% reading distance can be maintained for a 60 • reading span. At high temperatures, the reading distance also slightly decreases due to the higher tag power consumption [see Fig. 20(b)].
The performance of our tag is summarized in Table I and benchmarked with existing commercial passive UHF sense (temperature) ICs and tags. Note that the comparison between different designs is not that straightforward because the overall system functions, fabrication processes, and optimization targets vary significantly. Meanwhile, some designs (e.g., [17], [18]) use system-in-package (SiP) integration instead of system-on-chip solution, which also affects the overall tag performances. In Table I, as the fabrication processes for commercial products are not disclosed, a direct comparison of chip area for different designs is impossible. However, with the decrease of chip fabrication and package cost, the calibration, deployment, and maintenance cost of a sense tag are of more importance compared to its IC area.
The scope of this paper is to optimize the sensitivity and sensing range of the tag. It can be observed that, compared with [15]- [19], this design features the widest sensing range from −25 to 120 • C with a moderate sensing precision (3.45% relative inaccuracy) after a one-point wireless trim. Meanwhile, because of the overall tag system optimization, the low-power sensor design, and the elimination of power-hungry MTP writing, the proposed tag IC achieves a sensitivity of −10.8 dBm during sensing, which is the state-of-the-art among existing passive tag ICs with embedded temperature sensor [15]- [17], [19]. The packaged tag sensitivity however varies greatly with antenna designs. In this paper, the sensitivity of the packaged tag for grid application is −12.3 dBm using a 1.5 dBi ceramic antenna. The sensing resolution of this tag is in line with [19] and is better than [15] and [16]. In Table I, Farsens [18] showed a superior inaccuracy of 0.9% since it employs an SiP solution with an accurate NTC thermistor as its sensing device. This is an advantage of SiP but at the cost of a bulky package (6.6 × 5 × 1.5 cm) and lower sensitivity. The precision of our design is lower than [17] and could be improved by adopting dynamic error correction and nonlinear compensation techniques in the sensing front-end.

IV. CONCLUSION
This paper presented a passive UHF sense tag that had a high sensing sensitivity and a moderate sensing precision. Assisted by the precharge scheme and the process compensation of the sensor clock, a small incident-power-dependent sensing error was also achieved. The ceramic packaged tag exhibits robust operation when tested in a high-voltage substation and achieved a sensing distance of 3.5 m. The combination of passive and wireless operation, high sensing sensitivity, wide sensing range, and small incident-power-dependent error makes this tag a safe and low-cost solution for electrical grid and substation thermal monitoring applications with minimal infrastructure renovations.