DC Current Suppression in CHB-STATCOM With Model Predictive Control Employing Current Transformers

DC current injection is a common problem in grid-tied inverters and it is especially emphasized when current transformers are employed to sense the current. Although the dc current elimination is already addressed for linear controllers, it is not faced for model predictive control. This manuscript proposes a dc current elimination strategy for cascaded H-bridge (CHB) static synchronous compensators controlled by finite control set model predictive control (FCS-MPC). In addition to the two optimization layers of typical FCS-MPC, this article proposes using a third optimization layer to balance the voltages of the clusters. This article demonstrates that the dc current is suppressed by minimizing the imbalance among the clusters through the common-mode voltage. The algorithm is simple to implement and the ac output current is not affected. Validation is carried out with a five-level CHB-STATCOM, and a classical approach is compared.


R cb
Weigth matrix for switching frequency in clusters control.

R ib
Weigth matrix for switching frequency in voltages control.

R i
Weigth matrix for switching frequency in current control.

S * α,β
Optimal switching vector in α, β frame.S * a,b,c Optimal switching vector in a, b, c frame.

S a,b,c
Switching vector in a, b, c frame.s p Individual switching signals vector of phase p. T Clarke transform matrix.V DC  Reference voltages vector for individual voltages control.V DC a,b,c Reference voltages vector for clusters voltages control.

V a,b,c
Set of feasible switching vectors in a, b, c frame.v C(a,b,c) Clusters

I. INTRODUCTION
G RID-TIED converters, such as flexible ac transmission systems (FACTSs) or photovoltaic inverters, inject/absorb ac power to/from the grid [1].Power quality standards fix strict limits to the injected dc current because they increase the losses in distribution transformers, corrode network cabling, and lead to safety issues and saturation of magnetic cores.The imposed limit varies depending on the country.USA and China tolerate 0.5% of the rated output current, U.K. and Australia allow 5 mA, while Germany accepts 1-A dc current [2].DC current injection is caused by asymmetry in gate signals or power transistors outputs, errors in the analog-to-digital converters (A/D), zero-drifting in sensors and signal conditioning circuits [2].These shortcomings can be attenuated by improving the measuring circuit or adding a line-frequency transformer between the converter and the grid, increasing the overall losses of the structure, size, and cost.The worst situation arises when using current transformers (CTs), popular sensors due to their galvanic insulation and electromagnetic capability, ability to deal with large inrush currents and low cost.However, since they are based on the electromagnetic coupling principle, they cannot measure the dc component of the circulating current [3].As a result, a closed-loop control can only stabilize the ac current, ignoring the dc component.
Adopted solutions for detecting and suppressing the dc current usually require the use of extra hardware [4], [5], [6], [7].For instance, in [5], an additional current sensor is added to the dc-link of a transformer-less H-Bridge to detect the dc offset in the output phase currents by measuring the dc-link current during the freewheeling intervals of the unipolar pulse width modulation (PWM) scheme.In [6], the authors proposed a combination of hardware, including an isolated RC attenuation circuit, and software, an estimation scheme through a dc component filtering algorithm, for a single-phase PV inverter.In [7], the CT is equipped with a power amplifier, an additional winding, and a commercial current sensor.The output of the extra sensor is filtered to obtain the dc component used in the closed-loop control.In order to reduce the costs of additional hardware, software-based solutions have been presented in literature [8], [9], [10], [11], [12].In [9], the dc current injected by a static synchronous compensator (STATCOM) [13] employing CTs is estimated by filtering the line-frequency ripple on the capacitors with a moving average filter (MAF).A proportional-integral (PI) regulator was added to the standard control scheme [14], [15] to compensate for the detected dc current.In [10], the dc current injected by a grid-tied inverter is attenuated by controlling the dc component of the output voltage.A PI-based control scheme is employed to compute d, q currents to compensate for this dc voltage.In [11], a proportional-integral-resonant (PIR) controller is proposed to eliminate the dc current of a single-phase PV inverter, which is estimated from the line-frequency ripple of the dc-link voltage.There is a correlation between the dc current injected by the inverter in the grid and the line-frequency ripple on the dc-link voltage [12].
In the control of cascaded H-bridge STATCOMs (CHB-STATCOM), which this work is referred to, the use of a control scheme for balancing the dc-link voltage of the three phases is commonly employed [16], [17], [18].The same approach is also used in finite control set model predictive control (FCS-MPC or direct MPC), which became a popular control technique for power converters during the last decades [19], [20], [21], [22], [23].
In CHB-STATCOM, the control problem is typically divided into two subproblems, i.e., current control and voltages balancing problem [24], [25], [26], [27].Moreover, a third optimization can be added to control the voltages of the clusters [21], [22].In [26], the voltage vector in the a, b, c domain is selected by searching among the redundant vectors to balance the voltages of the clusters.In [21], the voltages of the clusters are predicted to compute the zero-sequence voltage to inject for balancing them.
This article proposes using a cluster balancing strategy for the FCS-MPC of CHB-STATCOM to suppress the dc current injected into the grid.Despite the topic was already addressed for liner controllers, to the best of the authors' knowledge, it was never faced for the MPC strategy.Through extensive theoretical and experimental analyses, this article demonstrates that the dc output current is suppressed by controlling the dc-link voltage of the clusters accomplished by injecting a common-mode voltage.The proposed approach does not require extra sensors and complex filtering procedures, it is simple to implement and computationally efficient.A five-level CHB-STATCOM employing CTs is used as a demonstrator for the proposed algorithm, validating its effectiveness [28].A comparison with a standard PI approach is provided, underlying the differences and stating the advantages of the proposed technique.

II. CASCADED H-BRIDGE STATCOM MODEL
A three-phase, CHB-STATCOM consists of n cascaded Hbridges per phase, each one with a dc-link capacitor C, and connected to the grid through a filter inductor L with internal resistance R, as shown in Fig. 1.The output voltage v p of the phase p is given by the sum of the output voltages of each cell where V DC is the nominal dc-link voltage for each cell, v Cpi is the actual voltage of each and s pi ∈ {−1, 0, 1} is the discrete switching variable which indicates whether the H-bridge is outputting negative, zero, or positive voltage.The discretized equations of the currents and voltages in the stationary reference frame are where T s is the sampling time, i α,β is the α, β current vector, v s(α,β) the grid voltage vector, and S α,β is the inverter switching vector in α, β coordinates; i p is the phase p current.

III. MODEL PREDICTIVE CONTROL FOR CHB-STATCOM
The partially stratified approach is generally used to solve the FCS-MPC for CHB-STATCOM [24], [25], [26], [27], which divides the overall optimization problem into the current control and the individual voltage balancing problems.The first one aims to find the optimum switching vector S α,β in α, β frame by minimizing the tracking current error.The second one aims to find the switching variables s pi that minimize the voltage imbalance among capacitors in the three phases.Generally, the a, b, c vector is computed by transforming S α,β , setting the homopolar component equal to zero.

A. Current Control Problem
The dynamical model in ( 2) is employed in order to solve the following optimization problem: where a tradeoff between the tracking accuracy of the reference current i ref α,β and the switching frequency is computed in every instant k.The 2×2 weighting matrices Q i and R i are tuning parameters and the switching vector must belong to the set of feasible vectors V α,β .

B. Individual Voltages Balancing Problem
The individual balancing control problem aims to select the individual H-bridges switching signals that realize the S * a,b,c , while keeping the voltage balance among the dc-link capacitors.The optimization problem for the individual balancing of phase p ∈ {a, b, c} is the following: where are the n × 1 vectors containing the reference voltages and individual voltages of phase p, respectively, while s p = [s p1 , . .., s pn ] T is the vector of individual switching signals.The matrices Q ib and R ib perform the tradeoff in the optimization; the constraints ensure that the overall switching vector is the one computed in the current control layer.

IV. DC CURRENT INJECTION PROBLEM AND SOLUTION
This work proposes adding a third optimization layer between the first two, aiming to reduce the imbalance among the three clusters and to remove the injected dc current by controlling the output common-mode voltage of the STATCOM.

A. Link Between DC Current and Capacitor Voltage
It is well known in literature that, by using CT sensors, a dc current is generated at the output of the STATCOM [9].Fig. 2 shows a simplified model of the individual cluster of the Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.

STATCOM. The relationship between the current on the ac side i p (t) and the dc-link voltage v
where S p (t) is the switching function, i lp (t) represents the losses in the power circuit, and C eq is the equivalent capacitor of the overall cluster p defined as C eq = C/n.Since this study is focused on the low-frequency behavior of the system, the switching function is assumed to be S p (t) = S cos(ωt + φ S ), by ignoring high-frequency components.When there is a dc current in the ac side, the STATCOM output current is i p (t) = ĨS cos(ωt + φ I ) + I S .By substituting S p (t) and i p (t) in ( 6), it follows that where a constant term, a line-frequency, and a double linefrequency ripples come out.By introducing a dc offset in the switching function S(t), a degree of freedom is added able to reduce the dc current I S .Considering the switching function S p (t) = S cos(ωt + φ S ) + S and substituting it in (6), it follows that the new dc-link voltage dynamics is By comparing ( 8) and ( 6), it turns out that, by adding the S term, the constant term S • I S and the line-frequency ripple S • ĨS cos(ωt + φ I ) appear in the capacitor voltage dynamics.It is clear that the double line-frequency ripple is not affected by S. Since this work refers to STATCOM, which aims to inject quadrature current, the relation φ I φ S ± π/2 holds.Hence, the line-frequency ripple in (8) is It results that the injection of S cannot reduce the amplitude of the line-frequency ripple, but it can reduce the constant part of the voltage dynamics in (8).

B. Minimization of the DC Current
Section IV-A shows that an offset S in the switching function S p (t) affects the cluster voltage dynamics.This subsection shows that minimizing the error between the reference voltage V DC and the cluster voltage v Cp (t) is equivalent to minimizing the dc current I S in steady-state conditions.Hence, the cluster balancing algorithm satisfies two objectives simultaneously: it balances the voltage shared among the clusters and eliminates the dc component at the output current.Considering the system at steady-state condition, because of the effect of the upper voltage control level (the reference generator in Fig. 3), it is reasonable to assume v Cp (t) V DC .Therefore, a minimization of the error between V DC and v Cp (t) is equivalent to minimizing the dynamics in (6) enforcing dv Cp (t)/dt → 0. From (8), it is clear that S cannot minimize the oscillating part and can only reduce the constant part.Thus, the following holds: By solving this optimization problem, the constant part is forced to approach zero, which enforces the law finally, establishing that increasing the dc offset S in the switching function decreases the dc current I S .The result is that the dc current is attenuated by introducing an offset in the switching function with the aim to minimize the error between reference and cluster voltage.

C. Cluster Voltage Balancing for MPC
From (3), the average capacitor voltages v Cp across the three phases are The proposed third optimization layer aims to add a commonmode voltage to balance the cluster voltages of the three phases.
Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.The cluster voltage balancing problem is as follows: where T are the 3 × 1 vectors containing the reference voltages and the cluster voltages, S a,b,c is the switching vector in a, b, c coordinates, Q cb and R cb are tuning matrices.The first term is a weighted norm of the deviation of the three cluster voltages from the reference value.The second term is added to reduce the switching frequency.The matrix T is the 2 × 3 Clarke transformation matrix.The constraint in ( 13) is added to ensure that the injected common-mode voltage does not affect the α, β currents controlled by the first optimization layer.In other words, the offset S is introduced without affecting S, φ S , ĨS , φ I of (8).The algorithm can be simply implemented by searching among the 2n+1 redundant vectors in the a, b, c coordinates, as summarized in the flowchart in Fig. 4. The overall control scheme is summarized in Fig. 3.

V. EXPERIMENTAL RESULTS
The proposed strategy was tested using a five-level CHB-STATCOM in Fig. 5, developed by DigiPower Ltd [28].It consists of two H-bridges per phase, each one equipped with a dc-link capacitor.Each phase of the CHB-STATCOM is connected to the grid through a 230/80-V isolation transformer and a filter inductor.The CHB-STATCOM was designed based on [13] and, since MPC does not produce a fixed switching frequency, the filter inductor was sized based on the average frequency of the dominant high-order harmonics of the output voltage, which was about 8 kHz.The currents are sensed by three TDK CCT27-02 CTs.Table I summarizes the main parameters of the hardware components and the controller.The system comprises a main board with an Intel Cyclone V 5CEBA7F31C8 FPGA, one external board for acquiring the grid voltage, and six H-bridges with the signal conditioning circuits to sample the dc-link voltages.Each H-bridge includes a Texas Instrument TMS320 F28377SPTPT DSP for acquiring the measurements and sending them to the FPGA.Fig. 6 shows the schematic diagram of the experimental system and the overall controller was implemented on the FPGA.The PI reference generator in Fig. 3 was tuned based on [15] and the PI gains were set to 1 and 100, respectively.The MPC parameters were tuned using the empirical method in [22] and [23].The current control was tuned to obtain a current total harmonic distortion (THD) of about 3%, the voltage balancing was tuned to ensure a maximum  voltage ripple of 10% and the cluster balancing guarantees a 0.5-p.u.dc offset, i.e., 0.3 A. Table II lists the weighting factors, where I m is the m × m identity matrix.Fig. 7(a) shows the steady-state output voltage v a (t), current i a (t), and the error Δv Ca (t) = (v Ca (t) − nV DC ) in cluster voltage when a 6-A peak quadrature current is given as reference without cluster balancing.The output voltage presents no dc offset, while a dc current appears in the output current.Fig. 7(b) shows the same waveforms when using the proposed cluster balancing.As shown, the extra control layer adds an offset in the output voltage that eliminates the dc current.

A. Experimental Validation of the Theory
Fast Fourier transform analysis confirms the calculations in Section IV.Figs.8-10 show, respectively, the Fourier spectrum of Δv Ca (t), i a (t), and v a (t), and the amplitude and phase of the low-order harmonics are summarized in Table III.
Without the cluster balancing, the dc-link dynamics is given by (7).In steady-state conditions, the constant part of dv Ca (t)/dt can be assumed to be zero.The switching function S a (t) is equal to the output voltage over the nominal cluster dclink voltage, i.e., S a (t) = v a (t)/(n • V DC ).Hence, substituting the numerical values obtained from experiments in Table III, it comes out that the current loss is Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.From (7) the theoretical line-frequency ripple of the cluster is which is very close to the measured 9.5 ∠−89.56 • V.When the cluster balancing control is introduced, the cluster voltage dynamics is (8).By considering the constant part of the new dv Ca (t)/dt equal to zero and by substituting the values in Table III, the following holds: where the theoretical loss current i la (t) that is compensated is close to the one computed in (14).Indeed, in both scenarios, the dc current produced by the controller compensates the losses, forcing the cluster dynamics to be zero in steady state, verifying the assumption in (10).Substituting the experimental values in Table III into (9), the theoretical line-frequency ripple on the

TABLE IV PI CONTROL PARAMETERS
cluster is which is close to the experimentally measured 9.15 ∠177.42 • .Finally, according to Table III, the double line-frequency ripple in Δv Ca (t) does not change by introducing the cluster balancing control.Indeed, the Fourier analysis verifies the theoretical reasoning presented in Section IV.

B. Comparison With the Existing Method
The dc current elimination problem for CTs sensed CHB-STATCOM controlled by PI regulator was discussed in [9].To the best of the authors' knowledge, the present work is the first one that faces this issue when using MPC.The standard PI control in [14] was implemented on the CHB-STATCOM prototype.To compare the proposed methodology with the PI strategy, the dc current elimination method in [9] was implemented and the steady-state, dynamic response, and computational burden were analyzed.The parameters of the PI control were tuned based on [9] and are listed in Table IV.The carrier frequency of the phase-shifted PWM (PSPWM) was set to 2 kHz to make a fair comparison with the MPC, which had a compatible average switching frequency .
1) Steady-State Performance: Fig. 11(a) shows the output voltage, the current and the cluster ripple on phase a when controlling the CHB-STATCOM with a standard PI regulator.As expected, a dc current component appeared in the output current due to the CTs.Fig. 11(b) shows that the dc elimination method in [9] added a dc voltage on v a (t) to compensate for the dc current on i a (t), and the ripple of the cluster Δv Ca (t), which was −90 • shifted with respect to v a (t) [Fig.11 Fourier analysis and THD were computed to analyze the results, and the main parameters are summarized in Table V.
Both the proposed method and the method in [9] can suppress the dc current in the two different controllers by introducing a dc offset in the output voltage of the CHB-STATCOM.In the carried out test, the PI and the MPC experienced a 2.73 and 3.44-A current offset, resulting in a 58.02% and 47.78% current THD, respectively.By introducing the dc current elimination methods, a dc offset was injected in the output voltage of, respectively, -25 and -72 V, resulting in a THD of 61.62% and 39.17% for the two controllers, underlying that the output voltage was much distorted by the dc component in the MPC.Despite this, the dc current was 0.156 A with the MPC, against 0.23 A with the PI regulator, demonstrating the superior dc current suppression of the MPC.Moreover, the THD of the output current was 4.12% with the MPC and 6.06% with the PI, which confirmed the overall better performance of the MPC.
2) Dynamic Performance: To test the dynamic performance of the proposed method, the cluster balancing control was activated when a dc component was already present in the output current and compared with the PI method.Fig. 12 shows the dynamics of the current in a 10 s time window with a zoom before and after the activation of the dc elimination method for MPC [Fig.12   time 5 s.Fig. 12(c) shows the output currents once they reached the steady state.The dc currents in the three phases were reduced to 0.12, 0.04, and −0.18 A, respectively, which experimentally confirms the validity of the proposed approach.
The same test was carried out for the PI regulator and Fig. 12(b) shows the three-phase current for a standard PI control with a dc offset of 0.7, 0.25, and -0.84A for phases a, b, and c.At time 0 s, the dc current elimination method was activated and, after a 3-s transient, the offset was reduced to -0.37, -0.13, and 0.33 A for phases a, b, and c, as shown in Fig. 12(d).It is possible to note an overshoot before the dc current was suppressed, which is typical of PI regulators.The MPC with the proposed method had a better dc current suppression capability with respect to the PI control and, hence, a better current THD.Fig. 13 shows the step response of the two controllers for a 6-A quadrature current reference.Both the dc current elimination methods did not substantially affect the step performance of the controllers while suppressing the dc component.
3) Computational Burden: The proposed cluster balancing algorithm in Fig. 4 was implemented on FPGA by fully exploiting the parallelism capability of the algorithm using three accumulators and three multipliers.By taking into account the possibility of computing up to three sums and multiplications in parallel and considering the required 2n+1 iterations, the number of clock cycles needed by the algorithm was 12+16n, which resulted in 0.92 μs for n = 2 and 50-MHz FPGA clock frequency.The PI-based dc current elimination required computing a, b, c to d, q transformation, moving average filter and PI regulator for each phase, which resulted in 1.12 μs with the same number of accumulators and multipliers.Therefore, both methods had a minor influence on the overall computational time.The current control of the FCS-MPC was implemented using the method in [27], which proposed a simple solution to the optimization problem by splitting the computations into three distinct steps.At first, a continuous unconstrained minimum problem is solved; then, the solution is projected into the hexagonal space to find the continuous constrained solution; finally, the discrete optimum is computed by searching between the two points close to the constrained solution.The algorithm in [27] is very efficient and does not depend on the number of levels.The individual voltage balance algorithm was implemented, as described in [24].The overall time spent for the FCS-MPC was 12.34 μs, which was compatible with the 11.4 μs spent by the overall PI control.

VI. CONCLUSION
The FCS-MPC for CHB-STATCOM is usually addressed by dividing the overall optimization problem into the current control and the individual voltages balancing problem.This article proposes to add a third optimization layer to balance the voltages of the clusters by using the common-mode voltage.This article demonstrates that minimizing the clusters imbalance leads to the elimination of the dc current injected by the STATCOM.The proposed algorithm is simple to implement, requires few computations, and does not affect the ac output current.The experimental validation of the proposed solution was carried out with a five-level CHB-STATCOM employing CTs.
A comparison with a standard PI approach is given in terms of steady-state, dynamic performance, and computational burden, demonstrating the superior performance of the proposed technique.
(a) and (c)] and PI [Fig.12(b) and (d)].Fig. 12(a) shows the MPC currents when the cluster balancing control was inactive and dc components appeared in the output currents of, respectively, 1.22, 1.2, and -2.54A for phases a, b, and c.At time 0 s, the cluster balancing control was activated and the dc component was gradually reduced and essentially eliminated at Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.
voltages vector.Cp .ĨS Amplitude of the line-frequency component of i p .S Amplitude of the line-frequency component of S p .
C Phase of the line-frequency component of i Cp .φ I Phase of the line-frequency component of i p .φ S Phase of the line-frequency component of S p .S Amplitude of the constant component of S p .I S Amplitude of the constant component of i p .v C Average capacitors voltage.ĨC Amplitude of the line-frequency component of i

TABLE II MPC
CONTROL PARAMETERSTABLE III FOURIER ANALYSIS OF v a (t), i a (t), AND Δv Ca (t).

TABLE V COMPARISON
BETWEEN PI CONTROL AND MPC