MEMS-Enabled Silicon Photonic Integrated Devices and Circuits

Photonic integrated circuits have seen a dramatic increase in complexity over the past decades. This development has been spurred by recent applications in datacenter communications and enabled by the availability of standardized mature technology platforms. Mechanical movement of wave-guiding structures at the micro- and nanoscale provides unique opportunities to further enhance functionality and to reduce power consumption in photonic integrated circuits. We here demonstrate integration of MEMS-enabled components in a simplified silicon photonics process based on IMEC’s Standard iSiPP50G Silicon Photonics Platform and a custom release process.

device selection. The tremendous advances in technology development allow to constantly augment the current technology platforms, and foundries continuously strive to integrate additional technology modules to provide new functionalities.
Currently actively explored avenues for the enhancement of Photonic Integrated Circuit (PIC) technology seek to exploit high-performance materials [6], broaden the optical wavelength range [7], integrate sources [8], enable biosensing [9], or to integrate quantum devices [10]. The integration of such technology modules permits for example to overcome current performance limits, to develop new applications, or to address entirely new concepts.
The combination of high performance photonic components at very large scale allows in particular to conceive fully reconfigurable photonic integrated circuits [11]- [13], providing a path for generic or 'field-programmable' PICs, where a single physical photonic network on-chip can be dynamically reconfigured to address multiple functions [14].
This approach lowers the entry barrier for access to stateof-the art high performance PIC technology, and promises at the same time a drastically reduced development time and associate cost reductions. While implementations of such programmable photonic integrated circuits have recently been demonstrated experimentally [15], they remain at small scale with up to a few tens of components only, limited by the inefficiency of the physical tuning mechanisms available in current PIC technology, such as the thermo-optic or the plasma dispersion effect.
Effectively, the scaling to very large photonic integrated circuits imposes stringent requirements on the performance of photonic components and requires suitable circuit architectures and interfaces. In particular, any photonic device for large-scale integration has to provide (1) low optical loss, (2) small footprint and (3) very low power consumption at the same time. In addition, (4) compatibility with existing technology platforms is required to leverage the high performance achieved by the developments of the past decades.
Photonic devices augmented with micro-electromechanical systems (MEMS) exploit displacement or strain at the microand nanoscale, and provide a promising approach to address these challenges with compact, low-loss and low-power consumption actuation mechanisms. With Silicon Photonic This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see http://creativecommons.org/licenses/by/4.0/ MEMS, strong optical effects can be achieved, and nonvolatile states can be implemented by mechanical latching. In addition, MEMS represent a mature technology, and can be readily integrated in existing technology platforms, reusing the full library of existing high-performance photonic components.

II. MECHANICS FOR PHOTONICS
The integration of MEMS in PICs offers a range of physical mechanisms to precisely control the optical signals on-chip and to provide added functionality. This section introduces the salient aspects of mechanics for photonics, while a comprehensive discussion of mechanical tuning in PICs and the optical functions enabled thereby can be found in [16].
The underlying mechanics can be categorized into three categories: displacement, strain, and buckling/stress (i.e., latching). Displacement of a slab of material or a second waveguide into the evanescent field of an active, light-carrying waveguide can have one of two effects. If the slab material is not phase-matched to the active waveguide, it can induce losses via absorption, radiation, or scattering, or it can modify the effective index of the waveguide. The former produces a variable optical attenuator (VOA) and the latter yields a phase shifter, the effect for both of which is determined by the gap between slab material and waveguide. This gap is also important to the second case, where the movable body is a second waveguide that can now support a guided mode of its own. In this case, the gap, commonly referred to as a coupling distance, can be varied to split various portions of the light between the two waveguides. This type of device is a MEMStunable directional coupler and can be used as an optical power divider, or an optical switch when the power distribution in the branches varies digitally.
Applying compressive or tensile stress to a waveguide introduces a strain, which has been demonstrated to affect both absorption and refraction [17]. When the strain primarily affects absorption, there is mechanical control over loss and the result is once again a type of VOA. Similarly, modulating the refraction corresponds to changing the effective index and the device acts as a phase shifter. The magnitude of the effect depends on the material properties and on the device orientation, as given by the elasto-optic matrix and the mechanical and optical anisotropy. Furthermore, induced strain can also change waveguide length, which can be used for generating additional phase shifts.
The use of buckling/pre-stressed structures and latches is an approach enabled by MEMS that provides access to nonvolatile states, and thus provides a path to ultra-low power consumption devices. In particular, after inducing the desired optical behavior using one of the above mechanisms, the physical state of the system can be preserved without additional consumption of power. Buckling/pre-stressed beams have two mechanically stable states between which they can "snap" when displaced in a way that the induced stress exceeds a geometrically defined critical stress. Contact between complementary hooks on functional and latching structures constitutes another method for maintaining stable states. The hooks on the latch are released to allow the functional body to move and then are locked to prevent a return to the initial position. In both cases, the only energy expenditure is in transitioning between states; thus, the possibility of zero-passive power mechanical latching is an additional benefit of using MEMS to realize optical functions.

III. SILICON PHOTONIC MEMS
The mechanics for photonics discussed in the previous section all rely on actuation mechanisms to generate forces that are translated either to a displacement or to stress. In Silicon Photonics, electrostatic actuation is commonly used, due to its ease of integration, low power consumption, fast response times, large displacements and fine displacement resolution. A variety of additional actuation mechanisms for Photonic MEMS are possible and are discussed in more detail in [16].
Electrostatic actuation relies on the attractive force between the movable and fixed plates of a charged capacitor and the restoring spring force of a suspension. By varying the voltage, the movable plate undergoes displacement, the direction of which depends on the mechanical degree of freedom and the capacitor geometry. Typically, parallel-plate arrangements are employed for out-of-plane movement and the interdigitated finger structure of comb-drives are used for in-plane movement. These devices can be fabricated both in single and stacked photonic layer arrangements.

A. Single Photonic Layer MEMS
In the single photonic layer approach, the actuators are patterned in the device layer of a silicon-on-insulator (SOI) wafer and released in a post-fabrication step through removal of the sacrificial, buried oxide (BOX) layer. Both in-plane [18] and out-of-plane [19] arrangements are possible as shown in Fig. 1.

B. Stacked Photonic Layer MEMS
Stacked photonic layers provide an attractive alternative approach with additional degrees of freedom: a second photonic MEMS layer is deposited atop a sacrificial material, and its vertical spacing to the first layer is defined by a set of mechanical stoppers. However, this approach requires customized process steps which are not part of today's standard silicon photonic platforms, which can provide challenges in temperature budget and processing compatibility with high performance photonic devices. Still, dedicated processes have yielded the largest scale integrated photonic switches to date [20], [21] and digital phase shifters [22]. Further, designs for VOAs [23], analog phase shifters [24], and latched devices [25] have been proposed. A schematic cross-section showing a standard parallel-plate capacitor arrangement, and one using vertical comb-drives and bistable beams is given in Fig. 2.

IV. INTEGRATED DEVICES
In order to integrate Silicon Photonic MEMS devices in existing Silicon Photonics platforms, mechanical degrees of freedom have to be provided. Typically, this requires the selective removal of the cladding oxide around the silicon waveguides in certain areas on the photonic integrated circuit, which enables both movable structures as electrostatic actuation as described in section section III.A. Such a selective removal can be achieved by a dedicated post-processing sequence using standard microfabrication techniques on fully processed Silicon Photonics substrates.
In addition, the introduction of MEMS capability to silicon photonics requires the design and development of a basic set of dedicated components. Among the enabling functions for a MEMS-enhanced silicon photonics platform are lowloss optical transitions between oxide-clad and air-clad silicon waveguides, resonators, couplers and phase-shifters.
This section describes in detail the manufacturing process for MEMS-enabled integrated devices in Silicon Photonics, and introduces design and experimental results for a set of selected basic, fully released components. While the results demonstrate the capability of the MEMS integration approach and the performance of selected MEMS components, the impact of this powerful technique extends far beyond the demonstrated devices, as it will enable photonic circuit designers with a powerful toolbox to conceive an entirely new class of integrated silicon photonic MEMS devices.

A. Fabrication Process
Devices were designed and fabricated in a simplified version of IMEC's iSiPP50G standard silicon photonics technology platform [2], [26], where several process modules (such as for modulators, detectors and metal routing) have been omitted to speed up process development while maintaining full passives functionality as well as topology and surface finish which are representative for the full process. The release process was developed and performed at the Center of MicroNanoTechnology (CMi) at EPFL [27]. A graphic representation of the release process is shown in Fig. 3.
The fully processed 200 mm silicon photonics wafers are first diced into 12 coupons, each of which consists of four dies (22 mm × 24 mm). The coupon size is chosen for ease of handling and minimizing process development risks. Although process development and MEMS release were performed on coupon-and chip-level, all process steps are wafer-level compatible, allowing direct transfer to a foundry and also to include wafer level packaging for hermetic sealing at a later stage.
After a thorough removal of the photoresist (PR) layer used as a protective layer for transport, coupons are subjected to atomic layer deposition (ALD, Beneq TFS200) of 50 nm Alumina (Al 2 O 3 ) at 200 • C, during roughly 40 minutes. Alumina serves as an excellent hardmask against vapor HF and its refractive index of 1.75 in the C-band is sufficiently closely matched to that of silicon dioxide, precluding the need to remove it above grating couplers used for optical I/O. The alumina thickness is selected by considering the tradeoff between the minimum thickness needed to provide sufficient coverage across the wafer topology and the maximum tolerable thickness for reducing its influence on optical behavior. Deposition by ALD produces layers that are uniform, conformal, and pin-hole free, providing excellent protection against HF vapor attack of any underlying oxide layers.
The patterning of the alumina to open up regions within the MEMS cavities begins with an exposure of the 6 μm thick photoresist (AZ ECI 3027) using direct laser-writing (Heidelberg Maskless Aligner MLA150). A thick photoresist is used to provide adequate coverage of the topology and use of the maskless aligner allows for adjustment of the alumina openings in a layout editing software without the need to create a new physical photomask. The alignment accuracy of the exposure is within ± 600 nm, which is adequate for the positioning of the release windows. Next, the alumina is etched in an inductively coupled plasma etcher where a 10% overetch is added to ensure that the alumina is fully removed in regions where the oxide should be exposed to the vapor HF.
Post-etch PR removal starts with a 2-minute low-power oxygen plasma strip to remove the topmost layer and is followed by a full 15-minute immersion in a heated liquid remover (Remover 1165 at 70 • C). The final step is an additional oxygen plasma strip to ensure no PR-based residues remain. Dicing of the coupons into individual chips is performed using an automatic dicing saw (Disco DAD321).
Vapor phase HF (SPTS uEtch) is chosen for the removal of the oxide to reduce the risk of stiction and because liquid phase HF can attack aluminum, which is typically used in metallization layers for bondpads. The release process takes upwards of 4 hours and is performed at a low chamber pressure (80 Torr) in a sequence of 12 cycles, each of which includes a stabilization period, an etch sequence, and a purge/pump step to remove the water byproduct of the etch. The process is repeatable and designed to be fully compatible with the iSiPP50G platform. The vapor phase HF does not attack the bond pads and the alumina passivation sufficiently protects the MEMS cavity sidewalls lining the back-end-of-line (BEOL) stack.

B. Experimental Characterization
A schematic representation of the characterization setup is depicted in Fig. 4(a). It includes a tunable laser (Agilent 8164A) with tuning range from 1460 nm to 1580 nm, a detector module, a polarization controller, a fiber array with 127 μm fiber pitch, and a pair of electrical probe tips. The polarized light from the tunable laser is guided by a single mode fiber, and it couples vertically to the photonic circuit. An efficient  fiber to chip light coupling is enabled by an integrated grating coupler on the chip. After on-chip propagation, the light is out-coupled from the chip to another fiber in the fiber array by means of one of the integrated grating couplers. The outcoupled light is guided by the fiber to the detector where we can extract the transmission spectrum of the integrated device under test. The picture in Fig. 4(b) shows the arrangement of the fiber array, photonic chip and the electrical probe tips. A precise alignment between the fiber array and the integrated grating couplers is essential to have an efficient light coupling between the fibers and the grating couplers. This is accessible by precise tuning of the fiber array position over the chip using a positioning stage with six degrees of freedom. Furthermore, we mount the chip on a stage with three degrees of freedom in positioning which facilitates precise fiber array alignment to the chip. We measure a ∼3.1 dB coupling loss per grating coupler at 1530 nm, which is obtained by measuring light transmission from one grating coupler to the other one with no other integrated device interacting with the propagating light. We use a grating-to-grating transmission spectrum in each set of measurements for normalization of the transmission spectra of the test devices to discard loss introduced by the couplers.

C. Low-Loss Optical Transitions for MEMS Devices
Inside the MEMS cavities the components are exposed to air, while on the remaining areas of the PIC, the photonic devices are fully oxide-clad. When entering the MEMS cavity, the guided light experiences a transition from the air-clad zone to the oxide-clad zone, and consequently a residual amount of light is reflected back due to a mismatch of mode index between the two environments. In addition, for most of the freestanding components in this platform the optical transitions act also as mechanical anchors. Therefore, a careful design of the optical transition in the border of the MEMS cavities is required to first minimize scattering loss and reflection back to the circuit, and secondly, to prevent HF vapor from penetrating into the materials of the BEOL stack atop the oxide cladding.
We implement various types of optical transitions in the platform using: deep-to-shallow tapered waveguide structures, multimode interference (MMI)-based structures, and photonic crystal-based structures. Our inspections show that the deepto-shallow tapered structures have an excellent performance from the standpoint of loss values and blocking HF vapor access to the BEOL. In this kind of transition the guided mode in the freestanding fully etched (wire or ridge) 214 nm high and 450 nm wide waveguide smoothly transfers to a guided mode in a 70 nm shallow etched rib waveguide with the same width. The mode transition happens along a 15 μm long waveguide tapering.
In order to experimentally estimate the loss of an individual optical transition we measure the transmission of a waveguide which passes through several (22,30,42) transitions, and extrapolate the loss for a single transition from a linear data fit. An optical microscope recording of a series of 22 air-tooxide transitions is shown in Fig. 5(a). A closer view of the component in Fig. 5(b) shows the HF vapor etch-front which is stopped by the shallow waveguide at the border of the MEMS cavity. In Fig. 5(c) we present the normalized electric field distribution at λ = 1550 nm while the light passes from the air cladding to the oxide cladding through the optical transition, which is extracted from a 3D finite difference time domain (FDTD) simulation.
The measurements for all three sets of transitions are shown in Fig. 6(a) and performing a linear fit on the case of 22 and 30 transitions yields a loss of approximately 0.07 dB per transition at λ = 1550 nm. The case for 42 transitions is omitted from the regression because the large ripples are both uncharacteristic and unexpected. We attribute this ripple in the spectra to backreflections from the MEMS cavity borders, which build up along the waveguide sections inside the cavity. This effect is expected to be minimized by further design optimization. Our 3D FDTD simulations predict a very low return loss of ∼ 37 dB per transition at λ = 1550 nm due to the waveguide cladding mismatch for this type of optical transition. The simulation results for a single optical transition is presented in Fig. 6(b).

D. Suspended Directional Coupler
Directional couplers are an essential building block of any integrated photonic circuit for photonic routing and power distribution between components. For integration with MEMS in PICs, specific implementation of a freestanding directional coupler is thus required. For such a directional coupler a miniaturized footprint and a low loss performance are paramount to reduce risk of stress-related and release process failures and to keep the overall area of the circuit small in order to scale to circuits with numerous directional couplers.
We here present an implementation of a compact wideband directional coupler for MEMS-enabled integrated components [28]. A representative schematic (not to scale) of the component with the related dimensions is presented in Fig. 7(a).
The coupling region includes two symmetric arms each including two tapered and one narrow straight waveguides.  The tapered waveguides are tapered from 450 nm to 300 nm in width along 10 μm, and are connected to a 300 nm wide and 1 μm long straight section in the middle. The coupling region is supported by a set of 5 μm radius bent waveguides. This leads to a compact footprint of ∼ 30 × 20 μm 2 by taking into account the waveguide anchors (transitions).
Performance of the component is simulated using the FDTD method which gives the transmission spectrum of the component and also the optical mode profile in any desired cross-section. The scanning electron microscope (SEM) image of the realized component is depicted in Fig. 7(b) which exhibits the MEMS release window and the optical air-tooxide cladding transitions waveguides and anchors. The SEM recording reveals a cleanly released component with coupler arms well-positioned with respect to each other (parallel).
The measured and simulated power spectra at the through and drop ports of the coupler are presented in Fig. 8.  The component is designed to operate in telecommunication C-band (1530 nm -1565 nm). Although the port extinction ratio (ER) measured across the full C-band is less than 10 dB, there is a good ER of 25 dB at the targeted 1550 nm wavelength, with a more modest 20 dB ER within a 10 nm bandwidth around this central wavelength. The lowest insertion loss of 0.5 dB is measured at 1560 nm. Note that there is a 5 nm discrepancy between the simulated and the measured spectra which we attribute to possible fabrication bias or residual misalignment between the waveguides.

E. Freestanding Disk and Ring Resonators
Disk and ring resonators serve as spectral filters and switches in photonic integrated circuits [29]. Applying the selective MEMS release process introduced in section IV.A allows to provide mechanical degrees of freedom, and fully integrated optomechanical oscillators [30] can be obtained in this way [31]. In combination with movable waveguides, disk and ring resonators can be explored for MEMS tunable filters with add/drop capabilities. We implemented disk and ring resonators with dimensions as shown in Fig. 9.
The radius of the disk is 10 μm, and the air gap between disk and coupling waveguide is 140 nm. For the ring resonator, the outside and inside radii are 20 μm and 14 μm, respectively, and the air gap is 130 nm. The thickness of coupling waveguides is 214 nm, the 450 nm wide waveguide extends 48 μm with a low loss transition on each side, and with the disk/ring of corresponding radius located at the center. SEM recordings of the coupling waveguide with the disk and ring resonators are shown in Fig. 10.
The disk and ring resonators are anchored to the substrate by central silicon oxide pillars, which have not been fully etched, and the freestanding coupling waveguides are suspended at both sides. Fig. 11. Measured transmission spectra of (a) the disk resonator and (b) the ring resonator with optical Q-factor more than 3.6 × 10 4 and extinction ratio larger than 20 dB.
In the same figure, the oxide cladding opening and release window can clearly be distinguished. Optical characterization is performed by means of the experimental setup described in Section IV-B. The experimentally recorded transmission spectrum of the disk and ring resonators are represented in Fig. 11.
The optical Q-factors are obtained by fitting a Lorentzian function to the resonances. Both for the freestanding disk resonator and the ring resonator, we confirm a high loaded optical Q-factor up to 3.6 × 10 4 with an extinction ratio larger than 20 dB.

F. Photonic MEMS Actuation
Applying the release process introduced in section IV.A to waveguides with MEMS actuation structures allows for MEMS-actuated photonic devices. As introduced in III.A., when using the single-layer approach the displacement can either be in-plane (comb-drive actuators), or out-of-plane (parallel-plate actuation).
In order to validate the platform for actuation, phase shifters were designed and experimentally tested. We have validated such devices on simple SOI wafers with identical device layer / buried oxide layer dimensions previously [32], and slightly different SOI stacks have been reported by other groups as well [33]. Compared to previously reported prototypes based on e-beam lithography, the here reported devices additionally benefit from doping and low-resistance contacts and will enable time responses limited by the mechanics only.
Two representative examples of phase shifters are shown in Fig. 12, using out-of-plane (a) and in-plane (b) actuation respectively. The out-of-plane version relies on parallelplate actuation of a suspended membrane to move a narrow beam downwards away from the waveguiding beam, which decreases the effective index. The in-plane version utilizes comb-drive actuators to increase the gap between suspended waveguide and narrow beam horizontally, similarly reducing the effective index. Both types of phase shifters were inserted in unbalanced Mach-Zehnder Interferometers (MZI) with low Free Spectral Range (FSR), in order to experimentally extract the phase shifts upon actuation. Both variations were inserted in the same short Mach-Zehnder arm, and both rely on a decrease of the effective index. Therefore, the measured spectrum shift is expected to be a red-shift in both cases. Fig. 13 depicts the recorded spectrum over a 10 nm span at the output of the interferometer for two actuator states, allowing to determine the maximum phase shifts obtained for the in-plane and out-of-plane actuated versions. The compact devices can achieve more than π phase shifts for actuation voltages below 30V. Actuation curves could not be reliably measured due to defects in the SOI bonding interface that led to smaller anchors than designed. However, the spectrum shift with applied voltage validates release and electrical routing. Finally, both the extinction ratios and the spectrum envelope did not change with actuation, suggesting very low tuning losses.

V. TOWARDS INTEGRATED CIRCUITS
The experimental demonstration of silicon photonic MEMS components in standard silicon photonics technology are a decisive step towards large-scale circuits based on silicon photonic MEMS. In order to scale from devices to circuits, suitable circuit architectures can be implemented [34], both for application specific circuits [35] and for generic programmable circuits [14]. Fig. 14 illustrates the powerful approach of monolithic integration of Silicon Photonic MEMS in a standard platform [27]: optimized components such as highspeed detectors, enhanced grating-couplers, multi-layer electrical routing and standardized bond pad interfaces can be monolithically integrated with Silicon Photonic MEMS devices, such as electrostatically actuated waveguides or freestanding ring-or disk-resonator devices.
Leveraging the low power consumption of MEMS and the high degree of integration in Silicon Photonics provides an efficient path for dynamic adjustment of the operation point of the silicon photonic MEMS components to optimize the  overall performance of the entire circuit [36]. Particular attention needs to be paid to the optimization for both broadband and low-loss operation, where both the photonic design and release process related optimization provide directions for further improvement.
Large-scale circuits further require a large number of photonic input and output ports, as well as a large number of electrical interfaces for both low-frequency (<10 MHz) for MEMS actuation, as well as for high-speed (>50 GHz) modulators and photodetectors. Current integration efforts are addressing these challenges [37]. The voltage levels required in demonstrated Silicon Photonic MEMS devices are typically several 10s of volts. While discrete electronic amplifier arrays can reach such relatively high voltages, lowering the required actuation voltages can provide benefits in terms of integration with integrated electronic circuits. Avenues to reach lower actuation voltages can be explored with adequate MEMS design, such as by decreasing the spring constant of the waveguide suspension. However, a tradeoff in actuation speed has to be taken into consideration in view of the resulting lower mechanical resonance frequencies. Finally, in order to ensure long-term stability of the MEMS devices [38], sealing of the MEMS cavities is required, for which wafer-level packaging techniques for MEMS [39] can be employed.

VI. CONCLUSION
We have demonstrated the integration of MEMS-enabled devices based on a simplified silicon photonics platform with a custom post-processing module. Experimental results on optical performance for selected representative Silicon Photonic MEMS components including freestanding broadband directional couplers, MEMS-actuated phase shifters, oxideclad to air-clad waveguide transitions and ring/disk resonators are reported.
We demonstrate a MEMS release process that is entirely compatible with IMEC's standard ISIPP50G platform. In particular, no high-temperature processing is required and the release step preserves the integrity of the metal contact pads by virtue of the anhydrous HF etching process.
In summary, Silicon Photonic MEMS provide an outstanding potential for low-power and high-performance photonic devices and lay the ground for efficient integration in very large-scale photonic integrated circuits such as required in programmable and reconfigurable photonic integrated circuits.

ACKNOWLEDGMENT
The MEMS release process was performed at the Center for Micro-and Nanotechnology (CMi) at EPFL. The authors wish to acknowledge the support by the CMi technical staff in the development of the release process.