Radiation-Induced Effects in SiC Vertical Power MOSFETs Irradiated at Ultrahigh Doses

Total-ionizing dose (TID) and displacement damage (DD) are investigated in SiC power MOSFETs at ultrahigh doses with 10-keV X-ray and 3-MeV protons. Significant parametric shifts in the electrical responses of the devices are observed depending on the bias condition and on the fabrication technology. Worst TID degradation is measured when positive gate bias is applied during the irradiation, due to positive charge trapping in the gate oxide. Devices built in the latest generation SiC technology reveal a smaller subthreshold swing degradation, thanks to a better quality of the SiC/SiO2 interface. Devices exposed to 3-MeV protons exhibit a complex combination of TID and DD effects. The <inline-formula> <tex-math notation="LaTeX">$I-V$ </tex-math></inline-formula> and capacitance–voltage (<inline-formula> <tex-math notation="LaTeX">$C-V$ </tex-math></inline-formula>) measurements in SiC power MOSFETs identify two main degradation mechanisms: 1) TID-induced charge trapping in the gate oxide and SiC/SiO2 interface and 2) DD-induced lattice damage in the SiC drift region, which degrades the series resistance of the devices.


I. INTRODUCTION
T HE wide bandgap semiconductor silicon carbide (SiC)   has emerged as the most viable alternative to silicon (Si) for next-generation high-efficiency and high-power-density applications [1], [2].Due to the high thermal conductivity and the higher energy required for ionization and defect formation, compared to Si, SiC technology has been considered very suitable for harsh working conditions, including high-temperature and high radiation exposure applications [3].These advantages make SiC-based power electronics desirable for space, avionics, and nuclear industry, as well as high-energy physics experiments [4], [5], [6], where electronics work at ultrahigh ionizing radiation doses >10 Mrad(SiO 2 ) [7], [8].
In such environments, commercial SiC power devices can be affected by total-ionizing dose (TID) causing the trapping of charges in the dielectric layers, i.e., gate silicon dioxide (SiO 2 ) [9].TID effects in several SiC device types have been explored mostly up to 2 Mrad(SiO 2 ) [10], [11], [12], [13], [14], [15], reporting higher TID degradation with respect to other wide bandgap power technologies, such as AlGaN/GaN HEMTs exposed to doses of 100 Mrad(SiO 2 ) [16].Studies on the previous generation of SiC power MOSFETs produced by the manufacturer used in this work showed a significant negative shift of the threshold voltage and an increase in interface trap density with increased subthreshold swing accumulated doses when exposed to 1.5 Mrad(SiO 2 ) [10].However, the TID response of newer generations of SiC power MOSFETs at ultrahigh doses is still unknown and its exploration may be useful for improving the knowledge of the basic degradation mechanisms occurring in SiC-based devices.
Energetic particles and their collision cascades can also induce displacement damage (DD) effects [9].DD phenomenon displaces atoms from their original crystalline lattice sites generating primary defects, e.g., vacancies, interstitials, and anti-site defects [17].Some of these defects are electrically active as they act as trapping centers, which could significantly modify the carrier transport properties in semiconductors, such as carrier mobility, carrier concentration, and carrier lifetime [18].Most publications investigating DD in 4H-SiC devices consider SiC junction barrier Schottky (JBS) and SiC PiN diodes structures as SiC radiation detectors [19], [20].Only a few experiments have been performed on 4H-SiC power MOSFETs with protons [21], [22], neutrons [22], [23], and electrons [23].The DD-induced degradation of electrical characteristics of transistors may be related to [22]: 1) carrier removal in the n-type drift region due to generation of deep acceptor centers and 2) carrier mobility and carrier lifetime degradation due to the generation of Z1/Z2 centers (bandgap position E C -0.68 eV) and related E2 (E C -0.60 eV) and E3 (E C -0.72 eV) energy levels.
This work explores the TID and DD effects at ultrahigh doses for two different generations of commercial SiC vertical power MOSFETs, exposed to X-rays and 3-MeV protons.The static (I -V ) and dynamic capacitance-voltage (C-V ) characteristics of SiC power MOSFETs have been investigated before and after the exposure.I -V measurements highlight important TID-induced negative shifts of the threshold voltage for both the second and third generations, suggesting buildup of positive charge in the relatively thick gate oxide during both experiments, as discussed in Section III.In addition to TID degradation, DD signatures on the I -V and C-V characteristics of devices tested with 3-MeV protons are presented in Section IV.

A. Devices Under Test
The devices under test (DUTs) are vertical second and third-generation SiC planar-gate MOSFETs fabricated by Cree/Wolfspeed, USA.The devices are designed as a series of multiple cells, which are connected in parallel.Fig. 1(a) shows the 2-D schematic representation of a single cell containing two horizontal channel areas highlighted in red.Secondgeneration devices (CPM2-1200-0080B) have R DS(ON) = 80m and a pitch size of ∼9 µm.The gate oxide is composed of 40-nm SiO 2 .The recommended operational gate-source voltage is in the range of −5/+20 V with a maximum drainto-source voltage of 1200 V.The third-generation devices (CPM3-1200-0075A) have a R DS(ON) = 75m , smaller pitch, and an operational gate-source voltage of −4/15 V with improved SiC/SiO 2 interface quality [33].A common approach for reducing the defect density at the SiC/SiO 2 interface, which is typically two orders of magnitude higher than in Si/SiO 2 [34], is treating the SiO 2 gate oxide with nitrous oxide (N 2 O) or nitric oxide (NO) anneal processes [35].
Bare dies were chosen to directly expose the chip surface to the beam.The devices were soldered on a customized direct bonded copper (DBC) board, as shown in Fig. 1(b).The drain connection was established by the soldering, whereas the gate and source were connected by single aluminum wire bonds with 300 µm diameter, as in Fig. 1(c).

B. Irradiation Condition and Measurement Setups
Two experiments were performed.The first experiment was conducted at the University of Padova, using a 10-keV X-ray irradiator at a dose rate of 3.1 Mrad(SiO 2 )/h for a total exposure time of ∼32 h to reach 100 Mrad(SiO 2 ).All dose values are calculated in Mrad(SiO 2 ).Several gate-bias conditions were applied to the series of SiC MOSFETs during the irradiation: 1) "GND" (V g = 0 V); 2) "Semi-ON" (V g = 5 V); 3) "ON" (V g = 20 V for second gen and V g = 15 V for third gen); 4) "−V g " (V g = −5 V for second gen and V g = −4 V for third gen).
The values of the electric field (E) in the gate oxide for the four conditions were obtained from numerical simulations as 0 V/cm, 1.0 MV/cm, 4.7 MV/cm, and −0.67 MV/cm.The drain and source terminals were biased at 0 V.After the exposure, the devices were annealed with all terminals connected to ground for 24 h at 100 • C.
The second experiment was performed using protons provided by the CN accelerator at the INFN-Laboratori Nazionali di Legnaro, Padova.The proton beam has a kinetic energy of 3 MeV and a penetration range of 53 µm in SiC (ECIF simulations [36]).The beam intensity was monitored with a Faraday cup before and after each exposure in the DUT active area, as well as during the exposure in the area surrounding the DUT.Second-generation devices with R DS(ON) = 80m were tested under "ON"-bias condition (V g = 20 V).The proton irradiations were performed in a vacuum chamber, using a dose rate of 51.6 krad/s, for a total dose of 100 Mrad, equal to a total fluence of 6.7 × 10 13 cm −2 .After the exposure, the devices were annealed under bias (V gs = 20 V and V ds = 0 V) for 24 h at room temperature and 24 h at 100 • C.
For both experiments, the I -V static responses were measured at room temperature before exposure, at several irradiation steps, and after the annealing.Similarly, C-V characteristics were measured at room temperature before and after the irradiations, and after the annealing.The measurements were performed using a Keysight E4990A impedance analyzer.The test fixture Keysight 16047E was used to mount the DUTs.A frequency of 30 kHz was selected as the optimal tradeoff to avoid undesired parasitic effects at higher frequencies and reduce the noise effects at lower frequencies [37].At least two devices were tested for each set of conditions.

C. Evaluation of Electrical Stress Effects
Irradiations with X-rays require about ∼29 h to reach 100 Mrad(SiO 2 ).In order to distinguish degradation induced by electrical stress from that induced by irradiation, the SiC-based MOSFETs were stressed without radiation under the bias conditions for the same amounts of time required for devices to be irradiated.In Fig. 2, the device is tested under the electrical stress induced by the "ON"-bias condition, i.e., the highest bias at V gs .In general, these SiC DUTs are commercial and show excellent stability in time, as in contrast to other previous SiC devices [38], [39], [40].After ∼29 h, the threshold voltages shift less than 8 mV for each examined bias condition with some decreases in the leakage currents in the subthreshold region.The contribution of the stress-induced effects is almost negligible compared to the radiation-induced effects shown in Section III.

III. EXPERIMENTAL RESULTS X-RAYS A. TID Response for the Second Generation Devices at Different Bias Conditions
Fig. 3(a) shows the transfer characteristics (I d -V g ) of a second-generation SiC power MOSFET in the saturation regime (V ds = 5 V) irradiated and annealed at 100 • C for 24 h in the ON-bias condition.During the irradiation, the device exhibits a negative shift of the threshold voltage V th , which causes a significant drift in the working point of the device with more than 2x increase in the ON-current after 100 Mrad.After annealing, the SiC device partially recovers its response, thus indicating the formation of a significant density of stable defects.
The I d -V g characteristic in the linear regime (V ds = 0.1 V) is shown in Fig. 3(b).During the exposure, the curves shift toward negative V g values, indicating positive charge trapping in the relatively thick gate oxide.The magnitude of the shift decreases between 10 and 100 Mrad, indicating a possible saturation of the trapping phenomena.On the other hand, the OFF-leakage current I off , defined as I d at V gs = −5 V, is almost insensitive to TID, showing the robustness of the gate oxide and the absence of STI-related effects, which typically affect planar Si-based MOS devices at ultrahigh doses [41], [42], [43].With respect to the pristine measurement, no difference was observed in I g -V g after 100 Mrad, indicating no sign of damage in the gate oxide (i.e., gate rupture).
The influence of bias conditions during the irradiation on the TID sensitivity is shown in Fig. 4, which summarizes the degradation of: 1) maximum drain current I on ; 2) threshold voltage V th ; and 3) maximum transconductance g m−MAX .All the values are calculated in the linear regime at V ds = 0.1 V with I on−lin extrapolated at V gs = 4.5 V.The threshold voltage V th is defined as V gs−int − V ds /2; V gs,int is extracted in the linear region (V ds = 0.1 V) as the gate-voltage axis intercept of the linear extrapolation of the I d -V gs curve at the point of its maximum first derivative, i.e., of maximum g m .
The I on−lin variation of Fig. 4(a) shows a positive shift of the current in the linear regime, up to a maximum of 190%, when devices are irradiated up to 100 Mrad in "ON" bias.After 10 Mrad, charge buildup in the gate oxide saturates.Fig. 4(b) and (c) suggests that the I on variation is mostly dominated by the negative shift of V th , with a small contribution from the degradation of g m−MAX .After 100 Mrad, V th shifts up to ∼4.6 V for devices irradiated in the "ON" condition, while the g m variation is relatively small, −6%.Comparing the different gate-bias conditions during the exposure, the largest TID degradation is observed for the devices tested in "ON" and "semi-ON" conditions, which induce almost identical V th degradations.Slight differences between the "ON"-and "semi-ON"-biased devices are not significant and may be induced by the device-to-device variability.In both cases, their V th Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.becomes stable at doses >10 Mrad.This saturation trend of V th , as well as the absence of any rebound in the V th curves, suggests that the TID phenomenon at doses >10 Mrad may be slowed down by the saturation of TID-induced positive charge trapping in the gate oxide.
On the other hand, the "−V g "-bias condition induces V th shifts that are much lower than the "ON" condition, as V th is −0.95 for "−V g " versus V th = 4.5 V for "ON" after 10 Mrad.The different TID sensitivity with the applied bias underlines the relevance of the direction and intensity of the electric field, which affects the charge yield, as well as the trap cross sections, and may drift the positive trapped charges in different directions.Among all the conditions, the lowest TID effects are observed for the "GND" case, most likely due to the limited charge yield when ground bias is applied at the gate terminal [42], [44], [45].
The modest degradation of g m−MAX is not dominant on the overall device performance but suggests possible activation of scattering centers, as interface traps, at the SiO 2 /SiC interface when the devices are irradiated under the "ON" and "semi-ON" biases.The generation of interface traps under positive irradiation biases is also suggested by the modest increase of the subthreshold swing ( SS) with the accumulated dose.As reported in Fig. 5, "ON"-and "semi-ON"-biased devices show increases in the SS at doses >1 Mrad with worst degradation for "ON"-bias device, resulting in SS of 82 mV/dec after 100 Mrad.In contrast, SS for the "GND"-and "−V g "biased transistors is negligible as <10 mV/dec after 10 Mrad, consistent with the negligible (<1%) g m variation reported in Fig. 4(c).
The influence of the bias condition on the SS and g m was also observed in Si planar MOSFETs, where the electric field plays an important role in the direction of the transport of H + [46], [47], [48].e.g., in the case of positive gate bias, typically used in n-channel MOSFETs, the H + drifts toward the oxide/channel interface, thus activating traps at the Si/SiO 2 interface [46], [49].It is more likely that SiC power devices may also be affected by trap activation mechanisms related to H + and/or other contaminants moving into the oxide layers and at their interface.However, interface traps in SiC devices could have a different nature compared to the defects typical of Si MOS devices and it is challenging to determine their effects on wide bandgap materials since deep interface traps can potentially have fixed charged states.Anyway, it is worth noting that the variations in the SS are here almost negligible if compared to the overall V th shift, clearly indicating that the dominant TID-induced effect is induced by the positive fixed charge trapped in the gate oxide.

B. CV Analysis for X-Ray Irradiations
The input capacitance measurements (C gg -V g ) before the irradiation, after the exposure, and after the annealing are shown in Fig. 6(a) for the device with the highest TID degradation ["ON" condition, 100 Mrad(SiO 2 )].A rigid shift of the curve toward the left is observed after 100 Mrad due to the positive charge trapped in the gate oxide.Partial recovery is visible after 24 h of annealing at room temperature, indicating a decrease in the amount of the trapped charge, in agreement where q is the electron charge [C], ε ox [F/cm] is the oxide permittivity, t ox [cm] is the oxide thickness, and V th [V] is the threshold voltage shift extracted from the CV analysis.

C. Comparison of Second-and Third-Generation SiC Power V-MOSFETs
A comparison of the V th degradation as a function of dose in SiC V-MOSFETs fabricated in the second-and third-generation technologies for the "ON" and "OFF" conditions is shown in Fig. 7(a).The exact same V th degradation rate is observed for the two technologies up to 1 Mrad.Similarly, Fig. 7(b) shows the subthreshold swing variation for the "ON" bias conditions.A higher increase of SS is observed on the second-generation devices already at low doses.Conversely, no variation of SS is observed for the third-generation devices up to 1 Mrad, suggesting a higher tolerance of the SiC/SiO 2 interface.It is reasonable that the manufacturer has significantly improved the interface quality in the third generation of SiC devices by decreasing the number of active defects at the interface, thus limiting the impact of the interface traps during the X-ray exposure [33].The combination of these results indicates that the dominant TID degradation is still related to positive charge trapping in the gate oxide in the two MOSFET generations and confirms the negligible contribution of D it for the V th degradation.

IV. EXPERIMENTAL RESULTS WITH 3-MEV PROTONS
A. TID and DD for the Second-Generation Devices Fig. 8 shows the transfer characteristics (I d -V g ) of SiC power MOSFET of the second generation irradiated with 3-MeV protons in "ON" condition.After 100 Mrad, the device exhibits significant drift in its working operational point, with a decrease of ∼80% in the drain current at V gs = 9 V. Finally, the annealing test at 100 • C does not allow the device to recover its performance, but it induces an even worse degradation of the ON-current by dropping of I d of ∼90% (at V gs = 9 V).
Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.Fig. 8(b) reports the I d -V g characteristic in the linear regime (V ds = 0.1 V).With the exposures to 3-MeV protons, the curves shift toward negative values, indicating positive charge trapping in the gate oxide.The plot evidences large V th shifts at doses <10 Mrad, and V th substantially stabilizes at doses >10 Mrad, thus suggesting possible saturation of the positive charge trapping phenomena, similar to X-ray irradiations.However, another degradation effect arises in the I d -V gs of SiC devices when irradiated with protons at doses >20 Mrad.The effect is identified by a continuous drop of the drain current combined with a substantial change in the shape of I d -V gs in the regimes of channel depletion and inversion, i.e., at V gs > −2 V.This degradation effect was not visible during the X-ray exposure, as shown in Fig. 3(b).Thus, the difference in the damage induced by the X-rays and proton irradiations indicates the combination of two mechanisms when exposing the devices to 3-MeV protons.The first mechanism is induced by TID and dominates at doses <10 Mrad, causing positive charge trapping in the gate oxide, which is visible as negative shifts of V th .The second mechanism is induced by DD and it is dominant at doses >10 Mrad, or equivalently to 6.72 × 10 12 protons/cm −2 of 3-MeV protons, causing the degradation of the series resistance of the devices, most likely due to dislocated SiC atoms in the drift region of the vertical MOSFET (epilayer, substrate, and JFET regions of the device [33]).The generation of DD-induced defects leads to an increase of R DS(on) and, therefore, a reduction of I on and g m .It is worth noting that such DD effects were observed with 3-MeV protons and not observed in previous experiments performed with 200-MeV protons of 10 11 cm −2 fluence on the same devices [51].In addition to the higher fluence used in this work, the difference between 3-and 200-MeV proton degradation is also induced by the larger nonionizing energy loss (NIEL) of the 3-MeV protons used for our tests, which stops inside the drift region of the SiC devices (i.e., range of 53 µm in SiC) [52], [54].
Finally, no difference with respect to the pristine measurement was observed in I g -V g after 100 Mrad, indicating no sign of damage in the gate oxide (i.e., gate rupture).

B. Comparison of X-Rays and Proton Effects for the Second-Generation Devices
To investigate the nature of the effects visible with 3-MeV proton irradiation and to compare it with X-ray irradiations, Fig. 9 reports the degradation of the main MOSFET parameters when the devices are irradiated under the "ON"-bias condition.The degradation of I on is calculated as the ratio of I d at V gs = 4.5 V and V ds = 0.1 V normalized by its pristine value.The upper x-axis indicates the 3-MeV proton fluence, while the bottom x-axis indicates the TID equivalent fluence in SiO 2 .As evidenced in (a), I on for the proton irradiations increases with a much higher rate than X-ray irradiation, and it reaches a plateau at a fluence of ∼4 × 10 12 cm −2 , equivalent to 6 Mrad.At fluences >6 × 10 12 cm −2 , I on starts to decrease abruptly due to the DD-induced effects.As shown in Fig. 9(b) and (c), the I on variation visible at doses <10 Mrad is mostly caused by TID, with the negative shift of V th , and a small contribution from the degradation of g m−MAX .For higher proton fluences above ∼6 × 10 12 cm −2 , DD dominates causing an increase of the ON-state resistance, and a drop of I on and g m−MAX .In the case of I on , DD effects start to be visible at ∼10 Mrad, with intermediate effects at 15 Mrad and saturation over 20 Mrad.The DD effects are not observed during X-ray irradiation, where only TID degradation is induced by the 10-keV photons.
For the protons, V th was calculated from the I d -V gs curve using two different methods: 1) from g m−MAX , as already described for the X-rays in Section III-A and2) in the subthreshold region as the gate-voltage shift at I d = 10 nA.The two methods diverge in the V th values at doses >10 Mrad, where the first method is not accurate in the extrapolation due to the large degradation induced by DD.Indeed, as shown in Fig. 9(c), a maximum V th of 0.4 V is measured with the first method at 100 Mrad versus −6.3 V retrieved from the second method, which indicates monotonic decreases of V th induced by the trapping of positive charges in the gate oxide.Interestingly, V th for 3-MeV proton irradiations saturates at a higher level compared to X-ray irradiated devices, about −6 V versus −4.5.The highest saturation level of V th for 3-MeV proton irradiations suggests that 3-MeV proton exposures may induce the activation of higher densities of Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.traps in the gate oxide.Indeed, it is worth noting that the highest V th degradation with 3-MeV proton irradiations is not consistent with the higher charge yield of 3-MeV protons compared to one of 10-keV X-rays [55], [56].
The I off degradation is shown in Fig. 9(d), where I off is extracted as I d at V ds = 0.1 V with V gs = −5 V, i.e., the minimum operational gate condition of the transistor.The increase of I off during X-ray exposure is relatively modest, as I off stays below 10 −11 A after 100 Mrad.This is not the case for the proton irradiated samples, where I off increases several orders of magnitude with a steeper increase for doses over 4 Mrad.At 100 Mrad, I off is ∼5 nA, losing the blocking capability in OFF-state due to the V th shift of −6.3 V.
Similarly, as in the case of the X-rays, the initial degradation of g m−MAX suggests the possible activation of interface traps at the SiO 2 /SiC interface, in agreement with the increase of the subthreshold swing ( SS), visible in Fig. 9(e).A large increase up to 80 mV/dec is observed for doses up to 1 Mrad, with a decrease until 10 Mrad.In this region, TID effects dominate.The values for doses over 10 Mrad were not included, due to the combination of TID and DD, which complicates the methodology of extraction.

C. CV Analysis for Proton Irradiations
The input capacitance measurements (C gg -V gs ) are shown in Fig. 10 for a SiC-MOSFET of the second generation irradiated with 3-MeV protons at 100 Mrad in the "ON"-bias condition.Three measurements are represented for the same device: before the irradiation, after the exposure, and after the annealing under bias (V gs = 20 V and V ds = 0 V) at room temperature and 100 • C. A shift of the curve toward the left is observed after 100 Mrad due to the positive charge generation in the gate oxide.However, the shift is not rigid as in the case of the X-rays [Fig.6(a)], but a significant change in the C-V curve is measured, indicating modification of the interface trap density (D it ) distribution.Indeed, the C-V curves cannot be overlapped with a rigid V g -shift.
After annealing, the curve shifts toward the right, indicating partial recovery in the amount of the trapped charge, consistent with the recovery in the I d -V gs visible in Fig. 8(a), alike the mechanism discussed for the X-rays.However, the C−V curve does not recover the shape of pre-irradiation, suggesting the presence of D it at the interface.A marginal change in the C-V shape is observed after annealing, which suggests a minimal recovery of D it created during the irradiation.
V. CONCLUSION SiC vertical power MOSFETs were irradiated for the first time at ultrahigh doses (100 Mrad), showing significant TID degradation, with magnitudes depending on the gate bias during the exposure.SiC MOSFETs irradiated with positive gate bias exhibit the highest negative threshold voltage shifts, due to the direction and intensity of the electric field in the gate oxide, which enhances the charge yield and favors the trapping of positive charges in the oxide.The lowest TID degradation is observed for "GND"-biased devices, due to the limited charge yield at low electric field in the gate oxide.
Similar negative threshold voltage shift is observed when comparing devices from the second and third generation exposed to X-rays, indicating similar positive charge trapping in the gate oxide.However, even if not dominant, the newer third generation of devices exhibits an almost negligible shift of the subthreshold swing, indicative of an improved SiO 2 /SiC interface achieved in the most recent fabrication process.
Furthermore, the experiments with 3-MeV protons show a similar behavior to X-rays with charge trapping in the gate oxide at low doses, while a significant DD in the drift region is observed for higher doses and fluences.The defects created in the drift region lead to a severe increase of the ON-state resistance causing a reduction of I on and g m , thus degrading both the static and dynamic behavior of the power switch.

Fig. 1 .
Fig. 1.(a) Schematic layout of a single unit cell of the SiC power MOSFET designed with planar gate (not to scale).(b) DUT soldered on a DCB board and bonded to the gate and source pads with Al wires.(c) Bare die from the second generation Cree/Wolfspeed used for the test.

Fig. 2 .
Fig.2.Electrical stress-induced degradation of I d -V gs curves in the linear regime (V ds = 50 mV) for SiC MOSFET.The device was biased for a total time of 32 h at room temperature in the "ON" bias, in order to evaluate the degradation induced by the electrical stress without X-ray exposure.

Fig. 3 .
Fig. 3.I d -V gs curves of second-generation SiC V-MOSFETs in (a) saturation regime (V ds = 5 V) and (b) linear regime (V ds = 0.1 V).The devices were irradiated with X-rays up to 100 Mrad(SiO 2 ) in the "ON" condition and then annealed at 100 • C for 24 h.

Fig. 4 .
Fig. 4. Degradation of (a) maximum drain current I on−lin , defined as the I d variation at V gs = 4.5 V, (b) threshold voltage V th , and (c) maximum transconductance g m−MAX as a function of dose in second-generation SiC V-MOSFETs.Irradiations were performed in different bias conditions.

Fig. 5 .
Fig. 5. Subthreshold swing variation SS as a function of dose of SiC V-MOSFETs fabricated in the second-generation technologies.The devices were irradiated in several bias conditions.

Fig. 6 .
Fig. 6.(a) C gg -V gs before the irradiation, after the exposure at 100 Mrad(SiO 2 ) in "ON" state, and after the annealing.(b) Estimation of the oxide-trap density (N ot [cm −2 ]) before and after annealing for each condition of irradiation in second-generation SiC V-MOSFETs.

Fig. 7 .
Fig. 7. Comparison for SiC V-MOSFETs fabricated in the second-and third-generation technologies of (a) threshold voltage shift V th for irradiations in "ON" and "−V g " conditions and (b) subthreshold swing variation SS in "ON" condition.

Fig. 8 .
Fig. 8.I d -V gs curves of second-generation SiC V-MOSFETs in (a) saturation regime (V ds = 5 V) and (b) linear regime (V ds = 0.1 V).The devices were irradiated with 3-MeV protons up to 100 Mrad(SiO 2 ) in the "ON" condition and then annealed under bias (V gs = 20 V and V ds = 0 V) at room temperature and 100 • C for 24 h each.

Fig. 9 .
Fig. 9. Comparison of different parameters of second-generation SiC V-MOSFETs exposed to X-rays and protons in "ON" condition.Degradation of (a) maximum drain current in ON-state I on−lin , (b) threshold voltage V th calculated with two methods for the protons, (c) minimum drain current in OFF-state I off−lin , (d) maximum transconductance g m−MAX , and (e) subthreshold swing SS as a function of dose and fluence in SiO 2 .I on−lin is defined as I d at V gs = 4.5 V.