Hybrid SiC Pixel Detector for Charged-Particle Beam Monitor

We report on the hybrid silicon carbide (SiC) pixel detector for charged-particle beam monitors in high-energy physics experiments. To demonstrate comparable performances of the state-of-the-art Si pixel detectors, SiC pixel sensors with a die size of <inline-formula> <tex-math notation="LaTeX">$25 {\mathrm{ mm}}^{2}$ </tex-math></inline-formula> were fabricated based on the p-n diode structure. We combined <inline-formula> <tex-math notation="LaTeX">$12 \times 12$ </tex-math></inline-formula> diodes of a pixel size of 160 and <inline-formula> <tex-math notation="LaTeX">$270 ~\mu {\mathrm{ m}}$ </tex-math></inline-formula> pitches with the dedicated readout application-specific integrated circuit (ASIC) by indium and gold (<inline-formula> <tex-math notation="LaTeX">${\mathrm{ In/Au}}$ </tex-math></inline-formula>) stud-bump technology. The front-end chip was designed in 0.35-<inline-formula> <tex-math notation="LaTeX">$\mu {\mathrm{ m}}$ </tex-math></inline-formula> complementary metal oxide semiconductor (CMOS) technology, with consideration of a hybrid configuration. Each pixel circuit consists of a charge-sensitive amplifier (CSA) and bandpass filter, optimized for the SiC sensor. The low noise performance achieved an equivalent noise charge (ENC) of 55 <inline-formula> <tex-math notation="LaTeX">$\pm \,\,5{\mathrm{ e}}^{-}$ </tex-math></inline-formula> (rms). The spectrum of <inline-formula> <tex-math notation="LaTeX">$^{241}{\mathrm{ Am}}$ </tex-math></inline-formula> shows an energy resolution of <inline-formula> <tex-math notation="LaTeX">${\mathrm{ 1.72 keV}}$ </tex-math></inline-formula> (FWHM) at 17.8-keV <inline-formula> <tex-math notation="LaTeX">$\gamma $ </tex-math></inline-formula>-rays at room temperature. The obtained image with <inline-formula> <tex-math notation="LaTeX">$^{90}{\mathrm{ Sr}}$ </tex-math></inline-formula> is a proof of a single minimum ionizing particle (MIP) detection capability with all pixels. Those results prospect a future application of the SiC pixel sensors to high-intensity proton extinction monitors in the coherent muon-to-electron transition (COMET) muon experiment at the Japan proton accelerator research complex (J-PARC).

Abstract-We report on the hybrid silicon carbide (SiC) pixel detector for charged-particle beam monitors in high-energy physics experiments. To demonstrate comparable performances of the state-of-the-art Si pixel detectors, SiC pixel sensors with a die size of 25 mm 2 were fabricated based on the p-n diode structure. We combined 12 × 12 diodes of a pixel size of 160 and 270 µm pitches with the dedicated readout application-specific integrated circuit (ASIC) by indium and gold (In/Au) studbump technology. The front-end chip was designed in 0.35-µm complementary metal oxide semiconductor (CMOS) technology, with consideration of a hybrid configuration. Each pixel circuit consists of a charge-sensitive amplifier (CSA) and bandpass filter, optimized for the SiC sensor. The low noise performance achieved an equivalent noise charge (ENC) of 55 ± 5e − (rms). The spectrum of 241 Am shows an energy resolution of 1.72 keV (FWHM) at 17.8-keV γ -rays at room temperature. The obtained image with 90 Sr is a proof of a single minimum ionizing particle (MIP) detection capability with all pixels. Those results prospect a future application of the SiC pixel sensors to high-intensity proton extinction monitors in the coherent muon-to-electron transition (COMET) muon experiment at the Japan proton accelerator research complex (J-PARC).

I. INTRODUCTION
R EPLACEMENT of running silicon or new chargedparticle beam monitors with higher radiation tolerance and Si-comparable performances, for example, active area or fine segmentation, is a primary concern in high-energy physics (HEP) experiments. Under the circumstance of above 10 12 neutron equivalent fluence, standard n-type Si sensors show significant degradation in charge collection efficiency or leakage current characteristics, due to the substrate-type inversion [1], [2]. Although the production yields and performance deviations of various wide-bandgap materials, derived from various crystal defects have been long-time obstacles to realizing large sensor volumes, this situation has been changing in silicon carbide (SiC), with consistent efforts on the crystal fabrication and high-quality chemical vapor-deposited thick epitaxial layers. Industries in the field of power devices have employed 6-in wafers, and thus, larger sensor volumes are expected with the accelerated progress of large SiC substrates [3], [4], [5]. Its superior radiation tolerance due to the intrinsic larger displacement threshold and bandgap energy of E G ≃ 3 eV has been also proven in past studies [6], [7], [8].
For the study of fine sensor segmentation and feasibility for charged-particle beam monitors in future HEP experiments, we have fabricated a hybrid SiC pixel detector by combining 12 × 12 pixel diodes to the dedicated individual readout circuits by indium and gold (In/Au) stud-bump technology [9]. Although the past studies on Schottky junction SiC devices have already achieved extremely low reverse current densities in the order of pA/cm 2 at room temperature [10], we employed the p+n structure in this study, since p-n diodes have intrinsically lower surface sensitivity to the active region in wafer processing, which is an attractive feature in the fabrication of large format sensors with uniform leakage currents. In this article, in Section II, we describe the SiC pixel detectors, in Section III, we report the spectral and imaging performances using radioactive sources, in Section IV, we discuss the future prospects, and finally in Section V, we present our conclusions.  For achieving higher reverse blocking capability in each pixel, an n + field stop ring and a junction termination extension (JTE) structure were introduced on the anode side. The width of the JTE structure is 40-50 µm, and the interval between each pixel is 20 µm. The p-well and p + anode were formed by Al ion implantation at 500 • C. The Al pads were formed in the anode with a field oxide of 2-µm thickness, inserted between electrodes for the purpose of a low reverse leakage current. The detailed cross section and initial characteristic test results are described in [11]. A typical thickness of the epitaxial layer is 52 µm, and 260 dies are available from a single wafer. In the hybridization, we have selected a device randomly. Fig. 2 shows a layout of the front-end ASIC, implemented in 0.35-µm complementary metal oxide semiconductor (CMOS) technology. The chip contains 12 × 12 pixel readout cells with a chip size of 5 × 5 mm and a bonding pad of 40 × 40 µm for assembly with a SiC pixel sensor. Each pixel cell contains the signal processing chain, as shown in Fig. 3. The detector signal passes through a charge-sensitive amplifier (CSA), a pole-zero cancellation circuit, and a second-order CR-RC filter with a shaping time of 5 µs. The gain of the circuit is designed as 605 mV/fC. The feedback resistance of the CSA (R f ) is controlled by the gate voltage VGG of the n-channel transistor, which is normally operated in the range of several G . Test pulses can be injected into each pixel cell via an on-chip  100-fF capacitor. The shaper output from each channel is buffered and connected to a common output pad via analog switches. Selecting an arbitrary pixel for test pulse injection and analog monitoring is controlled with on-chip registers.

B. Front-End Application-Specific Integrated Circuit (ASIC)
For the purpose of investigating the technology, we constructed the analog circuit blocks with different layouts, that is, one type with process standard n-channel field-effect transistors (FETs) and the other with rad-hard technique proposed by [12] with an H-shaped gate structure. P-channel FETs are all process-standard layouts. As highlighted in Fig. 2, the upper half of the pixel matrix is composed of a processstandard layout, and the other half is replaced with a customlayout n-FETs. Since the software process improvement and capability determination (SPICE) models are not available and technological design rule violations are remaining for the custom layout FETs, we have chosen an in situ approach by comparing the performances of the two matrices. Since the deep n-well isolation is not provided in the technology, the volume of digital circuits is minimized, and only control registers were included in the chip. Table I summarizes the performance measurements of the ASIC. Fig. 4 shows a photograph of the SiC pixel detector. The SiC pixels and the readout ASIC channels were individually connected in a dc-coupling scheme, using the In/Au studbump bonding technology [13]. Compared with the standard solder bumps, the In/Au stud bumps do not require a high-temperature process and keep the distance between the sensor and the ASIC relatively long, for example, >10 µm, resulting in smaller input capacitances. The reverse bias voltage is provided through a printed circuit board (PCB) trace to the cathode electrode via an Au microwire of a 60-µm diameter. The peripheral pads of the ASIC were used for wire bonding to the PCB. To prevent electric discharges when applying reverse bias voltages, we coated the overall pixel detectors with silicone rubber (KER-2201; Shin-Etsu), as surface passivation.

C. Hybridization and Experimental Setup
The experimental setup is drawn in Fig. 5. For the circuit tee, a capacitor of 4.7 nF with 6-kV tolerance and a 10-M resistor were mounted for the sake of a low-pass filter in the high-voltage power supply line. An interface with a computer was established with a National Instruments PCIe-7841R board, containing a reconfigurable field-programmable gate array (FPGA) and LabVIEW software tools. The analog output of the ASIC is connected to the analog buffer IC (MAX4201; Maxim Integrated) on the PCB, and then the data are sent to the multichannel analyzer (MCA8000D; Amptek) for storing pulse height information.

A. Noise Performance
After the assembly of the SiC pixel detector on the PCB, we injected test pulses into each pixel by applying a reverse bias voltage of 600 V to the sensor. Fig. 6 shows the equivalent noise charges (ENCs) of each pixel. We succeeded to read out signals from all pixels in the dc-coupling scheme without  any electric breakdown. The difference in the ENCs seems reflective of the two transistors' layout types, however, the relative values are affected by the gate voltage VGG of the feedback transistors, which is common between both layout types in the current design. When we optimize the resistance value with one type, a small signal distortion appears in another type and vice versa. In this measurement, we have optimized the VGG value with the H-shaped circuit. The average ENCs were determined as 96 ± 6 for the standard layout and 65 ± 5 e − (rms) for the H-shaped layout, respectively. A typical diode capacitance of a single pixel was measured separately as 220 ± 5 fF at 600 V.   (FWHM) at 17.8-keV X-rays at room temperature. The energy resolution corresponds to the ENC of 72 e − , assuming the electron-hole pair creation energy ϵ = 7.8 eV [14]. According to the SPICE simulation, the expected energy resolution with C det = 220 fF is calculated as 1.54 keV. Since the typical leakage current of the SiC pixel sensor was measured separately as less than 100 pA, the external noise from the experimental setup, for example, additional input capacitance from the bump bonding and/or noise of the power supply or shielding issues, is a natural interpretation of the discrepancy.

C. Imaging Performance
For testing the imaging capability, we performed a blind search of a pinhole location made on the lead-tin sheet. The SiC pixel detector was covered by the lead-tin sheet with a 1-mm diameter pinhole. For the purpose of shorted exposure times, we used a 90 Sr β-ray source in the measurement. Fig. 8 is a charge spectrum of a single pixel with an exposure time of 2 h. A count map of all pixels is shown in Fig. 9. To reconstruct the image, we used the event count located between 1000 and 6000 e − in each pixel spectrum. After trimming baseline

IV. FUTURE PROSPECTS
The sensor segmentation and assembly methods with front-end electronics have been established through testing of the pixel detector. In this section, we discuss the application feasibility of fine-segmented SiC sensors to charged-particle beam monitors in the HEP experiment.
The coherent muon-to-electron transition (COMET) experiment at Japan Proton Accelerator Research Complex (J-PARC) investigates neutrinoless muon-to-electron conversion processes in a muonic atom using high-intensity µ-beams [15]. Fig. 10(top) shows the time sequence of the primary proton bunches at J-PARC. High-intensity proton bunches are injected into the pion-production target in every 1.2 µs with pulse widths of 100 ns. The µ-beams are generated from the subsequent decay of pions, and then the pions are collected by the solenoidal field and transported to the main detectors during the decay to muons. Finally, mono-energetic electrons from muon decay are emitted from the µ-stopping target and detected by a cylindrical drift chamber. In this time sequence, we set the time window, in which the signals from only the muon decay are picked up in the main detector, however, the unexpected charged particles produced by nonextinct protons, leaking from the bunch structure, affect the sensitivity of the experiment, that is, a single-event sensitivity of ≈10 −17 [16].
To provide assurance of zero background during the timing window, that is, between the half of the bunch period to the next bunch, we plan to monitor the primary proton beams and assure the proton extinction continuously. The main requirements of such proton extinction monitors are as follows: 1) a single minimum ionizing particle (MIP) detection capability to detect a leaky single proton; 2) radiation tolerance up to ≈5 × 10 13 neutron equivalent fluence, due to continuous bombardment of proton bunches; 3) relatively large active area with ≈1-10 cm 2 to cover the beam size; and 4) pileup tolerance during the high-intensity proton bunches, which are unavoidable as the on-axis beam monitors.
To meet all requirements with current technology, the SiC pixel sensors with a multitiling approach are a good candidate. Although the CCE distribution during the irradiation, including the undepletion region or the edge of the depletion region should be carefully considered, as discussed in [18], the single MIP detection capability and radiation tolerance of the SiC p-n diode have been at least demonstrated without deteriorating IV characteristic up to a neutron fluence of 10 13 /cm 2 [11]. The mass sensor production to cover the proton beam spot is also quite realistic, owing to the matured wafer technology of SiC [17]. The high-rate tolerance can be mitigated by segmenting sensor electrodes, as demonstrated in testing the SiC pixel detectors. The average event rate is reduced to 10 2 -10 4 Hz, assuming that the bunched protons of 10 8 with uniform distribution in 1 cm 2 area and pixel sizes of 10-100 µm in the sensor. Since the high critical breakdown field and high saturation velocity of electrons and holes, that is, 2 × 10 7 cm/s, allows the detectors to operate with a very fast response of 250 ps for charge collection with 50-µm depletion thickness. Therefore, the target signals from the neutrinoless muonto-electron conversion processes can be processed with a high signal-to-noise ratio with minimized signal loss and fluctuation due to charge trapping in the sensors. We will design the dedicated electronics with the implementation of signal-gating circuits to avoid signal saturation during the bunch period and fabricate the prototype extinction monitor in conformity with the COMET experiment. This concept is also depicted in Fig. 10(bottom).

V. CONCLUSION
We fabricated a SiC sensor with 12 × 12 pixels, based on the p+n structure at AIST in Japan. The objective is to investigate the sensor segmentation and demonstrate the feasibility of the charged particle beam monitors in the HEP experiments. The diode size and pixel pitch are 160 and 270 µm, respectively. The fabricated device was bonded to the dedicated front-end ASIC, designed in 0.35-µm CMOS technology. We successfully read out signals from all pixels and the noise distribution shows relatively good uniformity in 5 × 5-mm sensor size. The energy resolution of 241 Am shows 1.72 keV (FWHM) at room temperature. Irrespective of the applied bias, our pixel detector proved the MIP detection, and we obtained a clear image of 90 Sr, masked with 1-mm lead-tin pinhole. Those results encourage a further scalability and/or multisensor approach to cover a relatively large area of 1-10 cm 2 with a pixel size of 10-100 µm, for on-axis proton extinction monitors in the COMET experiment at J-PARC.