A Simple Method for a Digital Readout of Randles Impedances

The Randles impedance model (RIM) characterizes a wide range of physical phenomena. The model comprises three elements: a resistor in series with a combination of a capacitor and another resistor arranged in parallel. This structure makes determining RIM component values particularly complex. Although such values can be found using Electrical Impedance Spectroscopy (EIS), this process requires a large number of measurements and complex hardware. Other time-based methods reduce the number of measurements, but the hardware involved is still excessive for a portable system, requiring complicated arithmetic calculations that may produce less than accurate results. This article presents a readout method based on time measurements that uses only a simple digital processor (DP) without analog-to-digital converters (ADCs), and two resistors of known value to estimate the RIM parameters in digital format. The method performs three Randles impedance capacitor charge-discharge processes to obtain five time measurements. The results are found by processing the time measurements in the DP using simple arithmetical operations. Despite the simplicity of both the hardware and the reading and calculation methods, errors in the estimates of a range of RIM parameter combinations are among the lowest in the literature, varying between 1.22% and 1.66%, depending on the parameter to be estimated.


I. INTRODUCTION
T HE Randles impedance model (RIM), also known as the Randles equivalent circuit, is an electrical circuit model commonly used to represent the behavior of various natural processes.It was first proposed by Randles in 1947 to study electrode reaction speed [1].Since then, it has become a widely accepted model in fields such as characterizing the electrochemical properties of materials and interfaces [2], [3], [4], as well as for fuel cells [5], solar cells [6], prosthesis [7], and even various types of sensors such as liquid conductivity [8] or biological sensors [9].
The RIM comprises a capacitor, C x , and two resistors, R x and R y , arranged as shown in Fig. 1.Electrical Impedance Spectroscopy (EIS) has been widely used to find the values Manuscript received 21 October 2023; revised 6 December 2023; accepted 8 December 2023.Date of publication 2 January 2024; date of current version 15 January 2024.This work was supported by the Spanish Government under Grant PID2021-125091OB-I00. Funding for open access charge: Universidad de Málaga/CBUA.The Associate Editor coordinating the review process was Dr. Anoop Chandrika Sreekantan.
of these components and thus characterize a certain process.However, EIS requires complex elements, such as a direct digital synthesis generator (DDS) and a vector voltmeter [10], to obtain many measurements used in estimating RIM parameters.This makes the method both expensive and slow, and therefore, not suitable for portable systems [11] or for the smart sensors commonly used in the Internet of Things (IoT), which also need to have low power consumption.
Other methods to obtain RIM parameters based on time measurements also require a significant number of such measurements to subsequently transfer the information to the frequency domain using a Fast Fourier Transform (FFT) and determine the value of the parameters by approximate methods [12], [13].However, these methods are still subject to the same drawbacks.
In other conceptually simpler proposals, three time measurements are taken during the active phase of a single square wave provided by a voltage [14] or current [15] source.Operating with the values of these measurements allows us to ascertain the digital values of R y , R x , and C x .The hardware requirements are less demanding than in the methods mentioned above since the main elements are the voltage or current sources and an analog-to-digital converter (ADC).However, a complex system of equations needs to be solved to obtain the parameters of the RIM, and this requires both high calculation capacity and time (a personal computer or a laptop is used for this purpose).There are also significant errors: up to 13% in [14] (when applied to a real Randles Impedance) and up to 74% in [15].
Based on the method proposed in [14], the hardware in [16] is reduced by including the ADC in a digital processor (DP) that controls the entire reading process.This proposal uses a microcontroller as the DP, generating the square voltage pulse with the help of an external inverter with low output resistance and a known resistor, R r , Fig. 2(a).While this circuit Fig. 2. Circuit proposed for extracting the parameters of the Randles model (a) in [16] and (b) in [18].
is an important advance toward portability (calculations are performed in the microcontroller), errors remain considerable due to the approximate method used to find parameter estimates, which depends largely on the accuracy of the time measurements.So, even small errors in these measurements translate into considerable errors in the estimates: up to 120% in the estimate of R y , 25% for R x , and around 80% for C x .
A variant of the technique used in [16] is presented in [17], where voltage pulses of different amplitudes (generated using a digital-to-analog converter and current mirrors) are used to obtain a non-linear system of equations solved on a computer using the Gauss-Newton method.Unfortunately, no data are available on the precision of the method.
A circuit based on [15] is introduced in [18], Fig. 2(b), in which a current pulse is generated thanks to a switch controlled by a computer.The computer also receives the data from an ADC responsible for acquiring the three necessary measurements when the switch is closed.An approximate method is then used to solve (in the computer) the non-linear system of equations that provides the final values of R y , R x , and C x .The use of a current source and the new data processing significantly improves the accuracy of the estimates.The system shows errors (performing a single estimate) of up to 5.6% in R y , 8.5% in R x , and 3.55% in C x for different combinations of resistors and capacitors.A similar architecture, albeit somewhat more complex than [18], is shown in [19] to characterize an implantable neural stimulator, although no data are available on the system's accuracy.
In conclusion, it would seem desirable to design a new system that allows the RIM parameters to be easily estimated from a mathematical point of view, with local data processing and as little hardware as possible.The system must use a few time measurements, which allow the equations system that determines R y , R x , and C x to be solved straightforwardly, reducing the requirements of the DP who gets the results and who will also control the whole system (whether the DP is a microcontroller, an FPGA or an ASIC) and avoiding the need for a personal computer or laptop.In addition, the rest of the circuit elements must be minimal, without active components or ADCs.
To meet all these requirements, this article presents a new circuit consisting solely of an FPGA, as DP (an FPGA has been selected as the first step in developing a future ASIC), and a pair of known-value calibration resistors.The new proposal is based on the so-called Direct Interface Circuits (DIC) that were initially developed for resistive sensors and later for capacitive and inductive sensors [20], [21], [22], [23], [24].
The estimation method requires five time measurements taken during three C x discharging processes.With these measurements, the equations to obtain the parameters of the RIM are very simple from a computational perspective.The system's simplicity does not compromise its accuracy and shows, to the best of the author's knowledge, errors similar to those of the best proposals in the literature.

II. NEW CIRCUIT FOR READING RANDLES IMPEDANCES
A. Description of the Method and Circuit Analysis Fig. 3 shows the new circuit proposal for reading the parameters of an RIM.As discussed, the circuit consists of the DP, two resistors of known value (R A and R B ), and Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.I.The green curves show the evolution of V A and V B when they coincide.
Randles impedance.The P A and P B pins must be bidirectional, resulting in a very high input resistance when configured as inputs (HZ state).For its part, P 0 is just an output pin that can also be set, if necessary, in the HZ state.
As mentioned, in the new circuit, three C x charge and discharge processes are required to obtain the five time measurements that will provide the values of R y , R x , and C x .These processes are carried out following the steps shown in Table I, which also shows the state of the pins and the measurements taken in each step.These time measurements are obtained as a consequence of the variations over time of the voltages V A and V B during the discharges.The expected waveforms for all the steps in Table I are shown in Fig. 4, which also shows the meaning of all the time measurements needed for the estimates.
Ideally, it would only be necessary to charge C x (selecting all pins as output "1") in each step of Table I labeled as "Setting initial conditions" to discharge this capacitor subsequently.However, two sub-steps are performed before starting the discharges used to obtain the time measurements: Ch-Charging and In-Initial Discharging.The charging of C x is completed during the first sub-step, considering that V A and V B do not reach the maximum voltage until after a certain period of time due to the presence of the capacitor C x and the stray capacitors of nodes A and B. Ch must last long enough for C x to be charged to the maximum possible voltage, V c,max , at the end of this sub-step (to avoid errors in time measurements, the initial voltage in the three discharge processes must be the same).During the In sub-step, a very brief initial discharge is performed through an equivalent resistor, This equivalent resistor value is obtained by setting the state of the pins as shown in Table I.It is important to note that this sub-step only lasts a few cycles of the DP's internal clock, and the decrease in voltage stored in C x is minimal (this difference is amplified in Fig. 4 for better visualization); the need for the In sub-step will be discussed later.
Table I shows a certain order for the three discharges following the In sub-step and providing the time measurements (labelled as D1, D2-D3, and D4).However, the order is not relevant in ensuring the correct functioning of the estimation method.
At the beginning of any D1-D4 discharge, pins P A and P B detect a "1."However, when the voltage on these pins drops to a certain level, V TL , the pins detect a "0;" this is the trigger instant.
Following the order shown in Table I, the first of these discharges, D1, occurs only through R p .The time interval from the discharge start until the trigger instant is reached in node B of Fig. 3 provides the measurement, T p,B .When trigger instant is detected in node A of Fig. 3, T p,A is subsequently obtained (note that during this discharge V A > V B and therefore T p,A > T p,B ).
If V in is the voltage stored in the internal node of the RIM when the discharges D1, D2, or D4 begin and the voltages in nodes A and B at this instant are V A (0) and V B (0), respectively, then for D1 and D2 it is verified With these values, and considering the discharge equations of a capacitor, it is easy to find that T p,A and T p,B are given by where V TLA and V TLB are the threshold voltages in nodes A and B, respectively.The values in the two nodes have been differentiated, although the difference should be very small [25]; indeed, for clarity, in Fig. 4, this difference is not considered.For correct circuit performance, voltages V A (0) and V B (0) must be greater than the threshold voltage of the pins at the beginning of any discharge step, being identified as a "1" by the DP.Thus, it must be true that Note that a condition does not need to be established for node A since V A (0) is greater than V B (0) and, therefore, must also be greater than V TLA (keeping in mind that there is only a very small difference between V TLA and V TLB ).
It would be convenient to express (6) in an alternative way so it can be used as a circuit design equation.If V DD is the maximum voltage value for a "1" on the output pins of the DP, then V c,max is and V in can be written as where β is a value showing the decrease in V in during the In sub-step.Since this step is very short, β will be smaller but very close to one.Taking into account (3) and ( 8), V B (0) at the start of discharges D1 or D2 is Meaning ( 6) can be rewritten as Informing the designer of the relationship required for selecting the R A and R B values.It is important to note that R x , R y , and R A , R B ≫ r o (where r o is the output resistance of the DP pins) has been considered to obtain this relationship.The same approach has been used in ( 4) and (5).Fortunately, the condition ( 10) is not very demanding, considering that the right member of inequality is well below 1.However, usually, the following relations must be verified to satisfy (10): Limiting the ranges of values that can be estimated.Discharge D2 starts again through R p , but now, when the trigger instant is detected in node B, the pin configuration is modified such that discharge only continues through R x (D3 in Fig. 4).This means that pin P 0 is set to HZ; consequently, V A , V B , and the voltage in the internal node of the RIM take the same value throughout the second part of the discharge.A single curve in green in Fig. 4 shows the coincident values of V A and V B from the instant P 0 is set to HZ.
D3 ends when the trigger instant is reached in node A, obtaining the third measurement, T p−x,A , shown in Fig. 4. To get T p−x,A , it is necessary to consider that the measurement begins when the trigger instant is reached in node B. Consequently, at the beginning of D3, the voltage stored in the capacitor, V c,D3 (0), can be calculated from V B = V TLB .Therefore, the initial value for Thus Finally, the last discharge, D4, is only made through R x .Since, in this case, P 0 is configured as HZ, V A and V B again coincide throughout the discharge, and V A (0) = V B (0) = V in (see Fig. 4), such that trigger instants in nodes A and B are given by Providing the last two time measurements of the estimation method.
The equations system formed by ( 4), ( 5), ( 14)-( 16) will give the values of R y , R x , and C x .Unlike other proposals, the solution in this system is simple, as shown below.
First of all, it should be noted that using the results shown in ( 5), (14), and (15) Meanwhile, for (4) and ( 5) Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.
where the second term inside the square brackets can be written, using (15) and ( 16), as ln We define k is a value selected by the designer and stored in the DP.With ( 19) and ( 20), (18) gives Clearing R p C x and using ( 17) Also using ( 19), ( 14) can be rewritten as Obtaining the value of R y Substituting R p /R x and R p C x in this expression for those shown in ( 17) and ( 22) obtains R y as a function of the time measurements, R A and R B .This value of R y can be used to find R x from (1) and ( 17) Finally, as (17) provides the value of R p from R x , we can find C x from ( 22) The expressions ( 24), (25), and ( 26), together with ( 17) and ( 22), provide the RIM parameters.The mathematical operations involved in the calculations are simple and easy to implement in modern DPs, reducing the hardware, estimation time, and power consumption.

B. Error Analysis
As indicated, the value of r o has not been considered in the above results, which will inevitably result in an error in the estimates.However, typical r o values are in the range of 10-20 for many DPs, meaning that selecting values of R A + R B in the order of a few kiloohms may suffice to disregard errors due to r o .It should also be remembered that choosing high values of R B also helps ensure ( 10) is met.
The values of R A and R B must be measured carefully to avoid errors that can be introduced into the calculations of R x , R y , and C x .For example, the uncertainty in the values of R A and R B , u(R A ) and u(R B ), cause uncertainty in R y , u(R y ), which can be determined by (24), taking into account that the exponent that appears in (24) only depends on time measurements From this expression and after some simple calculations, the relative uncertainty u(R y )/R y can be obtained as This expression shows that the relative uncertainty of R y is always greater than that of R B , its value depending on R A /R y .Similar results can be found for R x and C x .In any case, if a direct measurement of R A and R B is not carried out, it is necessary to use resistors with low tolerances and temperature coefficients.
The correct operation of the circuit requires the value of V in at the beginning of discharges D1, D2, and D4 to be the same for all.This means that the duration of the Ch sub-steps should stabilize the voltage in C x at the maximum possible value.Since charging occurs with current flowing through R y and R x , this duration depends on the time constant (R y ∥R x )C x .A Ch duration of approximately 5 • (R y,max ∥R x,max ) • C x,max may be sufficient to guarantee an equal V in in all charges [26] (R y,max , R x,max , and C x,max are the maximum values of R y , R x , and C x , respectively).
In either case, noise in the supply voltage will inevitably show up in V in , causing errors in the estimates [26].Reducing such noise is not always possible, especially when working with commercial DPs.In contrast, the designer can reduce the noise generated by the DP itself, minimizing its activity throughout all the steps in Table I.
However, the source of error that has proven to be most significant is due to the stray capacitors, as necessarily appearing in nodes A and B in Fig. 3 (there is another stray capacitor in the P 0 pin node, but its effect on the estimates is much smaller).The capacitances of these elements are much lower than C x , but they can introduce important distortions in the estimates without due caution.It should also be noted that once a DP has been chosen, little can be done to reduce its values other than to ensure good circuit routing design.In any case, these stray capacitors limit the minimum values of C x in the RIM since, as their capacitance increase, the time measurements will move away from the values established in ( 4), ( 5), ( 14)-( 16).This is due to the new time constants that these capacitors introduce into the circuit analysis, which can only be ignored if C x is much larger than these parasitic capacitors.
The main effect caused by these capacitors occurs during step D4 of Table I.In this step, discharge only occurs through R x , so if the stray capacitors did not exist, the voltage of the RIM's internal node would be immediately replicated Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.
in nodes A and B. This is the situation considered when expressing the values of T x,A and T x,B through ( 15) and ( 16).However, the presence of stray capacitors causes trigger instant in node A to occur slightly later than shown in (15), and even later in node B than shown in (16).This is because the voltages stored in A and B are greater than that stored in C x (although since (10) must be verified for the correct functioning of the circuit, then the initial values of V in , V A , and V B are very similar at the end of the Ch sub-steps).Fortunately, most of this excess charge stored in the stray capacitors can be removed by introducing the In sub-step.Additionally, since the parasitic capacitors have low values, the duration of the In sub-step can be small.
At the end of the In sub-step V B < V A < V in as a result of voltage drops in resistors R y and R A .As mentioned, the In sub-step can be very short since the previous inequalities are verified quickly.
In any case, regardless of the values of R y , R x , or C x , the estimates ( 24), (25), and (26) will be more accurate when including the In sub-step.Finally, it should be noted that although the discharge D3 is only through R x , the initial voltage of node A during this part of the discharge is also slightly lower than for the internal node of the RIM, reducing the delay in measuring T p−x,A .
Although including the In sub-step increases the complexity of the estimation process, the improvement in the accuracy of the estimates compensates for this drawback.

III. EXPERIMENTAL RESULTS AND DISCUSSION
The Randles impedance readout circuit has been built using a commercial board, namely the Digilent CMOD A7 (Pullman, Washington).This board uses an FPGA (Xilinx Artix 7 XC7A35T) as the DP, with 3.3 V as the V DD value for the pins.The FPGA pins to perform the functions of P A , P B , and P 0 are CMOS technology tri-state pins, ensuring an HZ state when configured as inputs.The internal clock frequency is set to 100 MHz, and both the rise and fall edges of the clock have been used to detect the trigger instants.The time measurements count is therefore incremented every 5 ns.The threshold voltages, V TLA and V TLB , measured experimentally in pins P A and P B , are approximately 1.26 V (the same in both cases).
R A = 1999.2and R B = 11791.0have been chosen to estimate the emulated Randles impedances, with R y ranging from 1 to 7 k , R x ranging from 19.5 to 200 k , and C x ranging from 10 to 100 nF.These values for the RIM include several ranges that appear experimentally in the literature and will be used for comparison purposes.It should be noted that R A + R B , R x , and R y ≫ r o are verified because the FPGA pins configured as outputs have output resistance values around 15 .Furthermore, it should be noted that R x , R y , R A , and R B have been chosen such that they verify (10)-( 12) even in the worst case (minimum R x , maximum R y ).
Six discrete resistors for R y and seven discrete resistors and capacitors for R x and C x were used for the estimates.These elements were measured with an RS PRO LCR-6300 m.In total, 6 • 7 • 7 = 294 Randles parameter impedance combinations have been estimated.Fig. 5 shows the actual waveforms of V A and V B in the circuit in Fig. 3 obtained in a Digilent Analog Discovery 2 data acquisition system when C x = 33.30nF, R x = 100.064k , and R y = 999.8 .T Ch = 0.7 ms has been chosen instead of 3.5 ms, which is used in normal operating mode, for better visualization.Note that the duration of the In sub-steps is practically imperceptible except for the two spikes that appear at the beginning of D4 discharges.The duration of the In sub-step, T In in Fig. 4, is only ten clock cycles, 100 ns, thus maintaining a voltage very close to V in in C x after this step (maintaining a high voltage in the capacitor increases the time measurement values and, therefore, the resolution of the estimates).Taking these data into account, the time required to perform all the steps in Table I and estimate the RIM parameters, T M , is The maximum value of T M is obtained when R y , R x , and C x take their maximum values, resulting in 69.8 ms.The time required to perform the arithmetical operations shown in ( 17), ( 22), ( 24), (25), and ( 26) should be added to this time.However, given the capabilities of the FPGA, these times are several orders of magnitude lower than the calculated value and have been neglected.
To find the results presented below, two hundred estimates have been made for each combination of R y , R x , and C x .The total number of estimates made was 200 • 294 = 58 800.A figure of merit has been derived from these measurements, characterizing the performance of the new circuit: Maximum Relative Error for the estimate of X , e R (X ), where Being X (i) each of the estimates of R y , R x , or C x , and X a the actual value of R y , R x , or C x .
The main problem in analyzing the e R (X ) values is that it is a function that depends on three variables, R y , R x , and C x , which makes their direct graphic representation unfeasible.To overcome this problem, we first present the results as shown in Fig. 6, where e R (R x ), e R (C x ), and e R (R y ) appear as Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.functions of the product R x C x for different values of R y .The values of the relative errors are quite similar in the three charts in Fig. 6, although slightly higher in the estimates of R y .For the whole range of values of R x C x , the maximum value of e R (R x ) is 1.22%, e R (C x ) is 1.25%, and e R (R y ) is 1.66%.
More interesting is the fact that the values of the three relative errors appear randomly along the abscissa axis, except for R y = 6980.0 .In this case, the peaks and troughs of the relative errors indicate a certain dependence on one of the two variables that make up the time constant.For the rest of the values of R y , this type of dependency is barely observed.Fig. 6 also shows that, with the maximum value of R y , the largest errors occur for the smallest time constants.This is perfectly logical since increasing R y decreases V in , thus reducing the resolution of the time measurements, and the same is true when decreasing R x C x .The result is that any error in determining trigger instant (e.g., due to circuit noise) is of greater importance when the value of R y is maximum As the most significant situation occurs when R y = 6980.0, Fig. 7 shows, in this case, the e R (R x ), e R (C x ), and e R (R y ) values for all R x -C x combinations.Fig. 7 allows us to analyze the relative errors' dependence on R x or C x, as inferred in Fig. 6.Fig. 7(a)-(c) show that all relative errors increase for minimum values of R x .This effect is clearer for e R (R x ), Fig. 7(a), since e R (R x ) is practically constant in all other R x -C x combinations.However, an increase in the value e R (C x ), Fig. 7(b), is also observed with the increase of C x , although with a smaller dependence than in the case of the decrease of R x .The same applies to e R (R y ), Fig. 7(c).Finally, Fig. 7(a)-(c) present a peak for the minimum combination of values R x and C x .As commented, this peak is related to quantization effects on the timing measurements.
Finally, Table II compares the characteristics of the new proposal and the other circuits presented in the literature for  [11], [14], and [18] cannot be implemented in a portable system, requiring a personal computer to control the processes and perform the estimation calculations.In addition, all these proposals need a variable number of analog modules for their operation.
In [11], it is necessary to perform an EIS to obtain the estimates, meaning the number of measurements is high.Despite the good results obtained for errors in this proposal, it should be noted that these are only presented for a single combination of RIM parameters.
The situation in [14] and [18] is similar in terms of hardware, although only three time measurements are needed for the estimates.Once again, errors are provided for a single combination of RIM parameters.
Only the proposal introduced in [16] and the one presented here allow the design of a simple portable system.Furthermore, both proposals present results for different ranges of RIM parameter values.Although [16] only uses three time measurements, the level of errors is high, while in the new proposal, errors are similar to those of a much more complex system such as [11], but lower than those of the other proposals.Note that, in this work, the R x and R y values range can be modified as long as ( 10)-( 12) are verified.For C x , there is no problem in increasing their values, although those of the parasitic capacitors will determine the minimum values.
Finally, Table III shows other parameters of interest, as defined in [27], that characterize the new method.Note that Nonlinearity has been calculated using multivariate analysis.The following parameters show the worst-case values for all possible R x , R y , and C combinations.

IV. CONCLUSION
A new circuit has been presented to estimate the parameters of an RIM in digital format.The circuit aims to simultaneously simplify the hardware and reduce arithmetical calculations, allowing the design of a portable, low-power system.
The circuit uses a simple DP, as the central element without needing ADCs or other active elements.Only two resistors of known value are required, together with the DP.To obtain the RIM estimates, the DP performs three charge-discharge processes of the impedance capacitor, taking five time measurements across its pins.Finally, a few simple arithmetical operations are performed on these measurements to produce the results.
As proof of concept, the circuit been implemented using an FPGA as the DP.Different ranges of RIM parameter values have been used to evaluate performance, in a set of 294 combinations of values.The relative errors obtained in the estimates vary (depending on parameter to be estimated) between and 1.66%, in line with the best results of more complex proposals.

Fig. 3 .
Fig. 3. New proposal to obtain R y , R x , and C x in a RIM.

Fig. 4 .
Fig. 4. Waveforms expected for the new proposed method in the steps and sub-steps shown in TableI.The green curves show the evolution of V A and V B when they coincide.

Fig. 5 .
Fig. 5. Waveform for V A and V B in the circuit in Fig. 3. Horizontal orange lines show V TL = 1.26 V.

Fig. 6 .
Fig. 6. errors in estimating R x , C x , and R y as a function of the R x C x product for different R y values.(a) e R (R x ), (b) e R (C x ), and (c) e R (R y ).

Fig. 7 .
Fig. 7. Dependence of relative errors with R x and C x , maintaining R y = 6980.0 .(a) e R (R x ), (b) e R (C x ), and (c) e R (R y ).

TABLE I STEPS
TO OBTAIN TIME MEASUREMENTS IN THE READING OF THE RANDLES IMPEDANCE