Role of the GaN-on-Si Epi-Stack on ΔRON Caused by Back-Gating Stress

This article reports an in-depth analysis of the ON-resistance drift (<inline-formula> <tex-math notation="LaTeX">$\Delta {R}_{ \mathrm{\scriptscriptstyle ON}}{)}$ </tex-math></inline-formula> induced by storage/release mechanisms occurring in the buffer of GaN-on-Si power devices. The role of both stress condition (bias, temperature, and stress time) and buffer’s epi-stack composition on <inline-formula> <tex-math notation="LaTeX">$\Delta {R}_{ \mathrm{\scriptscriptstyle ON}}$ </tex-math></inline-formula> has been analyzed by means of back-gating current deep-level transient spectroscopy (I-DLTS). The results reveal two competing mechanisms: 1) a faster one related to acceptor defects and sensitive to the thickness of the carbon-doped GaN back-barrier (C:GaN) and superlattice (SL) layers and 2) a slower one ascribed to hole accumulation at the C:GaN/SL interface, independent of the thickness of the epi-stack. The temperature, stress bias, and stress time dependence of such mechanisms, often overlapping, have been investigated by adopting a genetic algorithm.

In most cases, the C:GaN layer plays a key role in R ON since it can lead to charge storage and release during high-voltage OFF-state operation.According to the "leaky dielectric" model [6], when the buffer stack is exposed to a vertical electric field, two mechanisms show up: 1) the ionization of carbon-related acceptor traps (C N ), promoting the storage of negative charge in the C:GaN layer, inducing R ON increase and 2) electron band-to-band tunneling from C:GaN valence band (VB) to two-dimensional electron gas (2DEG) through defects and dislocations, inducing hole accumulation at the C:GaN/superlattice (SL) interface, increasing the 2DEG density (R ON decrease).In [13], it is shown that charge propagation through the C:GaN and the unintentional doped (uid)-GaN are assisted by 1-D and 3-D variable range hopping, respectively.
In this work, we adopted the back-gating I-DLTS technique to explore how the test conditions (substrate bias, stress time, and temperature) and the thickness of the layers composing  the buffer epi-stack impacts on R ON .The latter is fitted with a stretched exponential model by means of a mathematical approach, based on the study of the derivative, combined with a genetic algorithm to minimize the fitting error.

II. EXPERIMENTAL DETAILS
A sketch of the devices under test (DUTs), fabricated by IMEC on 200-mm Si substrate for low-voltage HEMTs (<100 V), is shown in Fig. 1(a).The main difference with respect to GaN HEMT lies in the absence of the gate region.In this case, a passivation region is deposited on top of the AlGaN barrier and two ohmic contacts are created.Such a structure allows focusing the analysis directly on the buffer region, avoiding possible gate overdrive-dependent trapping mechanisms.The process splits on layers' thicknesses have been analyzed.The reference structure features an epi-stack composed of a 200-nm-thick AlN nucleation layer grown on top of Si-substrate, 330-nm-thick SL layer, 500-nm-thick C:GaN layer, 200-nm-thick uid-GaN channel layer, and 11-nm-thick Al 0.23 GaN 0.77 barrier layer.
The back-gating I-DLTS test consists of three consecutive steps: 1) the fresh current (I 0 ) between the two ohmic contacts [see Fig. 1(a)] is measured with an applied voltage drop of 0.7 V and V B = 0 V; 2) a negative substrate stress voltage (V B ) is applied for a fixed stress time (t S ); and 3) the current between the two ohmic contacts is monitored under the same electrical conditions reported in 1) until the recovery is completed.Finally, the current monitored during step 3) is normalized (I N ) with respect to the fresh value measured in 1).The reason why the current is monitored during the recovery rather than the stress phase is related to 2DEG depletion, which occurs for |V B | > 50 V, making the current monitoring difficult and noisy.Experiments have been performed at different temperatures, stress times, and V B .i.e., I N increase followed by a decrease toward the prestress value.For the sake of clarity, from here on, the faster (first) transient and the slower one (second) will be referred to as TR1 and TR2, respectively.In [11], the I N increase is ascribed to electron detrapping from acceptor states in the C:GaN layer, which leads to a gradual increase of the 2DEG density (Ron decrease), whereas TR2 is associated with recombination of holes accumulated at the C:GaN/SL heterointerface, inducing an R ON increase (2DEG decrease).More details on the physical mechanisms can be found in [6], [7], [8], [9], [10], and [11].It is worth noting that this description refers to the recovery phase; exactly the opposite occurs during the stress phase, i.e., electron trapping in acceptor states and hole accumulation at the C:GaN/SL interface, leading to R ON increase and decrease, respectively.

IV. TRANSIENTS ANALYSIS METHODOLOGY
The adopted methodology is based on the stretched exponential fitting law [24], by approximating I N as follows: f i (t) is the ith stretched exponential, N is the number of involved charge/discharge processes, A i is the transient amplitude representing the amount of stored/released charge, τ i is the charge emission time constant, and β i is a stretching term representing the "slope" of the transient.The ith derivative is To estimate τ i and simplify the computation, we define ψ i (t) as to verify that maxima or minima of ψ i (t)is located at t = τ i .Then, the triplet (A i , β i , and τ i ) can be retrieved as Âi = e f i τ i βi = − e ln( 10) The question arises whether the estimation of A i ,β i , and τ i parameters is correct or not by following this approach.By assuming that τ 1 ≪ τ 2 ≪ • • • ≪ τ N , the proposed method searches for the maxima and/or minima of the logarithmic derivative of f (t) given by ψ(t) A k (7) for all i = 1, . . ., N. Solving the linear system described in (7), estimates of A 1 , A 2 , . . ., A N can be obtained.Lastly, β coefficients can be estimated by using (6).By observing Fig. 1(b), the number of transients is N = 2, and the solution is a set p

of fitting
Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.parameters with constraints A 1 < 0, A 2 > 0, τ 1 < τ 2 , and The criticality lies in the accuracy of (7), which is ensured only if τ 1 and τ 2 are significantly different from each other.In addition, even if the current transients are nicely reproduced, ψ i (t) may not match the actual derivative.To get rid of such issues, the preliminary estimation is used as an initial solution of an optimizing algorithm, which minimizes an error function defined as the sum of the root-mean-square error (rms) of I N (t) and its logarithmic derivative [29] The goal of such an algorithm is to find the optimal set of parameters p providing the best fit of the transients and their derivatives.This is possible by using a differential evolution algorithm [29], [30], i.e., a metaheuristic method that iteratively reduces E by evolving a population of approximate solutions accordingly to genetic algorithm methodology [31].An initial population of vectors is generated by adopting the methodology described in this section.Then, a competitor (different possible solution) for each parameter vector under test is constructed by mutation and crossover over the current population.Each population element is compared with its own competitor and only one is selected (i.e., the one with the lower error), resulting in an evolved population.Finally, the mutation, crossover, and selection steps are iterated until the genetic algorithm is unable to generate a solution with a smaller error.This tool finds several applications in telecommunication systems, such as the optimization of low-density parity-check (LDPC) codes degree profile [32] and the design of coded random access protocols [33].

V. ROLE OF THE TEST CONDITIONS
A. Temperature Dependence , widely adopted for this study, has been chosen to: 1) allow a saturation of TR2 for any V B and 2) avoid causing permanent degradation.As observed, the methodology described in Section IV guarantees a good fitting, also in the case of high temperatures where the two transients are superimposed.Similar analyses have been performed also with different |V B |, i.e., 75, 100, and 150 V.Both transients TR1 (ascending) and TR2 (descending) show a clear temperature dependence, suggesting the presence of thermally activated charging/discharging processes with an activation energy (E A ) of 0.2 and 0.38 eV, respectively (Fig. 3).Such values are similar to the ones extrapolated in [13], [19], [34], and [35] by means of back-gating measurements on AlGaN/GaN buffers.
In the case of TR1, its ascending trend may be ascribed to electron emission from acceptor traps in C:GaN layer, as reported in [6], [11], and [12].In [36], [37], and [38], E A = 0.2 eV has been ascribed to carbon atoms occupying substitutional position on nitrogen sites (C N ), leading to the creation of acceptor shallow traps with E A between 0.08 and 0.29 eV from VB.However, more recent studies [39], [40] report that the C N acceptors in GaN bulk are energetically located at 0.9 eV from VB.In such a case, the adoption of a relatively high carbon concentration (∼10 19 in this case) determines a Fermi level position slightly lower than the one of C N , forcing the occupation of any possible preexisting acceptor states (assuming lower concentration with respect to C N ) with energy level below the Fermi one.This has been confirmed by TCAD simulation (not shown).Consequently, it is more plausible that the extrapolated E A = 0.2 eV is not ascribed to the trap itself, but it represents the activation energy of trap-assisted charge transport in a defect band, probably centered at 0.9 eV from VB, i.e., carbon-related.In [13], a 3-D hopping via a defect band mechanism has been proposed.Additional discussion, supported by TCAD simulations, will follow in Section VI.
Regarding TR2, E A = 0.38 eV might be associated with donor-like defects such as C GA [41], oxygen [42], or silicon  [19] impurities.However, most likely, such value is not related to a defect itself but it could represent the energy of a charge-transport mechanism leading to electron-hole recombination among excess 2DEG electrons and holes accumulated at the C:GaN/SL heterojunction during the stress phase [13].
Fig. 4(a) and (b) shows the temperature dependence of the stretched exponential fitting parameters A and β, respectively.A is temperature-independent in both transients TR1 and TR2 [Fig.4(a)], suggesting that the amount of charge trapped (TR1) and accumulated (TR2) during the stress is temperatureindependent; it can be faster or slower but the quantity is only bias-dependent (detailed in the next section).Regarding β, a T-dependence is shown in the case of TR1, i.e., the higher T the higher β 1 , while β 2 (TR2) is almost independent, suggesting two distinct mechanisms and strengthening the theory reported in [13], i.e., electron detrapping from acceptor states (TR1) and recombination of the accumulated hole density at the C:GaN/SL interface (TR2).

B. Substrate Stress-Bias Dependence
To investigate the V B dependence of the two transients, tests have been performed at T = −20 • C in order to have TR1 and TR2 quite distant from each other and to measure a bigger excursion of TR1.Fig. 5(a) shows the amplitude A 1 of TR1 as a function of |V B |. Two regimes can be observed.For |V B | ≤ 50 V, A 1 is roughly constant and quite small, smaller than A 2 [Fig.5(b)].In this region, the electron trapping during the stress can be compensated and/or perturbed by the mechanism inducing hole accumulation at the C:GaN/SL interface, i.e., band-to-band electron tunneling from C:GaN VB to 2DEG.Electrons tunneling releases free holes in the VB, which can accumulate at the C:GaN/SL interface as free charge or neutralize the acceptor states [6], opposing the increase of A 1 .For |V B | > 50 V, A 2 saturates (also for short t S ) while A 1 increases with |V B | becoming bigger than A 2 .In this regime, on the one hand, leakage can start to flow through the entire epi-stack, electrons are injected from the substrate, and hole accumulation at the C:GaN/SL interface saturates, as well as A 2 .On the other hand, more electrons can be trapped in the C:GaN layer because of the higher electric field, increasing A 1 .The latter mechanism is further supported by TCAD simulations reported and discussed in the next section.
Fig. 6(a) reports the V B -dependence of β. β 1 decreases by increasing |V B |, except for low |V B |, whereas β 2 is biasindependent.As reported in [20], when the stretched exponential model is adopted to fit the effects of trapping/detrapping mechanisms, β can represent the energy window of the trap involved in the mechanisms.A value close to 1 implies that the trap behaves like a point defect with a discrete energy level, whereas a smaller β is associated with trapping centers forming a continuous distribution of energy levels.Based on this assumption, the smaller β 1 by increasing |V B |, reported in Fig. 4, may be the result of charge trapping during the stress in a wider energy window centered at ∼0.9 eV.On the contrary, the lack of V B -dependence of β 2 further supports that TR2 is not linked to charge detrapping mechanisms but to the recombination of holes accumulated at the C:GaN/SL interface.The two mechanisms are further supported by the V B -dependence of τ 1 and τ 2 reported in Fig. 6(b).Also in this case, τ 1 is stress bias-dependent while τ 2 is not, confirming and excluding trapping/detrapping mechanisms for TR1 and TR2, respectively.is not monotonous because of the two competing mechanisms occurring during the stress phase, i.e., ionization and neutralization of acceptor states in the C:GaN layer, caused by the electric field and by free hole releasing (electron band-to-band) in the VB, respectively.Nonmonotonic R ON drift has also been reported in [43].

C. Stress Time Dependence
For |V B | > 50 V, A 2 is already saturated while A 1 increases hinting at a saturation for relatively long stress times (∼600 s with |V B | = 100 V), which is a typical behavior observed for trapping mechanisms in preexisting defects.
Finally, as expected, the stress time has no impact on β and τ , as reported in Fig. 8(a) and (b), respectively.

VI. ROLE OF THE BUFFER STACK COMPOSITION
Once the role played by the stress conditions is investigated, structures featuring different epi-stacks have been analyzed and compared.Fig. 9(a) shows I N in the case of structures featuring different AlGaN barrier configurations in terms of thickness and aluminum content (Al%).As observed, both do not significantly impact on, confirming that the underneath mechanisms do not originate from the AlGaN barrier and its interfaces.Fig. 9(b) reports the same analysis carried out on structures with different AlN nucleation layer thicknesses.A negligible impact is shown also in this case, excluding such layer as location of trapping/accumulation mechanisms.Since the charge storage/release mechanisms are linked to the C:GaN layer, a detailed analysis has been performed by changing its thickness and the one of the SL layer.
First, a T-dependent analysis has been carried out with |V B | = 200 V and t s = 600 s.The Arrhenius plot in Fig. 10 shows that the activation energies of TR1 and TR2 are unimpacted neither by SL nor by C:GaN thickness, suggesting that the kind of storage/release mechanisms are always the same.
To investigate the role of the two layers on TR1 and TR2, the amplitudes A 1 and A 2 have been analyzed for each split as a function of |V B | and reported in Fig. 11(a) and (b), respectively.By focusing on TR1 [Fig.11(a)], thus on the electron detrapping from carbon-related acceptor states in the C:GaN layer, two trends can be observed: 1) the thinner the C:GaN layer, the smaller the A 1 and 2) the thicker the SL layer, the smaller the A 1 .
To better understand such experimental evidences, TCAD simulations have been performed by introducing an acceptor states concentration of 5• × 10 18 cm −3 at 0.9 eV from the VB in the C:GaN layer, which is similar to carbon concentration.Fig. 12(a) reports the electron trapped charge (eTC) density along the C:GaN and SL layers in the case of processes featuring the same and different thicknesses for SL (t SL = 330 nm) and C:GaN (t C:GaN = 0.5 and 1 µm) layer,  As a result, the smaller the C C:GaN (thicker C:GaN), the higher the V C:GaN , and the lower the V SL .The result of such a divider is a higher electric field in the C:GaN layer [Fig.12(b)], inducing a higher amount of trapped electrons (higher A 1 ).The opposite effect is obtained by increasing the SL layer thickness, i.e., the thicker the SL, the lower the V C:GaN and related electric field, the lower the eTC.Fig. 13 shows the simulated eTC in the C:GaN layer, calculated with respect to V B = 0 V, for all the process splits.The |V B |-dependence is qualitatively in agreement with the experiments [A 1 , Fig. 11(a)].
Concerning TR2, Fig. 11(b) shows an almost V Bindependent A 2 , except for the low-bias regime where hole accumulation is not saturated yet (see Section V-B), even for relatively long t S .In such a case, a thicker SL helps to significantly reduce the electric field along the uid-GaN and C:GaN layers, weakening the electron band-to-band tunneling and giving rise to a smaller A 2 [Fig.11(b)].

VII. CONCLUSION
An in-depth analysis of the role of both test conditions and epi-stack buffer of GaN-on-Si devices on the mechanisms inducing R ON has been investigated by means of back-gating I-DLTS tests.For the first time, a genetic algorithm has been employed to accurately fit the experiments, which are often the result of two superimposed mechanisms, allowing us to investigate the temperature, stress-bias, and stress-time dependence of the representative parameters (A, β, and τ ).According to the state-of-the-art, the first one is ascribed to electron trapping/detrapping in carbon-related acceptor states located in the C:GaN layer, whereas the second one can be associated with hole accumulation at the C:GaN/SL heterointerface.
A further novelty of this work relies on the study of the role of the buffer epi-stack, reporting that both mechanisms do not show dependence on the kind of adopted AlGaN barrier (neither thickness nor Al%) and on the thickness of the AlN nucleation layer.In addition, the second mechanism is almost insensitive also to C:GaN and SL thickness, except for low |V B |, whereas the electron trapping in acceptor states is clearly depending on these layer thicknesses, providing useful information for the epi-stack optimization, i.e., vertical scaling down.In particular, a thinner C:GaN layer and a thicker SL layer turn out to be the best choice to attenuate the R ON induced by charge storage/release mechanisms, triggered by OFF-state voltage, in the buffer epi-stack.

Fig. 1 .
Fig. 1.Sketch (not to scale) of the device under test and the epi-structure.(a) Recovery current transient for different buffer configurations.(b) Stressing phase has been performed for 600 s with |V B | = 200 V at T = 100 • C.

Fig. 1 (
b) reports I N after a stress phase of 600 s with |V B | = 200 V and T = 100 • C for all the process splits considered in this work.The current features two consecutive transients,

Fig. 2 .
Fig. 2. (a) Recovery current transient and (b) its derivative with different temperatures ranging between −40 • C and 200 • C. The stressing phase has been performed for 600 s with |V B | = 200 V.

Fig. 2 (
Fig. 2(a) and (b) shows I N and its derivative, respectively, in the case of |V B | = 200 V, stress time t S = 600 s, and temperature ranging from −40 • C to 200• C. Such t S , widely adopted for this study, has been chosen to: 1) allow a saturation of TR2 for any V B and 2) avoid causing permanent degradation.As observed, the methodology described in Section IV guarantees a good fitting, also in the case of high temperatures where the two transients are superimposed.Similar analyses have been performed also with different |V B |, i.e., 75, 100, and 150 V.Both transients TR1 (ascending) and TR2 (descending) show a clear temperature dependence, suggesting the presence of thermally activated charging/discharging processes with an activation energy (E A ) of 0.2 and 0.38 eV, respectively (Fig.3).Such values are similar to the ones extrapolated in[13],[19],[34], and[35] by means of back-gating measurements on AlGaN/GaN buffers.In the case of TR1, its ascending trend may be ascribed to electron emission from acceptor traps in C:GaN layer, as reported in[6],[11], and[12].In[36],[37], and[38], E A = 0.2 eV has been ascribed to carbon atoms occupying substitutional position on nitrogen sites (C N ), leading to the creation of acceptor shallow traps with E A between 0.08 and 0.29 eV from VB.However, more recent studies[39],[40] report that the C N acceptors in GaN bulk are energetically located at 0.9 eV from VB.In such a case, the adoption of a relatively high carbon concentration (∼10 19 in this case) determines a Fermi level position slightly lower than the one of C N , forcing the occupation of any possible preexisting acceptor states (assuming lower concentration with respect to C N ) with energy level below the Fermi one.This has been confirmed by TCAD simulation (not shown).Consequently, it is more plausible that the extrapolated E A = 0.2 eV is not ascribed to the trap itself, but it represents the activation energy of trap-assisted charge transport in a defect band, probably centered at 0.9 eV from VB, i.e., carbon-related.In[13], a 3-D hopping via a defect band mechanism has been proposed.Additional discussion, supported by TCAD simulations, will follow in Section VI.Regarding TR2, E A = 0.38 eV might be associated with donor-like defects such as C GA[41], oxygen[42], or silicon

Fig. 4 .
Fig. 4. Temperature dependence of the: (a) amplitude A i and (b) stretching parameter β i and for the two transient TR1 and TR2.Parameters have been extrapolated from measures reported in Fig. 2.

Fig. 7
Fig.7reports the stress time dependence of the A i parameters for three different V B .As anticipated in Section V-B, as long as A 1 is smaller than A 2 (|V B | < 50 V), the trend of A 1 with both stress bias [Fig.5(a)] and stress time [Fig.6(a)]Authorizedlicensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.

Fig. 7 .
Fig. 7. Stress time dependence of Ai in the case of: (a) TR1 and (b) TR2.The temperature is −20 • C.

Fig. 8 .
Fig. 8. Stress time dependence of: (a) stretching parameter and (b) trap emission time for both transients.The temperature is −20 • C.

Fig. 9 .
Fig. 9. Dependence of I N in the case of: (a) different AlGaN barrier configurations and (b) AlN thicknesses.Test condition is T = 100 • C, t S = 600 s, and V B = −100 V.

Fig. 10 .
Fig. 10.Arrhenius plot in the case of stress voltage V B = −200 V, with a stress time of 600 s in the case of different process splits.

Fig. 11 .
Fig. 11.Stress voltage dependence of Ai in the case of: (a) TR1 and (b) TR2 for different process splits.The test condition is T = 25 • C and t S = 600 s.

Fig. 12 .
Fig. 12.(a) TCAD simulated eTC density along the vertical direction (y cutline) with |V B | = 150 V for two structures featuring the same t SL = 330 nm and a C:GaN layer thickness of 0.5 (red line) and 1 µm (blue line).(b) Corresponding simulated electric field.