Accurate Extraction of Minority Carrier Lifetimes—Part I: Transient Methods

A well-defined and high minority carrier lifetime is a key enabler for high-performance optoelectronic detectors. To verify the targeted carrier lifetime various experimental methods such as open circuit voltage decay (OCVD), reverse recovery (RR), and combined current-voltage (I-V)/capacitance-voltage (C-V) (cIVCV) methods have been proposed in the literature. However, the extracted lifetimes can differ between the techniques, primarily due to geometric effects such as the epitaxial layer thickness. To evaluate the quality of these methods dedicated test structures, i.e., p-n junctions embedded in 20 ${ \boldsymbol {\mu }}\text{m}$ epitaxial pp+ silicon wafers, are characterized. In the first part of this work, we present the theoretical framework for describing minority carrier lifetimes in Silicon and review their extraction based on two selected transient methods, i.e., OCVD and RR. Whilst the experimental efforts for these methods are more challenging than for steady-state characterizations, such as cIVCV, the data analysis appears less demanding. To verify the accuracy of the methods, we benchmark them against computer simulations based on the drift-diffusion model with various minority carrier lifetimes. To investigate the influence of the electric field (associated with the lowly-doped epitaxial layer to the highly doped substrate transition) on the extracted carrier lifetimes, simulations with and without substrate are compared, and a strong influence of this low-high transition on the extracted parameters is observed. This effect can be modeled with an effective surface recombination velocity associated with the low-high transition region. Additionally, experimental data of the aforementioned structure are analyzed and compared to the computer simulations. We can show that OCVD and RR are excellent candidates for the extraction of effective carrier lifetimes on epitaxial p-n junctions.


I. INTRODUCTION
M INORITY carrier lifetime plays a crucial role in the operation of optical devices. For many applications a high lifetime is desirable, as, e.g., a high minority carrier lifetime leads to an increased quantum efficiency of solar cells and photodetector [1], [2]. For photodetector fabrication, epitaxial layers are typically created on a Si substrate. The carrier lifetimes in epitaxial layers are, however, strongly affected by recombination via bulk and interface defects [3], which can be described by the Shockley-Read-Hall (SRH) recombination model [4], [5]. Additionally, Auger recombination and direct recombination can reduce the maximum achievable lifetime. Since for lowly doped Si the SRH recombination rate dominates over the other processes [6] and is strongly affected by the number of defects, the extraction of minority carrier lifetimes is commonly used to characterize the purity of semiconductor devices or the quality of semiconductor processes [7]. Several methods exist that allow for the extraction of lifetime parameters, where a comprehensive summary is given in [8]. However, obtaining reliable lifetime measurement results remains challenging, as the methods and samples employed might lead to deviations in the extracted lifetimes [9], [10]. Additionally, lifetimes extracted on test structures consisting of an epitaxial layer grown on a substrate might strongly depend on the geometry, i.e., thickness of the epitaxial layer as well as interface properties, effectively described with a surface recombination velocity. This geometry-related lifetime might dominate at small epitaxial layer thicknesses leading to reduced effective carrier lifetimes even for very pure and defect-free materials. Challenges arise in finding proper methods to measure these effective lifetimes as well as to correctly interpret the results which is addressed in this work.
Contrary to contactless measurements such as photoluminescence (PL) or microwave photoconductance decay (µ-PCD), the methods presented in Parts I and II of this work require the preparation of a device with ohmic contacts and the establishment of an electric connection between the device under test and the measurement system. Contactless measurements are predominantly used in the photovoltaic (PV) community to characterize raw materials as well as wafers at various processing steps, however, there are recent approaches to utilize these methods also for other semiconductor devices [4]. Unlike the "device-resolved" lifetime results presented in this work, lifetime results by contactless measurements are "spatially" resolved. In this work we compare the results of two commonly employed lifetime extraction methods, i.e., open circuit voltage decay (OCVD) and reverse recovery (RR), to address the challenge of selecting the most suitable technique for minority carrier lifetime characterization. In Part II of this work [11] we discuss the extraction of carrier lifetimes by means of combined current-voltage (I-V) and capacitance-voltage (C-V) (cIVCV) measurements. Additionally, we provide computer simulations using the Synopsis Sentaurus TCAD simulation tool [12].
II. THEORY For our work, dedicated Si test structures exhibiting an n + implant in a p-doped epitaxial layer have been fabricated. This means that in all samples employed in this work electrons are the minority carriers. However, similar conclusions can be drawn with the opposite configuration, i.e., holes as minority carriers.

A. Minority Carrier Lifetimes in Silicon
The lifetime of carriers is mainly determined by their recombination rate. The total recombination rate R can be calculated as the sum of the following components: where R SRH , R Auger , and R radiative are the SRH, Auger and radiative recombination rate, respectively. Note that the different recombination rates depend on the doping concentration of the bulk material N A (acceptor doping), as can be seen in Fig. 1. Based on R, the minority carrier lifetime for electrons τ 0 is defined by the following equation [7]: where δn is the excess electron concentration. According to (1) and (2) the total recombination rate is dominated by the component exhibiting the highest recombination rate, whereas the lowest lifetime component dominates the total lifetime. Consequently, in a lowly p-doped sample (N A < 1 × 10 16 cm −3 , see Fig. 1) the SRH recombination is the dominating mechanism and thus the minority carrier lifetime will be predominantly given by the SRH lifetime. The bulk SRH recombination rate is given by the following equation [4], [5]: where n, p, n i are the electron, hole and intrinsic carrier concentration. τ n0 and τ p0 are the electron and hole lifetime parameters, respectively. n 1 and p 1 are auxiliary variables depending on the energetic trap position E t where E i , k B , and T are the intrinsic energy, Boltzmann's constant and device temperature, respectively. For a p-type sample with acceptor concentration N A , deep-level trap states (n 1 ≪ N A , p 1 ≪ N A ) and low injection levels (δn ≪ N A ), (2) and (3) can be simplified to [7]  Auger recombination is modeled after [13], and direct recombination after [14], with parameters stated in Table II. To explain the SRH recombination (3) is applied with τ n0 = τ p0 = 100 µs, which are typical values for silicon epitaxial layers [3]. The (solid black) vertical line marks the bulk doping concentration of the samples employed. The second (upper) x-axis shows the value of β extracted numerically out of (8). The ranges chosen for s r are typical for a Si EPI to substrate junction [15].

B. Effective Lifetime: the Epitaxial Layer to Substrate Interface
In addition to recombination in the bulk, recombination at surfaces as well as device geometry-related effects can decisively influence the measured effective carrier lifetime τ eff . For an epitaxial layer, these effects can be modeled employing the front and back surface recombination velocities s r 1 and s r 2 , respectively, as follows [15]: where D is the diffusion coefficient and the parameter β can be determined by solving the implicit equation [15] cot(βt EPI ) = where t EPI is the thickness of the epitaxial layer. In the case of asymmetric p-n junctions formed by heavily counterdoping the front surface region of the epitaxial layer, and for negligible recombination effects in the heavily doped region, s r 1 becomes negligibly small and (7) reduces to [16] and [17] cot  Table I. p + and n + regions are contacted and the top surface is passivated with an SiO 2 layer. The dashed horizontal lines marks the interface between the epitaxial layer and the substrate where interface recombination is modeled with the effective surface recombination velocities s r2 . The small rectangles on top of the structure indicate the contact placement (red -anode, blue -cathode). The widths of the contacts as well as the lateral distance of the contacts to the edge of the unimplanted regions are 400 nm.
It should be noted, that the assumption of negligible recombination effects in the highly doped region, and hence a negligible value for s r 1 , has been verified for our test devices (see Section III-A) by means of TCAD simulations, and therefore we utilize (8) to model our results presented in Section V. As shown in Fig. 2, a rather modest value of s r 2 between 1 and 100 cm s −1 has already a considerable impact on τ eff which is more pronounced at smaller epitaxial layer thicknesses t EPI . Typically, no injection-dependency for s r 2 and therefore also τ s is considered [18].

III. EXPERIMENTAL
To extract carrier recombination lifetimes from test structures an in-house measurement instrument, i.e., defect probing instrument [19], is used. The hardware has been extended deliberately in order to enable low-noise OCVD and RR measurements.

A. Test Structures
The test structures used in this work have been fabricated within a 350 nm CMOS process. As a start material, 14 cm epitaxial p/p + silicon wafers are used, and n + implants are made to form the p-n junction of the optical diodes. The nominal resistivity of the substrate material is 15 m cm. The epitaxial layer is contacted with p + implants adjacent to the n + region. The depth of the p + and n + regions is approximately 200 nm. In Fig. 3 the cross section of the devices is given and the corresponding parameters are listed in Table I. The width W stated in Table I is the extension of the p-n junction in the direction perpendicular to the cross section in Fig. 3.

B. OCVD Method
The OCVD technique [20], [21] has been proposed to determine minority carrier lifetimes in junction devices and relies on measuring the voltage decay across the junction after excitation at forward bias [a schematic circuit drawing can be seen in Fig. 4(a)].
The transient measurement applied works as follows: For the period t < t 0 the p-n junction is forward biased by a voltage V f (leading to the forward current I f ). At t 0 the circuit is opened using a switch and the open voltage decay from V oc = V f to V oc = 0 is recorded. Note that a high input impedance of the voltage acquisition unit is required as  otherwise the leakage current into the measurement system would dominate and distort the extracted lifetimes. From the data, a first-order carrier lifetime F can be extracted using where n is the ideality factor of diodes, with typical values between 1 and 2 [22]. It can be shown, that F shows a constant plateau immediately after opening the circuit which allows the extraction τ eff [23], see Fig. 5(b).

C. Reverse Recovery
The RR method also allows for the extraction of carrier lifetimes by transient I-V measurements on junction devices [31], [32], [33], see Fig. 4(b). For t < t 0 a forward voltage V f is applied resulting in a forward current I f . At t = t 0 the voltage across the p-n junction is switched from a forward to a reverse bias. Before the diode is able to block the current flux, minority carriers are still in place that must be removed.
Authorized licensed use limited to the terms of the applicable license agreement with IEEE. Restrictions apply.  5. Overview of OCVD measurements and simulation results is given above. (a) Open circuit voltage V oc versus time t for measurements and TCAD simulations. The inset shows a zoom into the first 50 µs after the switch has been opened. We attribute the significant difference between measurements and simulations of V oc at times larger than about 1 ms to parasitic effects [28], [29], [30]. (b) Extracted first order lifetime F versus time t. The dashed horizontal lines indicate the extracted effective lifetime τ eff .
These minority carriers will result in an initial reverse current I r , that will in the first stage remain constant until the excess carrier density at the edges of the space charge region has decreased to zero, which takes place within the storage time t s . Afterward, the reverse current will approach its equilibrium value I 0 [8]. The forward current I f , reverse current I r and storage time t s are related to the effective minority carrier lifetime τ eff via [34], [35] t s = τ eff ln 1 + I f I r + const (10) which allows for the extraction of τ eff .
IV. COMPUTER SIMULATIONS To ensure an accurate interpretation of the measurement results, computer simulations based on the drift-diffusion model have been performed using the Synopsis TCAD Sentaurus device simulator. The simulated cross section is shown in Fig. 3 and the placement of contacts is as described in the caption of Fig. 3. The used simulation models and parameters can be seen in Table II. Meshing toward the front surface is done as described in [36]. Front surface recombination (used parameters see Table II) is considered using the SRH interface recombination model. However, we could not observe a significant influence of this recombination mechanism on the extracted lifetimes. This result is not surprising as most of the front surface is covered by the n+ and p+ contact implants, and therefore the unpassivated front surface recombination area is very small (see Fig. 3 and compare L np versus L n according to Table I) in relation to the back surface. It should be noted that for the simulations the energetic trap position of the trap-mediated SRH bulk recombination in the epitaxial layer [see (3) and (4)] is fixed to E t − E i = 0.15 eV, as extracted by the cIVCV method in Part II [11] of our work. The lifetimes τ EPI for the epitaxial layer are systematically varied to investigate their impact on the extraction methods. To investigate to influence of the back surface and the associated back surface recombination velocity s r 2 , as introduced in (6) and (8), the simulations are repeated for a structure without highly doped substrate, that is the lowly doped epitaxial layer covers the whole sample thickness of 745 µm. The simulation results are discussed in the next section.

V. RESULTS AND DISCUSSION
Plots for measurement results of the OCVD method can be seen in Fig. 5, where the ideality factor n is extracted from the I-V measurements, which are part of the cIVCV methods discussed in Part II [11]. The graphs showing the voltage decay over time and the first order carrier lifetime F can be seen in Fig. 5. For the extraction of the lifetime, we plot F as a function of time on a log-log scale, where a plateau becomes visible and an effective lifetime of τ eff ≈ 9 µs can be extracted.
RR measurements have been performed as shown in Fig. 4 with a series resistor R of 10 k . A forward bias V f is applied for 10 ms resulting in a current I f ≈ 0.6 mA. Afterward, the diode is switched to different reverse biases leading to initial reverse currents I r of approximately 0.15-0.45 mA. As can be seen in Fig. 6(a), the varied values in the reverse bias lead to different value pairs of I r and t s (fixed I f ). A plot of the linear fit according to (10) can be seen in Fig. 6(b). The extracted lifetime is τ eff ≈ 9 µs.  The simulation results, as summarized in Table III, indicate that for τ EPI > 10 µs the extracted OCVD and RR effective lifetimes become much lower than τ EPI and thus an extraction of τ EPI via these methods becomes impractical. The reason for the considerable discrepancy at high τ EPI is the fact that due to the long diffusion length at high lifetimes the influence of the epitaxial layer to substrate interface becomes more dominant. Comparing the epitaxial diffusion lengths L EPI associated with the varied epitaxial layer lifetimes τ EPI , shown in Table III, to the thickness of the epitaxial layer t EPI , that is t EPI = 20 µm, one can see that lifetime deviations between τ EPI and τ eff start occurring once L EPI is comparable or larger than t EPI . Equivalently, referring to (6), in that case Dβ 2 becomes smaller than 1/τ EPI and starts dominating the effective lifetime τ eff . This explanation is supported by our simulation results for the structure without the substrate layer, where this discrepancy is less pronounced and measurement results rather give a small overestimation for τ EPI . The simulation results without substrate provide a good understanding of the influence of the epitaxial layer to substrate interface and indicate that the methods presented are suitable candidates not only to extract effective carrier lifetimes on epitaxial layer structures but also to extract the minority carrier lifetimes in the case of nonepitaxial test structures, which can be used to assess the material quality on, e.g., p-n junctions embedded in prime wafers. A least square fit is performed for the extracted τ eff versus τ EPI dependence of the OCVD and RR simulations according to (6) with the epitaxial layer to substrate interface recombination velocity s r 2 being the fitting parameter [further utilizing (8)]. The extracted values of s r 2 (OCVD) = 60 cm/s and s r 2 (RR) = 72 cm/s are reasonable results for the recombination velocity of this interface, as in literature primarily values of 10-100 cm/s for low/high junctions are reported [15], [38], [39], [40]. A calculation back from τ eff to τ EPI as has been performed for the simulation results will be practically difficult, as the influence of the surface recombination velocity is quite significant (see Fig. 2), and a precise determination of s r 2 difficult. Therefore OCVD and RR are excellent methods for the extraction of τ eff , however, a determination of τ EPI with these methods becomes difficult for small EPI layer thicknesses. To further investigate the influence of the epitaxial layer thickness and the modeling according to (6) and (8) an additional set of simulations is performed, where the epitaxial layer lifetime τ EPI is kept at 50 µs and the epitaxial layer thickness t EPI is varied between 3 and 100 µm. As can be seen in Fig. 7, τ eff varies strongly with t EPI and approaches τ EPI for t EPI ≈ 100 µm. The dependency of τ eff on t EPI can be accurately modeled with (6) and (8), where a value of s r 2 = 42 cm s −1 is extracted for the surface recombination velocity.

VI. CONCLUSION
A high and well-defined lifetime of minority carriers is a key enabler in achieving a high quantum efficiency for optical devices. However, the characterization of carrier lifetimes is challenging and various methods to measure them have been proposed. To evaluate the suitability of the proposed methods we systematically studied two transient methods, namely OCVD and RR, in the first part of this work to extract the carrier lifetime employing dedicated test structures. Our results demonstrate that the effect of the epitaxial layer to substrate interface becomes more pronounced the higher the minority carrier diffusion length L EPI resulting in an effective carrier lifetime τ eff much lower than the epitaxial layer lifetime τ EPI . OCVD and RR are well-working methods to measure this effective carrier lifetime, which is an essential parameter for opto-electronic devices and other minority carrier-based applications. In Part II of this work, we look at the cIVCV lifetime characterization techniques, which can be utilized, after proper consideration of the underlying approximations, to extract the epitaxial layer lifetime τ EPI .