Fine-Tunable Emission Pulse Generation Circuit Based on p-Type Low-Temperature Poly-Si Thin-Film Transistors for Active Matrix Organic Light-Emitting Diode Displays

Active matrix organic light-emitting diode (AMOLED) displays have deployed the compensation techniques to cope with the luminance non-uniformity issues caused by variations on electrical characteristics of thin-film transistors (TFTs). While some compensation circuits require control signals of longer pulse widths than a line time, the luminance control as well as the higher bit depth representation have been also accomplished by adjusting the pulse widths. A proposed EM pulse generation circuit consists of 11 p-type low-temperature poly-Si (LTPS) TFTs and a one coupling capacitor. While previous tunable circuits could address pulse widths of either even or odd multiples of a line time, the proposed circuit can generate any multiples by changing phases of additional clock signals. In particular, the internal inverter is implemented with a load connected to the output of a previous stage’s inverter to reduce the power consumption over pulse widths. The coupling capacitor is also connected between two adjacent stages through one TFT, eliminating coupling noises on the output pulses. The proposed EM circuit is simulated at a line time of $3.8~\mu \text{s}$ for a 120 Hz ${3840} \times {2160}$ display. The results ensure that pulse widths from three to 2160 lines are generated successfully without coupling noises and the small variation on power consumption from 1.23 to 0.33 mW is achieved at 30 stages for the whole range of pulse widths, compared to the large range from 1.26 to 76.91 mW with the inverter of a diode-connected load.


Fine-Tunable Emission Pulse Generation Circuit
Based on p-Type Low-Temperature Poly-Si Thin-Film Transistors for Active Matrix Organic Light-Emitting Diode Displays Min Kyu Chang, Ji Hoon Kim , and Hyoungsik Nam , Member, IEEE Abstract-Active matrix organic light-emitting diode (AMOLED) displays have deployed the compensation techniques to cope with the luminance non-uniformity issues caused by variations on electrical characteristics of thin-film transistors (TFTs). While some compensation circuits require control signals of longer pulse widths than a line time, the luminance control as well as the higher bit depth representation have been also accomplished by adjusting the pulse widths. A proposed EM pulse generation circuit consists of 11 p-type low-temperature poly-Si (LTPS) TFTs and a one coupling capacitor. While previous tunable circuits could address pulse widths of either even or odd multiples of a line time, the proposed circuit can generate any multiples by changing phases of additional clock signals. In particular, the internal inverter is implemented with a load connected to the output of a previous stage's inverter to reduce the power consumption over pulse widths. The coupling capacitor is also connected between two adjacent stages through one TFT, eliminating coupling noises on the output pulses. The proposed EM circuit is simulated at a line time of 3.8 µs for a 120 Hz 3840 × 2160 display. The results ensure that pulse widths from three to 2160 lines are generated successfully without coupling noises and the small variation on power consumption from 1.23 to 0.33 mW is achieved at 30 stages for the whole range of pulse widths, compared to the large range from 1.26 to 76.91 mW with the inverter of a diodeconnected load.
Although AMOLED displays adopt a similar scanning way to active matrix liquid crystal displays (AMLCDs) by means of source and gate driver circuits, they require additional schemes to compensate for variations on thin-film transistor (TFT), supply voltage, and organic light-emitting diode (OLED) that cause observable artifacts, such as Mura, non-uniformity, and image-sticking. Consequently, many compensation techniques including current programming, voltage programming, digital programming, and external compensation are reported [8], [9], [10], [11], [12]. While voltage programming circuits are widely employed in small and medium-sized applications, the external compensation schemes are adopted in large-sized displays that suffer from supply voltage variation and need a long operational lifetime. To realize these compensation methods, additional control signals should be supported except for scanning pulses. A representative one is an emission control signal (EM) that manages the light emission time of an OLED. In general, this signal is used to block the undesired light emission during the compensation operation. Also, the EM signal can be in use to change the luminance by the pulsewidth modulation (PWM) scheme. In smartphones, the luminance needs to be adjusted according to the ambient illuminance to save the power consumption and to alleviate the image-sticking problem [13]. It has been also reported that the higher bit depth for the gray representation can be achieved by managing data voltage level as well as emission time [14], [15] and the high-moving image picture quality can be achieved by black frame insertion [16], [17]. The tunable EM circuits can support the scanning as well as the pulsewidth adjustment for a variety of applications, such as compensation, luminance control, high-bit depth representation, and black frame insertion.
The previous EM circuits have programed the duty ratio by changing the start pulsewidth applied to the first stage and shifted the pulse in a fashion of stage-by-stage by means of the same clock signals used in scanning shift registers [13], [18], [19], [20]. However, their pulsewidth tunability is limited by odd or even number multiples of the line time. This limitation has been coped with by the low-temperature poly-Si oxide (LTPO) circuit in addition to the reduction on the power consumption [21]. Since the duty ratio is only changed by the hard-wired input signals that are the output signals from other scanning shift registers, there do not exist any ways to adjust the pulsewidth after the fabrication. The equivalent approach has been also reported to support the foveation-based driving circuit for the high-resolution headmounted AMOLED display [22]. Another LTPO circuit has been proposed to control EM pulse widths by the number of the input pulses that have the pulsewidth of one line time [23]. However, it can also support only pulse widths of even multiples. In addition, while the pulse widths are extended, the scanning pulses should not be generated. EM circuits cannot operate independently of the pixel programming conducted by scanning pulses.
This article introduces a fine-tunable EM pulse generation circuit that controls the pulsewidth precisely by any multiples of a line time. Because its pulsewidth is programed only by the start pulse like previous approaches, the duty ratios of EM pulses are adjustable even after the fabrication. The simplest implementation of the EM circuit is to use gate pulses to specify the timing of output transitions. As shown in   pulsewidth of four line times. However, this scheme provides only the fixed pulsewidth.

II. PROPOSED EM PULSE GENERATION CIRCUIT
Most tunable EM circuits have maintained long pulse widths by the input signal of the target pulsewidth that is usually the EM pulse of the previous stage and shifted them by means of clock signals used in scanning shift registers. In an example of Fig. 3(a), CLKB and CLK delay rising and falling transitions of the input pulse by a line time, respectively. Because the time interval between CLK and CLKB pulses is an odd multiple of a line time, the pulsewidth of the output is restricted to an odd multiple of a line time. If one clock signal like CLKB controls both rising and falling transitions as depicted in Fig. 3(b), only the pulsewidth of an even multiple of a line time is achieved. Since the phases of CLK and CLKB are fixed for the scanning pulse generation, this implementation has a limit to supporting pulse widths of either odd or even multiples of a line time.
In this article, we employ two additional clock signals which phases are adjusted by the external clock generation circuit. Because these variable phase clock signals are used to set the rising transition of the output, the proposed EM circuit achieves the programmable pulse widths of any multiples of a line time.
The proposed EM pulse generation circuit consists of 11 p-type LTPS TFTs (P1-P11) and one capacitor (C1) as illustrated in Fig. 4. VGH and VGL are high and low supply voltages. CLK and CLKB are two-phase clock signals for both shift registers of scanning and EM pulses. CLKE is also one of two-phase clock signals, but is adjustable in a phase depending on whether the pulsewidth is an odd or even multiple of a line time. P1    C1 is used to enable pulling EM[n] down to VGL by coupling the falling transition of EM[n+1] to Q[n]. The details of the whole operation are expressed in four steps: 1) pullingdown; 2) capacitive-coupling; 3) holding; and 4) pulling-up, as shown in Fig. 5(a) and (b) for even and odd multiples of a line time, respectively. CLKE is set to be equal to CLKB for even multiples and CLK for odd multiples. Unlike Fig. 3, the proposed circuit controls the high pulsewidth by adjusting the low pulsewidth due to a fixed frame period of time.
1) Pulling-Down: Because the inverter of P7-P10 sets QB[n] to be high by the low voltage of EM[n−1], P3 and P5 are turned off as illustrated in Fig. 6 In particular, the proposed circuit copes with two issues of increased power consumption over EM pulse widths and undesired coupling effects through C1 from EM[n+1] in the previous one [24]. First, conventional one-type TFT inverters have employed a diode-connected load of P8, giving rise to the shoot-through current paths that contribute to the increased power consumption as shown in Fig. 7(a). In addition, the longer pulsewidth increases shoot-through intervals further, leading to larger power consumption. However, as presented in Fig. 7(b), an internal inverter of P7 and P8 in the proposed circuit does not use P8 as a diode-connected load but controls it by B[n−1] that is the inverter output of a previous stage. Because the shoot-through current path takes place only during one line time, the proposed circuit dramatically reduces the variation of the power consumption over EM pulse widths.
Second, C1 is adopted to pull EM   Fig. 8(a) Fig. 9(a) and (b). Thus, the coupling noises at EM[n] are alleviated.

III. SIMULATION RESULTS
The proposed EM circuit is verified by a simulation program with integrated circuit emphasis (SPICE) at a backplane of p-type LTPS TFTs with threshold voltage and mobility of −1.72 V and 62.6 cm 2 /Vs, respectively. Its transfer curve is shown in Fig. 10 at channel length and width of 10 and 180 µm, respectively. High and low supply voltages of VGH and VGL are 20 and 0 V, respectively, where CLK, CLKB, CLKE, and CLKEB have voltage swings between VGH and VGL. It is assumed that capacitive and resistive loads are 150 pF and 10 k , respectively, and target resolution and frame rate are 120 Hz and 3840 × 2160, respectively, where the line time is about 3.8 µs and the vertical blank length is ten lines. The channel widths of TFTs, with the minimum channel    Table I. C1 is given as 1 pF. The overall configuration of EM circuits is described in Fig. 11 and the layout of an EM circuit is presented in Fig. 12.  Among 30 stages, the 29th EM circuit is investigated to estimate the waveforms of input-output, and internal node voltages for pulse widths of even and odd multiples of a line time, as shown in Fig. 13(a) and (b), respectively. In those plots, lower negative fluctuations than VGL at B[n]-nodes are caused by the capacitive coupling from CLKE.
In addition, we verify the operation range of pulse widths from four to 2160 lines for even multiples and from three to 2159 lines for odd multiples as presented in Fig. 14. Especially, long pulse widths are described with positive pulse widths for visualization.
The coupling noises on EM[n] are also compared by means of the simulation results about the connections through C1 without and with P11. As described in Section II and depicted in Fig. 15, outputs of odd pulse widths without P11 include the coupling noises from the rising transitions of EM pulses of following stages while outputs of even pulse widths show no coupling noises. However, P11 ameliorates these coupling noises at even pulse widths as well as at odd pulse widths as illustrated in Fig. 16. Rising time, falling time, and coupling noise magnitude at EM pulses without and with P11 are summarized in Table II. In particular, because the capacitive   coupling occurs after EM outputs are predischarged in the pulling-down period, the falling time is estimated to be longer than one line time of 3.8 µs.
The B[n−1]-connected load structure of an internal inverter is evaluated by power consumption over pulse widths that are compared to the diode-connected load scheme as plotted in      shows a very small change from 1.23 to 0.33 mW. In addition, the power consumption of the proposed circuit is divided into three parts of VGH, CLK/CLKB, and CLKE/CLKEB as summarized in Table III. As explained in Fig. 7, the power consumption from VGH is kept at the constant value of around 0.26 mW regardless of pulse widths. The power consumptions at CLK and CLKB are also maintained. On the other hand, because CLKE and CLKEB drive the large capacitive load of QB[n] only during the high voltage period of EM[n−1], their power consumption is reduced from 0.962 to 0.066 mW while increasing the low pulse widths of EM outputs. For the comparison, the details of the power consumption in the EM circuit with a diode-connected load inverter are also presented in Table IV. Due to the shoot-through current path between VGH and VGL, the power consumption at VGH increases from 0.300 to 70.711 mW over the EM pulsewidth. Furthermore, because the diode-connected load inverter provides a lower voltage level than VGH at the low pulse period of  Table V.

IV. CONCLUSION
This article demonstrates the fine-tunable EM pulse generation circuit that covers pulse widths of any multiples of a line time without the large power variation as well as the coupling noises. Unlike previous tunable EM circuits that support either odd or even multiple pulse widths, the proposed one provides pulse widths of any multiple lines by adjusting the phase of additional clock signals. Thanks to the internal inverter of the B[n−1]-connected load, the small variation in the power consumption from 1.23 to 0.33 mW is achieved for pulse widths from three to 2159 lines, while the diode-connected load structure shows a large variation from 1.26 to 76.91 mW. In addition, the robustness of EM pulses to coupling noises is also established by connecting Q[n] and EM[n+1] through the capacitor and TFT.

ACKNOWLEDGMENT
The EDA tool was supported by the IC Design Education Center (IDEC), Daejon, South Korea.