A Fully Inkjet-Printed Unipolar Metal Oxide Memristor for Nonvolatile Memory in Printed Electronics

Memristors are an interesting novel class of devices for memory and beyond von Neumann computing. Besides classical CMOS technology, memristors can also be manufactured by additive printing techniques and hold great potential for printable neuromorphic circuits and memories. In this work, we report a fully inkjet-printed unipolar metal oxide memristor with a low forming voltage. The memristor is based on a sandwich-like Ag/ZnO/Ag structure. The device exhibits excellent performance parameters, such as high cycle-to-cycle and device-to-device uniformity and a long retention time of <inline-formula> <tex-math notation="LaTeX">${\geq } {10}^{{4}}$ </tex-math></inline-formula> s. Furthermore, the inkjet-printed memristor shows an exceptionally high <inline-formula> <tex-math notation="LaTeX">$R_{\mathrm{OFF}} / R_{\mathrm{ON}}$ </tex-math></inline-formula> ratio of <inline-formula> <tex-math notation="LaTeX">${10}^{{7}}$ </tex-math></inline-formula> over 100 pulsed switching cycles.

like low cost, environmental/thermal stability, and excellent electronic transport properties, are commonly utilized in the fabrication of thin-film transistors [8], [9].This class of materials including TiO 2 [10], HfO 2 [11], TaO x [12], WO x [13], MgO [14], and ZnO [15] are also used as the active layer of memristors.Among these metal oxide materials, zinc oxide (ZnO) has attracted enormous interest as an active layer in a memristor due to its advantageous properties, such as transparency [15], tunability of electrical properties [16], and feasibility of solution processing [17].
Most investigated metal oxide-based memristors are fabricated using classical thin-film fabrication methods, such as atomic layer deposition, sputtering, or photolithographic techniques [11], [12], [13], [14], [18], [19], which allow for high-quality thin films, however, at increased cost and equipment overhead.Inkjet-printing allows for the precise, ondemand, low-cost, decentralized, and sustainable fabrication of electronic devices and circuits at minimum material waste in an additive manner, which circumvents subtractive etching processes for frontend and backend integration entirely [20], [21].In recent years, printing technology is employed to fabricate electronic devices and interconnects, which enable novel applications in the field of printable low-cost electronics, large-area sensing, and wearables [22].To advance printed electronics (PE)-based applications, feasible solutions for lightweight data storage and basic near-sensor data processing are required.Next to printed thin-film transistors, printed memristors can provide an alternative path to be used in these circuits.Currently, most printed metal oxide memristors are presented using hybrid fabrication methods incorporating classical sputtering or deposition techniques, especially for electrodes [17], [23], [24], [25].High-performance, fully inkjet-printed memristors are scarcely reported.This includes devices that utilize spin-on-glass [26], [27] and TiO 2 as active layer [28].On the other hand, almost all reported printed metal oxide memristors are introduced as bipolar resistive switching type [17], [23], [25], [28], [29], [30].Furthermore, performance-relevant parameters such as endurance under pulsed voltage and the device variability are often not reported for solution-processed or printed devices [3].
In this work, we report a fully inkjet-printed unipolarswitching metal oxide memristor.The device is electrically characterized and shows excellent performance characteristics, such as exceptionally high R OFF /R ON ratio, high retention, high cycle-to-cycle and device-to-device uniformity, and low forming voltage.Furthermore, we discuss the conduction mechanisms of the device, which exhibits Schottky emission and trap-controlled space charge-limited conduction (TCSCLC) in the high-resistance state (HRS).In the low-resistance state (LRS), the device shows Ohmic conduction.

II. DEVICE STRUCTURE AND FABRICATION
The reported device consists of a ZnO active layer and silver (Ag) bottom electrode (BE) and top electrode (TE) (see the schematic top view in Fig. 1).A silver nanoparticle ink is chosen as the active electrode material.The fast diffusion properties of silver render it an ideal candidate in electrochemical metallization (ECM)-type memristors [3].
For inkjet printing, a drop-on-demand inkjet printer (DMP2381, Fujifilm) is used.Initially, the BE is inkjet printed onto a glass substrate, which is previously cleaned by ultrasonication for 20 min in a mixture of acetone and isopropanol (ratio of 1:1).The ink used for printing the electrodes is a commercially available silver nanoparticle dispersion (Silverjet DGP, Sigma Aldrich).After printing the silver ink, a heating treatment of 100 • C over 1 h is required to eliminate residual solvent.An aqueous zinc nitrate-based salt precursor solution (0.1 M Zn(NO 3 ) 2 • 6H 2 O) is inkjet-printed onto the Ag-based BE.After printing the precursor solution, the sample is annealed at 400 °C under argon (Ar) atmosphere for 2 h.Finally, the TE is inkjet-printed onto the transparent ZnO layer perpendicular to the BE.The upper part of Fig. 1 shows a schematic and an optical image of the fabricated memristor.The effective area of the fully inkjet-printed device is ca.150 × 150 µm and is formed at the cross-point of the TE and BE.The sandwich-like structure of the device Fig. 2. Analysis of the Ag and ZnO thin films using SEM and AFM.For the Ag TE and the ZnO SEM surface micrographs, dense films can be observed.The surface roughness values R q obtained from AFM measurements are shown in the small table.The Ag TE and BE values differ, as the BE is also subject to the temperature annealing process required for ZnO thin-film formation.
is illustrated with a cross-sectional schematic in the bottom part of Fig. 1, along with scanning electron microscopy (SEM) (FEI strata 400 S) micrographs, which show the morphology and thickness of each inkjet-printed layer.The TE and BE have a thickness of ≈100 nm, and the ZnO layer is ≈500-nm-thick.At the top Ag/ZnO interface, the focused ion beam cut inflicted damage in the form of holes is visible, which is a common effect.The undamaged top Ag electrode surface morphology can be seen in the upper part of the image, where a dense Ag nanoparticle-based thin film can be observed.Furthermore, we investigate the inkjet-printed thin-film surface properties as shown in Fig. 2. Scanning electron microscopy micrographs show the dense Ag and ZnO thin-film surfaces, where they are undamaged.For surface roughness investigation, the root mean square roughness (R q ) values of the Ag and ZnO layers are obtained with atomic force microscopy (AFM) (Dimension Icon, Bruker) in the tapping mode over a scanning area of 1 × 1 µm and the results are analyzed by the open-source software Gwyddion [31].For the Ag electrodes, we compare the TE and BE surfaces.The Ag BE is also subject to the annealing step, which is required to form the ZnO layer.The obtained roughness value for the Ag TE is R q = 22.21 nm, the ZnO has an R q = 1.39 nm, and the Ag BE surface roughness is R q = 15.27nm.The nanoparticle-based Ag thin films show an expected increased R q , when compared to the precursor-formed ZnO thin film.For the Ag BE, the roughness values are reduced due to the annealing for ZnO thin-film formation, which leads to the agglomeration of Ag nanoparticles into bigger clusters and hence a denser film.The obtained value for the ZnO is comparable with reported values from dc magnetron sputtered ZnO thin films [32].

III. RESULTS AND DISCUSSION
For electrical characterization, a semiconductor parameter analyzer (4200A SCS, Keithley) is used.The samples are connected to the semiconductor parameter analyzer through a probe station (MPS150, Cascade).For all following measurements, the BE is grounded, while the corresponding voltage is applied to the TE.The current-voltage (I -V ) characteristics of the developed memristor are primarily examined by voltage sweeps with a fixed sweeping rate of 0.01 V/step.All measurements are performed at room temperature and under ambient conditions.
The voltage sweep, which induces the first resistive switching process in a pristine device, is labeled as forming and initially switches the device from the high-resistive state (HRS) to the low-resistive state (LRS).In the case of the reported memristor, the forming process is achieved by a voltage sweep from 0 to 3 V.The observed current increases sharply and reaches the compliance current (CC) of 0.8 mA at ≈1.5 V (see the black curve in Fig. 3).After the forming process, the resistive state of the device can be repeatedly switched from LRS to HRS (also referred to as RESET) and from HRS to LRS (also referred to as SET).After the forming process, the device is RESET and SET over 50 × by voltage sweeps.The corresponding I -V curves of the 10th, 30th, and 50th cycles are visualized in Fig. 3.The SET process is achieved through a voltage sweep (0 → 2 → 0 V) with a CC of 0.8 mA and the I -V characteristics are depicted by the red curves in Fig. 3.For the RESET process, the voltage sweep spans over a smaller positive voltage range (0 → 1 → 0 V) without CC.The obtained I -V curves for the RESET process are visualized as blue lines in Fig. 3.The device exhibits a typical unipolar resistive switching behavior, where the SET and RESET processes are achieved with identical voltage polarity.The sudden increase and decrease in the current at SET and RESET, which are observed from the I -V characteristics in Fig. 3, imply the formation and rupture of conducting filaments within the active layer of the device.The filament rupture in the RESET process is probably due to Joule heating [33].Based on the electrical device behavior, it can be classified as the ECM-type memristor [34].
The voltages extracted over 50 RESET and SET cycles are plotted in a histogram [Fig.4(a)].The RESET voltages exhibit a mean value of x = 0.38 V with a standard deviation of s = 0.13 V.The SET voltages show a mean value of x = 1.52 V with a standard deviation of s = 0.27 V.The distributions of the SET and RESET voltage levels indicate an overall low operation voltage and small temporal variation, which are crucial parameters for further application development.The cumulative probabilities of the device resistance at LRS and HRS, which are measured after SET and RESET using a small read voltage pulse of 0.01 V, are plotted in Fig. 4(b).For both resistive states, the variation over continuous cycling remains uniform and stable.
To examine the spatial variation, ten devices from the same batch are electrically characterized under identical conditions.The voltages required for forming, SET, and RESET of ten memristors are plotted in Fig. 4  different devices distributed in a narrow range proving a good device-to-device reproducibility in terms of resistive states.
To investigate the dynamic resistive switching (RS) behavior of the device, voltage pulses are applied to SET and RESET the device.The corresponding waveform is depicted in Fig. 5(a).The pulsewidth used for SET and RESET is 0.2 s.To SET the device, a 2 −V pulse is used with a CC of 0.8 mA.For the RESET process, an 1 −V pulse is applied without CC.After each applied voltage pulse and the corresponding RS, the resistance of the memristor is read with a small voltage pulse of 0.1 V over 0.2 s.The SET and RESET pulses are alternately applied to the device.The RS results are plotted in Fig. 5(a), which shows the resistance evolution of HRS (blue solid triangles) and LRS (red solid circles) over each RS cycle.The fully inkjet-printed memristor is successfully switched between HRS and LRS for 100 × and exhibits a large R OFF /R ON ratio of 10 7 .
To investigate the retention, the device is set to a defined resistance state (LRS and HRS) and read out at one resistive state over an extended time period.For each resistive state, the resistance is read with a small voltage pulse with a width of 0.2 s and a height of 0.01 V every 200 s over 10 4 s at room temperature.Both HRS and LRS remain extremely stable over the full time scale with a huge R OFF /R ON ratio of 10 7 as visualized in Fig. 5(b).Furthermore, there is no detectable degradation of any resistive state at the end of the experimental time period.This indicates the excellent retention performance of the device [35].
In the following, we investigate the origin of the resistive switching within the device.One method is to compare the conduction mechanisms, which dominate at the LRS and HRS of the device, respectively [38].Therefore, the obtained I -V curve of one SET process is plotted on a double-logarithmic scale in Fig. 6(a).By applying a linear fit to the I -V curves of the device at HRS, different slopes are obtained over different voltage regions, which are highlighted as blue lines with their corresponding slope values in Fig. 6(a).The slopes increase from 1.04 over 2.07 and to 10.87, as the applied voltage at the TE increases from 0.1 to 1.6 V, at which the resistive switching happens.The increasing slopes over increasing voltages are in good agreement with trap-controlled space charge-limited conduction (TCSCLC) [39].In TCSCLC, the current conduction behaves in three different ways, when subject to different voltage regions [39].For TCSCLC, in the low-voltage region, Ohmic conduction occurs, where I ∝ V .At medium-voltage levels, the trap-unfilled SCLC corresponds to Child's square law, with I ∝ V 2 .When further increasing the voltage, the conduction is related to the trap-filled SCLC, with a current proportional to a higher order of voltage (I ∝ V n , with n ≥ 2) [38].This matches with the reported slopes as shown in Fig. 6(a).However, the observed I -V characteristics in HRS at a very low voltage of <0.1 V do not correlate with TCSCLC.Therefore, the conduction mechanism in this region needs to be discussed separately.As the inset + ENDURANCE REPORTED THROUGH I-V SWEEPING.CROSS-POINT = "CP," COMMON-BOTTOM = "CB" DEVICE ARCHITECTURE in Fig. 6(a) depicts, the current-voltage dependence shows a linear fit, when plotting √ V over the logarithmic current, which indicates Schottky emission between the metal and metal oxide layer [40].The Schottky emission, which occurs at a low electrical field in the device, can be attributed to a small Schottky barrier, which is formed between the tip of Ag conducting filaments and ZnO.The transition of the conductance mechanism in HRS is explained in the crosssectional schematic of the device at HRS in Fig. 6(b).Here, the conducting Ag filaments in the ZnO layer are ruptured, when the device is in HRS.As the applied voltage at the TE increases gradually, the thermally activated charge carriers from the tip of the Ag CF will be activated over the Schottky barrier, which is formed between Ag CF and ZnO.This allows electrons to enter the conduction band of ZnO, which results in Schottky emission-like conduction behavior in the very lowvoltage region of the device.However, due to the unknown distance between both parts of the CF within the ZnO layer, the electric field cannot be predicted properly, which makes estimations about the conduction mechanism in this region challenging and requires additional work in the future [41].As the applied voltage increases, the free charge carriers in ZnO are activated and lead to Ohmic conduction.With a continuous increase of the applied voltage, more charge carriers are injected into the ZnO layer from the tip of the Ag CF, which partly fills the traps in the ZnO thin film.At this stage, the conduction behavior obeys Child's law.When the voltage at the TE is further increased, more charge carriers, which originate from the Ag CF, continuously fill the traps in the ZnO and lead to an exponential increase in current, respectively.At the LRS, a highly conductive Ag-based path in the ZnO layer, which bridges the TE and BE [see right schematic illustration in Fig. 6(b)], is formed.In this case, the device is supposed to exhibit Ohmic conduction with high conductivity.This behavior is well reflected in our fully inkjetprinted memristor with a slope of 1.00 as shown in Fig. 6(a).
In Table I, we compare the key device performance parameters of several reported digitally printed metal oxide memristors using inkjet and electrohydrodynamic (EHD) printing, with the reported device in this work.Next to the material stacks, the printing method, device architecture, device area, the highest required temperature processing step, type of switching behavior, and report on device-to-device uniformity are included.Regarding the device architecture, we compare cross-point (CP) and common-bottom (CB) memristor device architectures.Cross-point devices can be integrated into crossbar circuits, which is not directly feasible for CB-fabricated devices.We also include the endurance cycles in Table I based on pulse voltage investigations, which are often not reported on printed devices but reflect real application development capabilities more closely, than endurance, which is obtained by I -V curve investigations [42].The presented device is the only fully digitally printed, unipolar resistive switching memristor, whereas all other reported works are showing a bipolar switching mechanism.Furthermore, the developed device excels with its very high, reproducible R OFF /R ON ratio, which was obtained in the endurance and retention tests and shown in the deviceto-device uniformity results.Very recently, valence change memory-based fully-inkjet memristors were reported, which show an increased endurance in comparison to the presented device, at the cost of a low R OFF /R ON ratio of 5, which makes the distinction between HRS and LRS challenging.Currently, an annealing temperature for ZnO active layer formation of 400 °C is used in our reported device.In the future, a reduction in processing temperature for the metal oxide thin film could be achieved using photonic curing methods [25], [43] and other metal oxide storage layer materials.

IV. CONCLUSION
In summary, we reported a fully inkjet-printed unipolar metal oxide memristor based on a three-layer Ag/ZnO/Ag structure.The device is electrically characterized by quasistatic I -V measurements and voltage pulse measurements showing excellent performance parameters, such as low forming voltage, high cycle-to-cycle and device-to-device uniformity, and stable retention time of ≥10 4 seconds.In addition, the inkjet-printed memristor displays an exceptionally high R OFF /R ON ratio of 10 7 over 100 pulsed switching cycles.Furthermore, we studied the conduction behavior of the device over both resistance states.At HRS, the devices exhibit Schottky emission in the low-voltage region and trap-controlled space charge limited current conduction at increasing applied voltage.At its LRS, the device shows Ohmic conduction.The reported fully inkjet-printed device could potentially serve as a future element for data storage and basic near-sensor data processing in PE applications.
Institute of Technology (KIT), for support and access to FIB facilities.

Fig. 1 .
Fig. 1.Top view and microscopic image of the fully inkjet-printed Ag/ZnO/Ag memristor and schematic cross section of the device with corresponding SEM cross-sectional micrograph.

Fig. 3 .
Fig. 3. I-V curves over sweeping cycles (forming/SET/RESET).The 10th, 30th, and 50th cycles are shown.The red lines correspond to the SET processes, while the blue lines show the RESET processes.(a) I-V curves in the linear scale.(b) I-V curves shown on the semilogarithmic scale.

Fig. 4 .
Fig. 4. (a) SET and RESET voltage distribution of the device over all 50 RS cycles.(b) LRS and HRS distribution of one device over 50 RS cycles.(c) Box plot of forming, SET, and RESET voltages measured from 10 different devices.(d) Cumulative probability of HRS and LRS read from 10 different devices.
(c) as a box plot.The low forming voltage characteristics of the fully inkjet-printed memristor are shown among different devices through the small discrepancy between forming and SET voltages in Fig. 4(c).The resistances of the ten studied devices under HRS and LRS are plotted in Fig. 4(d) in the form of cumulative probability over the resistance.Both LRS (at around 10 2 ) and HRS (mostly distributed between 10 8 and 10 9 ) of

Fig. 5 .
Fig. 5. (a) Endurance performance of the device stimulated by the pulsed voltage.The inset in (a) is the pulsed voltage waveform.(b) Retention performance of the device at HRS and LRS over 10 4 s.

Fig. 6 .
Fig. 6.Analysis of the conduction mechanism.(a) Double-logarithmic I-V curve of the SET process.The inset in (a) visualizes Schottky emission, by plotting √ V over the logarithmic current (yellow curve fit).The blue lines show the conduction slopes at HRS and show trapcontrolled space charge-limited current conduction behavior.In the LRS, the red line is the fit of the device slope, which is 1 and reflects Ohmic conduction.(b) Schematic illustration of the conduction mechanism at HRS (left-hand side) and LRS (right-hand side).

TABLE I PERFORMANCE
COMPARISON WITH OTHER DIGITALLY PRINTED METAL OXIDE MEMRISTORS.NOT DEFINED = "N.D." * NOT FULLY DIGITALLY PRINTED.