The effect of annealing time on the mechanical properties of TSV-Cu

Relying on the advantages like high density integration and stacking, through silicon via (TSV) as an advanced technology has been widely used for three-dimensional integrated circuits (3D ICs). Copper filled in through silicon via (TSV-Cu) should be annealed to eliminate defects and residual stress after electroplating, which is beneficial to improve the performance of transistors. The subsequent deformation and thermomechanical reliability of TSV devices would be affected due to the change of the mechanical properties of TSV-Cu via annealing. With the help of nanoindentation characterization and finite element method (FEM) inversion, this paper studied the stress-strain relationship of TSV-Cu on five different annealing time at 400°C. The results showed that TSV-Cu had been softened by annealing and this phenomenon would be intensified with annealing time extended. However, up to 200 min annealing time resulted in indentation load and yield strength increasing instead of decreasing. This work provided theory guide for calculating the deformation and stress of TSV structure and reducing thermomechanical reliability issues.