Efficient Implementation of Two Stage Binary Logarithmic Converter

This paper studies efficient conversion of floating point normalized binary number into binary logarithmic number. The algorithm is basically combination of piece-wise linear approximation of logarithmic transform curve and piece-wise linear approximation of scaled version of normalized error curve .The implemented algorithm requires less memory and also it requires less arithmetic component to acquire 23 bit of fractional precision than any other algorithm.Due to the symmetrical property of the normalized error curve, by using combinational logic circuit requirement of the memory is reduced.