HDL-Simulation of an Embedded Radiometric Artifact Removal Onboard the Alsat-1 Imager

An embedded radiometric correction onboard a Field Programmable Gate Array (FPGA)circuit of the imager electronic board has been proposed to remove the artefacts from images of the first Algerian microsatellite Alsat-1, this is achieved through a real time processing of the captured pixels. A reference equation for the radiometric correction can be implanted in the FPGA circuit and used to remove two types of artefacts: stripping and vignetting effects. In order to study the feasibility of this embedded solution, we propose a special test design using a “validation bench” written in VHSIC Hardware Description Language (VHDL)and the use of scientific Matlab software. Furthermore, we study in this article, the choice of an appropriate FPGA circuit based on its ability to resist against space environmental constraints like temperature and radiation effects which are expected to have a significant impact on the failure rate for a space used electronic components. Finally, this article is closed with a discussion about some corrections results obtained on the Alsat-1 images.