Implementation of a SPI based Redundancy Network for SoC based UAV FCCs and Achieving Synchronization

While Unmanned Aerial Vehicle (UAV) systems gained popularity within the last years and a lot of innovation was made in terms of mission management or autonomous operation, the architectural safety aspect did not get this much attention. The most common way to ensure safety is by implementing redundancy to reach a Fail Operational behaviour of the system, which needs to be managed by a dedicated redundancy network. In the past, these networks were implemented by extending the processing elements of the Flight Control Computer (FCC), which nowadays usually consists of System-on-a-Chips (SoCs), by using dedicated and proprietary components. This is suboptimal in terms of Space, Weight and Power (SWaP) and thus in this new approach, the network functionality shall be integrated onto the SoC itself. This paper covers technical implementation details by using onboard Serial Peripheral Interface (SPI) interfaces, as well as the logical integration of the redundancy management into the cyclical execution scheme of the FCC. This requires a fundamental performance analysis to determine the induced overhead through the additional redundancy management tasks. Based on these results, the feasability of the proposed solution can be estimated. In addition, also the implementation of temporal synchronization on a frame base between the redundant SoCs within the FCC needs to be evaluated in terms of induced overhead and the reachable level of synchronicity.