3D Si interposer & WLP for small power devices for harsh conditions

As electronic power systems follow the general trend of miniaturization and functional density [1], this study targets reliable and low cost 3D heterogeneous integration technology using Through Silicon Vias (TSV) and Wafer Level Packaging (WLP) for the automotive market. The first part introduces an innovative process flow with focus on Wafer Level Over Molding (WLOM) and Wafer Level Balling (WLB). The second part covers electrical characterization as well as reliability tests (high temperature storage and electromigration), which have been performed on dedicated parts. The demonstrator is composed by 4 top dies stacked on a 200 μm thick silicon interposer featuring 40 μm diameter TSV last technology AR 5:1 with a pitch of 250 μm [2-3]. Finally, high temperature storage (1000 h, 200 °C) and electromigration (1.2 A, 500 h, 200 °C) results will be shown, using dedicated test structures in order to assess the compatibility of the integration to the harsh conditions. In that respect, several types of passivation materials, including organic, mineral and a combination of both materials, have been benchmarked by high temperature storage tests (HTS).