System-level design for human action recognition in 3D scenes

This study proposes a system-on-a-chip, field-programmable gate array (FPGA)-based real-time video processing platform for human action recognition. We provide the details of a hardware implementation for real-time human activity recognition in 3D scenes, including capture, processing, and display. The proposed platform is implemented by adding a two-stage preprocessing step to improve the results of a saliency map and utilizing the inherent parallelism of FPGAs. Appropriate circuits for parallelized operation of Harris and Hessian interest point detection and support vector machine classifiers are discussed.