Comparative of HLS and HDL implementations of a grid synchronization algorithm

Control in power electronics develop new algorithms that increase computational complexity and sampling frequency. This fact means that traditional software implementations on DSPs does not satisfy the control constrains anymore moving those implementation to FPGAs, what everyone knows that is not a trivial task. This paper will show that HLS tools such Vivado HLS are mature enough to start considering it the first approach to the required hardware implementation of the proposed algorithm. For a comparative purpose, a grid synchronization algorithm developed in HDL previously has been redesigned using the HLS tools.