Fabrication of multi-layer vertically stacked fused silica microsystems

In this paper, we present a fabrication process for an extremely compact, multi-layer, vertically-stacked fused silica microsystem. The system contains six fused silica layers in a total volume of less than 13 mm
³
. In the package are seven capacitive sensors designed as a six-degree of freedom inertial measurement unit plus a resonant timing device. Sixty-eight vertical electrical feedthroughs run through all six layers. Three key technologies are introduced: the fabrication of electrostatic devices on fused silica, the creation of through wafer vias in multiple layers of fused silica and stack bonding for 3-D integration of fused silica devices. The presented fused silica technology can be used for extreme miniaturization and integration of many future MEMS microsystems.