Effect of Back Gate on Word Line Disturb Immunity of a Vertical Channel DRAM Cell Array Transistor

A novel vertical channel DRAM cell array transistor has been proposed and verified. A back gate shared by adjacent two word lines has been introduced to have both word line disturb immunity and threshold voltage controllability, while having a small foot print and corresponding scalability. The increased word line coupling has less effect on overall word line disturb immunity, by virtue of insignificant passing gate effects and reduced variability.