An ISDN echo-cancelling transceiver chip for 2B1Q coded U-interface

A 5-V CMOS chip set used for an integrated services digital network (ISDN) U-interface transceiver is described which accomplishes 2B+D channel (144-kb/s) transmission using a 2B1Q line code based on echo cancellation over existing two-wire subscriber loops. The three-chip set consists of an analog front end (AFE), an echo canceler (ECD) and a receiver (RCV). The last two are digital signal processors. The AFE has been fabricated in double-polysilicon double-metal 1.6 mu m CMOS technology. The chip size is 7.5 mm*6.5 mm. The EC and RCV have been fabricated in double-metal 1.2- mu m CMOS technology using a standard-cell design. The chip sizes are 8.2 mm*8.2 mm and 8.5 mm*8.1 mm, respectively. Total power consumption of the chip set is 580 mW with a single 5-V supply.<
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