A process variation compensated comparator for FSK demodulators

An inverter based comparator design is presented. The comparator has inherently process variation compensated structure which makes the threshold voltage of the comparator independent of the process variation. The compensation structure consists of one additional inverter and four triode region operating transistors. The comparator is designed for FSK demodulation applications and simulated with 0.35 /spl mu/m CMOS technology.