Multiprocessor digital signal processing on Earth orbiting scatterometers

The implementation of a Multi Digital Signal Processor for radar return analysis on a Ku-Band Earth orbiting scatterometer is discussed. Historically, radar signal processing on scatterometers has been implemented with discrete components, Field Programmable Gate Arrays (FPGA)and Application Specific Integrated Circuits (ASIC). These methods are expensive due to long development times, expensive tools, and their lack of modularity. The system presented in this paper uses a radiation tolerant, space qualified version of a commercial general purpose DSP (ADSP-21020) to perform the radar signal processing functions. This approach allows the use of development tools such as compilers, libraries, evaluation boards and emulators. The presented system uses multiple processors interconnected with IEEE-1355 high-speed links to provide the computational power necessary. Operating systems such as Virtuoso provide core capabilities to facilitate scalability, which is important to accommodate changes in functional or performance requirements that inevitably occur late in the development cycle, or even on orbit. A testbed was assembled using a combination of commercial DSP hardware and spaceflight components to evaluate the proposed multiprocessing approaches. Test results of real-time radar echo processing are presented, as well as proposed designs for future investigation.