A novel digitization scheme with FPGA-based TDC for beam loss monitors operating at cryogenic temperature

Recycling integrators are common current-to-frequency converting circuits for measurements of low current such as that produced by Fermilab's cryogenic ionization chambers. In typical digitization/readout schemes, a counter is utilized to accumulate the number of pulses generated by the recycling integrator to adequately digitize the total charge. In order to calculate current with reasonable resolution (e.g., 7-8 bits), hundreds of pulses must be accumulated which corresponds to a long sampling period, i.e., a very low sampling rate. In our new scheme, an FPGA-based Time-to-Digital Convertor (TDC) is utilized to measure the time intervals between the pulses output from the recycling integrator. Using this method, a sample point of the current can be made with good resolution (>;10 bits) for each pulse. This effectively increases the sampling rates by hundreds of times for the same recycling integrator front-end electronics. This scheme provides a fast response to the beams loss and is potentially suitable for accelerator protection applications. Moreover, the method is also self-zero-suppressed, i.e., it produces more data when the beam loss is high while it produces significantly less data when the beam loss is low.