Real-time signal processing - a new PLL test approach

A novel waveform digitizer technique in an SOC tester employs a real time signal-processing unit (RT-SPU) working as a frequency down converter suitable for orthogonal demodulation. One of the more interesting applications of this digitizer is PLL device characterization. The purpose of this paper is to demonstrate how effectively the RT-SPU empowered digitizer works for PLL lock-in trend analysis with orthogonal demodulation method (ODM). In this paper a single-chip PLL device is tested applying a frequency down conversion function of the RT-SPU. An analyzation process using this technique will be described in detail utilizing mathematical, spectral and graphical analysis. As a result, it reveals intriguing PLL lock-in locus, clearly showing “cycle slips,” which is one of the most important factors in PLL ·· design. Measurements of an abrupt frequency change and a spectrum spread clocking of the same device are performed for further comprehension of this method. In conclusion the RT-SPU empowered digitizer demonstrates its effective performance and excellent throughput in ODM.