C++ Based Design Flow for Reconfigurable Image Processing Systems

In this paper a new hardware-software co-design flow for FPGA based image processing systems is described. This flow is fully C++ based and allows specification, verification and semi-automatic generation of all necessary software and hardware components. It allows the involvement of algorithm developers in the majority of the design stages, without requiring hardware knowledge. The application is modeled in C++ using a SystemC framework. The user defined blocks are automatically converted to VHDL using the CatapultC synthesizer. The flow has been applied to two representative image enhancement functions.