High Throughput Systolic SOM IP Core for Fpgas

We have designed a modular SOM systolic architecture that can classify data vectors with thousands of elements in real time. The architecture is described as a soft IP core in synthesizable VHDL. The SOM neural network size, the input data vectors dimension, the weight and data element bitwidth precision etc. are all designer tunable parameters. Several SOM neural network instances have been synthesized and their performance evaluated for different Xilinx Virtex-II and Virtex II-Pro FPGAs. Moderate to large size SOM networks that can process data vectors with as many as 4096 elements can fit into a single FPGA device and clocked at frequencies as high as 150 MHz. This makes the architecture a useful co-processor candidate for the real-time categorization of large-size genomics and proteomics datasets.