An analog random-access memory in the AVLSI-RA process for an interpolating pad chamber

An analog memory for an Interpolating Pad Chamber has been designed at Oak Ridge National Laboratory and fabricated by Harris Semiconductor in the AVLSI-RA CMOS process. The goal was to develop a rad-hard analog pipeline that would deliver approximately 9-bit performance, a readout settling time of 500 ns following read enable, an input and output dynamic range of +/-2.25 V, a corrected RMS pedestal of approximately 5 mV or less, and a power dissipation of less than 10 mW/channel. The pre- and post-radiation measurements to 5 MRad are presented.<
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