A CMOS Voltage-Controlled Oscillator Using Dual-Balance Capacitive-Division Structures

A CMOS voltage-controlled voltage (VCO) using the dual-balance capacitive division structures with the complementary cross-coupled pairs implemented in the
$\boldsymbol{0.18-\mu \mathrm{m}}$
CMOS process is presented. The performance of the tuning range, the power dissipation, and the phase noise of the proposed CMOS VCO can be effectively improved. The measured phase noise of the output frequency of 2.57 GHz is -129.36 dBc/Hz at 1-MHz offset. The measured output frequency varies from 2.57 to 2.89 GHz corresponding to 11.7 % by sweeping a control voltage from 0 to 1.6 V. The proposed CMOS VCO core consumes the 10.7 mW from a 1.6-V supply.