920-MHz Fully Integrated Low-Power Lna Under Moderate-Inversion Operation

A low-power, low-noise fully-integrated LNA has been studied operating the MOSFET in the moderated-inversion region. The most influential device for NF of the fully-integrated LNA is the parasitic resistance of the gate inductor, so the inductance of the gate inductor should be low, however, it exhibits a lower gain, therefore, gate size optimization is needed. In this work, 920 MHz cascode amplifiers with
$W$
of 0.5, 1.0, and 1.5 mm were studied. As result, 1.0 mm gate width exhibits optimum, s21 and NF showed 16.9 dB and 2.30 dB with 1.28 mW power consumption. TSMC 180-nm CMOS process was used.